Introduction

Ge is a unique and attractive material as it has a higher carrier mobility than Si for both electrons and holes and is compatible with conventional Si processing1,2,3,4,5,6. Therefore, Ge complementary metal-oxide-semiconductor (CMOS) is promising for scaling beyond the Si-CMOS limit. In the last decade, numerical efforts on the gate stack4,5,6,7,8 and Ge-on-insulator (GOI) technologies9,10,11,12,13,14,15,16 have made Ge MOS field-effect transistors (MOSFETs) superior to Si-MOSFETs for both p and n channels. Considering that the most promising use of Ge-CMOS is to integrate it into Si large-scale integrated circuits (LSIs) or flat-panel displays, the GOI should be formed at low temperature in a simple process. However, single-crystal GOI technology such as, mechanical transfer1,10, oxidation-induced condensation5,11 and rapid-melting growth12,13,14,15 requires a single-crystal wafer or high temperature process (>900 °C).

Polycrystalline Ge (poly-Ge) thin films have been formed on insulators at low temperatures using solid-phase crystallization (SPC)16,17,18,19,20, laser annealing21,22,23,24, chemical vapor deposition25,26, lamp annealing27,28, seed layer technique29 and metal-induced crystallization (MIC)30,31,32,33,34. The poly-Ge layers are naturally highly p-type because of their defect-induced acceptors35. Although the low solid solubility of n-type dopants in Ge made it difficult to produce n-type poly-Ge in a low thermal budget36,37, some techniques including short-time annealing enabled n-type poly-Ge18,24,38. However, poly-Ge with high carrier mobility (>200 cm2/Vs) was difficult for both p- and n-type because of grain boundary scattering or metal contamination. Therefore, the poly-Ge MOSFETs performed worse than single-crystal GOI-MOSFETs.

We achieved a Hall hole mobility of over 340 cm2/Vs using SPC39, which has many advantages over other methods, including no metal contamination, no melting-induced surface-ripples and a simple process. Using the SPC-Ge layer on a glass substrate, we demonstrated the best transistor operation among poly-Ge-MOSFETs without minimizing the channel region40. The formation of GeO2 underlayer further improved the Hall hole mobility of poly-Ge to 620 cm2/Vs41, which greatly exceeds that of bulk-Si (430 cm2/Vs). We also achieved n-type poly-Ge by the SPC of Sb-doped amorphous Ge (a-Ge)42. However, the electron mobility was limited to 210 cm2/Vs by the neutral Sb scattering because of the low solid solubility of Sb in Ge. In this study, we examined As as a dopant because it has a higher solid solubility in Ge than Sb36,37. The As doping in a-Ge significantly changed the subsequent SPC characteristics, including crystallization rate, grain size and electrical properties. By controlling the As amount and SPC conditions, the highest electron mobility among n-type poly-Ge is achieved.

Experimental

As schematically shown in Fig. 1(a), As-doped a-Ge layers were deposited on SiO2 glass substrates at RT using a Knudsen cell of a molecular beam deposition system (base pressure: 1 × 10−7 Pa). The Ge thickness was 200 nm and the Ge deposition rate was fixed at 1.7 nm/min. The temperature of the As Knudsen cell ranged from 200 to 270 °C to modulate the As concentration CAs in Ge. As representatively shown in Fig. 1(b), secondary ion mass spectrometry (SIMS) identified the As concentrations as 1.0 × 1019, 2.8 × 1019, 6.2 × 1019, 1.2 × 1020, 2.8 × 1020, 5.9 × 1020, 1.0 × 1021 and 1.8 × 1021 cm−3 at a depth of 100 nm when the As Knudsen cell temperature was 200, 210, 220, 230, 240, 250, 260 and 270 °C, respectively. The samples were then loaded into a conventional tube furnace under a N2 (99.9%) atmosphere and annealed at a temperature Tanneal of 375–450 °C to induce SPC. We performed post annealing (PA) at 500 °C for 5 h on all samples. According to the SIMS measurements, CAs remained constant before and after annealing.

Figure 1
figure 1

Experimental procedure of SPC of As-doped a-Ge layers. (a) Schematic of the sample preparation. (b) Representative SIMS depth profiles for the samples with an As Knudsen cell temperature of 210, 230, and 250 °C.

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Results and Discussion

We examined the CAs dependence of the crystal quality of Ge using Raman spectroscopy (JASCO NRS-5100, spot diameter 20 μm, wavelength 532 nm). The samples with Tanneal = 450 °C exhibit sharp peaks near 300 cm−1, which correspond to crystalline (c-) Ge-Ge bonding in the whole CAs range (Fig. 2(a)). As shown in Fig. 2(b), annealing at 375 °C for 150 h crystallized the samples with CAs ≤ 2.8 × 1020 cm−3, but not those with CAs > 2.8 × 1020 cm−3. These results mean that excessive As lowers the crystallization rate. To analyze the Raman shift and the full width at half maximum (FWHM) of crystalline Ge (c-Ge) peaks, each spectrum was fitted as representatively shown in Fig. 2(c). The peak is fitted well enough to correctly calculate the FWHM and peak position. The Raman shift and FWHM results are summarized in Fig. 2(d). All peaks shifted to lower wavenumbers than that of a single-crystal bulk-Ge substrate, originating from the tensile strain. The peak shifts are almost constant with respect to CAs while the peaks for Tanneal = 450 °C shifted to the lower wavenumber than that for Tanneal = 375 °C. The Raman shift had small variation (<0.5%), and therefore, seems to be the dominant difference with respect to the annealing temperature. This behavior suggests that the strain likely originates from the difference in the thermal expansion coefficients between Ge and the SiO2 substrate. The FWHM is almost constant for CAs ≤ 5.9 × 1020 cm−3 and significantly increases for CAs > 5.9 × 1020 cm−3. This indicates that excessive As negatively influences SPC-Ge crystallinity, as will become clear in the later-mentioned electron backscattering diffraction analyses. Thus, the Raman studies revealed that CAs strongly influences the growth rate and crystal quality of SPC-Ge.

Figure 2
figure 2

Raman spectroscopy study of the As-doped SPC-Ge layers. (a,b) Raman spectra of the samples with CAs = 2.8 × 1019, 1.2 × 1020, 2.8 × 1020, 5.9 × 1020 and 1.8 × 1021 cm−3 annealed at (a) 450 °C for 5 h and (b) 375 °C for 150 h. The spectra for a bulk-Ge wafer are shown for comparison. (c) Fitting result of a Raman spectrum. (d) Raman shifts and FWHMs of the c-Ge peaks for samples with Tanneal = 375 °C and 450 °C as a function of CAs, where the values were averaged over three measurements for each sample. The data for a bulk-Ge wafer are shown by the dotted lines.

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The CAs dependence of the growth rate was evaluated using in situ optical microscopy during annealing. Figure 3(a) shows the typical growth evolution of SPC. Here we chose Tanneal = 400 °C because it allowed for both domain visibility and practical observation time in a wide range of CAs. The micrographs indicate that Ge nucleation occurs and the domain grows laterally with increasing annealing time. Eventually, the entire surface is covered with c-Ge for each sample, indicating that the SPC (lateral growth of domains) is saturated. The domain growth rate and saturated domain size vary significantly with CAs (Fig. 3(b)). The medium CAs sample (CAs = 1.2 × 1020 cm−3) exhibited the highest growth rate and the largest domain size among the three samples. Generally, impurity doping promotes semiconductor atom migration and enhances the recrystallization rate of amorphous films43. Conversely, excessive As reduces both nucleation and lateral growth rates (Fig. 3(b)). This is likely because segregation of excessive As suppressed nucleation and growth. These behaviors have also been reported in Sn- and Sb-doped SPC-Ge42,44,45. Therefore, As doping in a-Ge greatly influences nucleation and lateral growth in subsequent SPC.

Figure 3
figure 3

Characteristics of the growth rate of As-doped (CAs = 1.0 × 1019, 1.2 × 1020 and 5.9 × 1020 cm−3) SPC-Ge. (a) In situ optical microscopy observation. The light-colored area indicates a-Ge and the dark-colored area indicates c-Ge. (b) Annealing time dependence of the domain size derived from a typical domain in the micrographs for each CAs. Here Tanneal = 400 °C.

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The inverse pole figures (IPFs) with grain boundaries in Ge were obtained using electron backscattering diffraction analyses (JEOL JSM-7001F with the TSL OIM analysis attachment). The grain size dramatically varies with CAs (Fig. 4(a–d)). The average grain size increases with increasing CAs and then begins to decrease (Fig. 4(e)). This behavior agrees with that of the eventual domain size in optical micrographs (Fig. 3). Additionally, the grain size is significantly degraded by excessive As (CAs = 1.8 × 1021 cm−3). This behavior well accounts for the results of the Raman FWHM (Fig. 2(d)). The lower Tg provides a larger grain size, which agrees with the general tendency of SPC-Ge reflecting the reduction of nucleation frequency17,39. The sample with CAs = 1.2 × 1020 cm−3 and Tg = 375 °C exhibited a grain size of approximately 20 μm, which is the largest among poly-Ge formed by SPC.

Figure 4
figure 4

Grain size of the As-doped SPC-Ge layers. (a–d) IPF images of the samples annealed at 450 °C with CAs = (a) 1.0 × 1019, (b) 1.2 × 1020, (c) 5.9 × 1020 and (d) 1.8 × 1021 cm−3. (e) Average grain size determined by the IPF analyses for samples with Tanneal = 375 °C and 450 °C as a function of CAs. For each sample, three IPF images were taken and averaged.

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The electrical properties of the As-doped SPC-Ge layers were evaluated using Hall-effect measurements with the van der Pauw method (Bio-Rad HL5500PC). All samples showed n-type conduction owing to the self-organizing activation of As during SPC. Electron concentration n and electron mobility μn depend on both Tanneal and CAs (Fig. 5(a,b)). We note that the maximum variation between samples prepared under the same conditions is approximately 20% in n and 5% in μn, while the measurement variation was smaller than the marks in the figures for each sample. We first discuss the Tanneal dependence of the electrical properties. Before PA, n for Tanneal = 450 °C is higher than that for Tg = 375 °C in the whole CAs range (Fig. 5(a)). This behavior is consistent with the fact that higher temperatures cause higher solid solubility and activation of As in Ge36. Tanneal = 450 °C exhibits a higher μn than Tanneal = 375 °C (Fig. 5(b)), whereas the grain size shows the opposite trend (Fig. 4(e)). According to the carrier conduction model proposed by Seto for polycrystalline semiconductors46, the energy barrier of the grain boundary EB decreases as the carrier density increases. The Tanneal dependence of μn is likely attributed to the fact that Tanneal = 450 °C has higher n and therefore lower EB than Tanneal = 375 °C. After PA at 500 °C, n for Tanneal = 450 and 375 °C increases to a similar value for each CAs (Fig. 5(a)). These results suggest that the activation rate of As in Ge is determined by the maximum process temperature. μn is improved by PA for both Tanneal (Fig. 5(b)). In particular, μn for Tanneal = 375 °C is higher than that of Tanneal = 450 °C, which reflects the grain size (Fig. 4(e)). After PA, both n and μn are maximized at around CAs = 1.2 × 1020 cm−3 where the grain size is maximum (Fig. 4(e)). The CAs dependence of n is likely because the larger grain size provides the lower defect-induced acceptors and/or the less As segregation at grain boundaries. Although the CAs dependence of μn is consistent with the tendency of grain size, the dramatic improvement of μn from CAs = 1.0 × 1019 cm−3 to CAs = 1.2 × 1020 cm−3 is difficult to explain only in terms of grain size.

Figure 5
figure 5

Electrical properties of the As-doped SPC-Ge layers. (a) Electron concentration n and (b) electron mobility μn for Tanneal = 375 °C and 450 °C before and after PA (500 °C) as a function of CAs. (c) Arrhenius plot of µnT1/2 for samples with CAs = 1.0 × 1019, 1.2 × 1020 and 1.0 × 1021 cm−3 for Tanneal = 450 °C before and after PA. (d) Trap-state density Qt and energy barrier height EB of the Ge grain boundary as a function of CAs. Here n and μn were averaged over five measurements for each sample, where the variation was smaller than the marks.

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To clarify the behavior, we quantified the trap-state density Qt in the grain boundaries and EB using the following equations46:

$${\mu }_{n}{T}^{1/2}=\frac{{Lq}}{\sqrt{2{\rm{\pi }}m\ast k}}\exp \,(-\frac{{E}_{B}}{{kT}}),$$
(1)
$${Q}_{t}=\frac{\sqrt{8{\rm{\varepsilon }}n{E}_{B}}}{q},$$
(2)

where T is the absolute temperature, L is the grain size, q is the elementary charge, m* is the effective mass, k is the Boltzmann constant and ε is the dielectric permittivity. The Arrhenius plot of µnT1/2 makes an almost-downward-sloping straight line for the whole CAs region (Fig. 5(c)). Qt decreases with increasing CAs, which suggests that As atoms passivate the grain boundary traps (Fig. 5(d)). Therefore, EB dramatically decreases by As doping at CAs = 1.2 × 1020 cm−3, which reflects both the decrease of Qt and increase of n. On the other hand, Qt slightly increases with PA. This behavior is likely because PA increases lattice substitutional As and therefore reduces the extent to which As passivates the grain boundary. After PA, EB for CAs = 1.2 × 1020 cm−3 does not change, which reflects the balance between Qt and n, while μn improves slightly (Fig. 5(b)). Considering that PA improves the activation rate of As, the μn improvement is likely due to the decrease of carrier scattering by neutral As. The n and µn values reached 5 × 1018 cm−3 and 370 cm2/Vs, respectively. The µn value further exceeds that of any other n-type poly-Ge layers formed on insulators and even that of single-crystal Si wafers with n ≥ 1018 cm−3 (Fig. 6).

Figure 6
figure 6

Comparison of the electron mobility µn and electron concentration n of n-type poly-Ge layers formed on insulators. The growth method and the reference number are shown near each symbol. The data for single-crystal bulk Si is shown by the dotted line.

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Conclusions

As doping into a-Ge significantly influenced the subsequent SPC. Although excessive As doping degraded the crystallinity of poly-Ge, the appropriate amount of As (~1020 cm−3) promoted the SPC and increased the Ge grain size. By combining slow annealing at low temperature (375 °C), the grain size reached approximately 20 μm, which is the largest among SPC-Ge. Moreover, neutral As atoms in Ge reduced Qt (2 × 1012 cm−2) and EB (12 meV). These properties reduced grain boundary scattering and allowed for μn of 370 cm2/Vs, which is the highest among n-type poly-Ge formed on insulators. These findings will provide a means for the monolithic integration of high-performance Ge-CMOS onto Si-LSIs and flat-panel displays.