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A reservoir computer system based on dynamic tungsten oxide memristors can be used to perform time-series analysis, demonstrating isolated spoken-digit recognition with partial inputs and chaotic system forecasting.
Nanomechanical resonators with frequencies from 340 kHz to 13 GHz can be created using an integrated 10-nm-thick transducer layer of hafnium zirconium oxide.
A technique that combines X-ray ptychography with laminography can provide three-dimensional views of integrated circuits, yielding both images of entire chip volumes and high-resolution images of arbitrarily chosen subregions, and is applicable to any imaging problem where the samples are planar.
A superconducting switch that is capable of translating low-voltage superconducting inputs directly into semiconductor-compatible outputs at kelvin-scale temperatures could provide a superconductor-to-semiconductor logical interface for future quantum and neuromorphic computing architectures.
A manufacturing technology that uses a deformable balloon stamp to pick up pre-fabricated electronic devices and print them onto three-dimensional surfaces can be used to create devices with curvy shapes, including electrically small antennas, hemispherical solar cells and smart contact lenses.
Non-adiabatic spin-transfer torque in antiferromagnetically coupled ferrimagnets acts like a staggered magnetic field and can induce efficient domain wall motion.
Suspended double-layer graphene ribbons with attached silicon proof masses can be used to create transducers for nanoelectromechanical system accelerometers that occupy at least two orders of magnitude smaller die area than conventional state-of-the-art silicon accelerometers.
Nanoscale vacuum channel transistors, which have a vertical surround-gate configuration, can be fabricated on 150 mm silicon carbide wafers using conventional integrated circuit processing technology.
A 1 Mb non-volatile computing-in-memory system, which integrates a resistive memory array with control and readout circuits using an established 65 nm foundry CMOS process, can offer high energy efficiency and low latency for Boolean logic and multiply-and-accumulation operations.
Single-transistor dynamic random access memory (DRAM) cells, created using the III–V compound semiconductor indium gallium arsenide, can be scaled down to a gate length of 14 nm.
An integrated circuit amplifier, which is fabricated in a commercial complementary metal–oxide–semiconductor (CMOS) process, can record both voltages and currents with performance that exceeds commercial benchtop instrumentation.
An ultraflexible organic differential amplifier, which is only 2 μm thick and can conform to a person’s skin, can be used to record electrocardiograms with a signal-to-noise ratio of 34 dB.
By integrating wireless stretchable on-skin sensor tags and flexible readout circuits attached to textiles using an unconventional radiofrequency identification design, a body area sensor network can be created that can continuously analyse a person’s pulse, breathing and body movement.
A reconfigurable wireless system locked to an exceptional point can be used to interrogate in vivo inductor–capacitor microsensors with a sensitivity 3.2 times beyond the limit of conventional readout schemes.
A compact platform for quantum magnetometry and thermometry can be created by integrating nitrogen–vacancy-based quantum sensing with complementary metal–oxide–semiconductor (CMOS) technology.
Quantum-mechanical band-to-band tunnelling can be used to create an energy-efficient ternary logic technology that can be fabricated on the wafer scale using complementary metal–oxide–semiconductor (CMOS) processes.
Thermoelectric generators based on nanostructured silicon thermopiles, which are fabricated on an industrial silicon CMOS process line and are thus compatible with integrated circuit technology, exhibit a high specific power generation capacity of up to 29 μW cm−2 K−2 near room temperature.
A programmable neuromorphic computing chip based on passive memristor crossbar arrays integrated with analogue and digital components and an on-chip processor enables the implementation of neuromorphic and machine learning algorithms.
High-performance MoS2 transistors can be created using 2-nm-thick CaF2 as a gate insulator, which forms a quasi van der Waals interface with the 2D semiconductor.