Abstract
As transistors are scaled to smaller dimensions, their static power increases. Combining two-dimensional (2D) channel materials with complementary metal–oxide–semiconductor (CMOS) logic architectures could be an effective solution to this issue because of the excellent field-effect properties of 2D materials. However, 2D materials have limited polarity control. Here we report a pseudo-CMOS architecture for sub-picowatt logic computing that uses self-biased molybdenum disulfide transistors. The transistors have a gapped channel that forms a tunable barrier—thus circumventing the polarity control of 2D materials—and exhibit a reverse-saturation current below 1 pA with high reliability and endurance. We use the devices to make homojunction-loaded inverters with good rail-to-rail operation at a switching threshold voltage of around 0.5 V, a static power of a few picowatts, a dynamic delay time of around 200 µs, a noise margin of more than 90% and a peak voltage gain of 241. We also fabricate fundamental gate circuits on the basis of this pseudo-CMOS configuration by cascading several devices.
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Source data are provided with this paper. All other data that support the findings of this study are available from the corresponding author on reasonable request.
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Acknowledgements
This work was supported by the National Key Research and Development Program of China under grant nos. 2022YFA1203800 (Z.Z.), 2022YFA1203803 (Z.Z.), 2018YFA0703503 (Y.Z.), 2023YFF1500400 (Y.Z.) and 2023YFF1500401 (X.Z.); the National Natural Science Foundation of China under grant nos. 51991340 (Y.Z.), 51991342 (Y.Z.), 52225206 (Z.Z.), 92163205 (Z.Z.), 52188101 (Y.Z.), 62322402 (X.Z.), 62204012 (X.Z.), 52250398 (X.Z.), 51972022 (Z.Z.), 52303362 (L.G.) and 62304019 (H.Y.); the Frontier Cross Research Project of the Department of Chinese Academy of Sciences under grant no. XK2023JSA001 (Y.Z.); the Beijing Nova Program under grant nos. 20220484145 (X.Z.) and 20230484478 (X.Z.); the Fundamental Research Funds for the Central Universities under grant no. FRF-06500207 (X.Z.); and the State Key Lab for Advanced Metals and Materials under grant no. 2023-Z05 (Z.Z.). We thank Y. Liu at Hunan University and Y. Yu at Southern University of Science and Technology for constructive discussions.
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X.W., Z.Z. and Y.Z. initiated and supervised the project. X.W., X.Z., Z.K. and Z.Z. designed the experiments. X.W. and X.Z. performed device fabrication, data collection and analysis. L.G. and Z.C. assisted in the preparation and characterization of monolayer MoS2 by CVD. H.Y. and M.H. assisted in performing in situ characterization experiments. W.T., L.G. and H.Y. assisted in the device performance measurement and data analysis. X.W., X.Z., Z.K. and Z.Z. cowrote the paper. All authors discussed the results and commented on the paper.
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Nature Electronics thanks Michael Waltl, Xiangbin Zeng and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.
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Wei, X., Zhang, X., Yu, H. et al. Homojunction-loaded inverters based on self-biased molybdenum disulfide transistors for sub-picowatt computing. Nat Electron 7, 138–146 (2024). https://doi.org/10.1038/s41928-023-01112-w
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DOI: https://doi.org/10.1038/s41928-023-01112-w