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RESISTIVE MEMORY

Memristors divide to conquer device variability

Nature Electronics volume 1, pages 438–439 (2018)Cite this article

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A memory cell design based on two memristors and one minimum-sized transistor can nullify parasitic currents, device-to-device variations and cycle-to-cycle variations in memristive crossbar arrays.

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Fig. 1: Array architecture of H3 cells in a crossbar arrangement.

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  1. Friedrich-Alexander-University of Erlangen-Nürnberg (FAU), Erlangen, Germany

    Dietmar Fey

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  1. Dietmar Fey
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Correspondence to Dietmar Fey.

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Fey, D. Memristors divide to conquer device variability. Nat Electron 1, 438–439 (2018). https://doi.org/10.1038/s41928-018-0123-z

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