Introduction

Van der Waals (vdW) heterostructures based on two-dimensional (2D) layered materials have been extensively studied owing to its enormous combinations of selectable materials and excellent semiconducting properties. These structures have replaced conventional group IV- or III–V-based materials for applications in electronics and related fields1,2,3,4. Weak vdW interactions between individual layers and the absence of dangling bonds at the interfaces make it possible to fabricate high-performance devices5,6,7,8,9. On the one hand, unisotype vdW heterostructures, namely p–n junction, have only been studied as a building block for diodes or optoelectronic devices with distinct current rectification, gate-tunable polarity behavior, negative differential resistance from the band-to-band tunneling, and photovoltaic effect10,11,12,13,14,15,16,17,18,19,20,21. While there are a variety of choices for n-type vdW materials, there are few natural p-type vdW materials such as black phosphorus10,11,12,13,14,15 and WSe27,16,17,18,19,20,21.

On the other hand, there are few published research works on isotype vdW heterojunction, in which the transport dominated by the same majority carriers in both components. For optoelectronic device, photodetectors made of isotype vdW heterojunctions with WS2 and MoS2 were recently reported22,23. One of the reasons why isotype heterojunction is not considered for electronic devices is that it has a smaller expected rectifying response than p–n heterojunctions. However, the lack of natural p-type vdW materials has shifted the focus of researchers toward isotype vdW heterojunctions, especially n–n type, because there are enormous candidate materials.

In this study, an isotype heterojunction device combined with a multilayer moly ditelluride (MoTe2) and tin disulfide (SnS2) is demonstrated. The transistor is fabricated by exfoliating each material and stacking them by the polydimethylpolysiloxane (PDMS) dry transfer method on a Si/SiO2 (300 nm) substrate (see the details in the Methods section)24. The transport properties of individual SnS2 and MoTe2 channels were measured. It was confirmed that the conductivity of SnS2 is n type, regardless of its thickness, and MoTe2 exhibits n-type behavior for a thick flake. SnS2 has a large electron affinity (~5.2 eV) and bandgap (~2.2 eV) in the bulk phase25, which can form distinct band alignments when combined with other transition metal dichalcogenide (TMD) groups26,27,28. MoTe2, however, has a smaller electron affinity (~3.8 eV) and smaller bandgap (~0.9 eV)27. Therefore, a large band offset and a large built-in potential barrier at the heterojunction between MoTe2 and SnS2 is expected to form. In addition, we measured the Raman spectroscopy of the vdW heterojunction and confirmed the electron transfer from MoTe2 to SnS2 side according to Anderson’s rule.

As a result, the electrical measurement of the MoTe2/SnS2 heterojunction device clearly exhibits rectification. From the systematic analysis of carrier transport, based on a numerical solution of Poisson’s equation and Simmons approximation, we ascribe the rectifying behavior to the large band offsets between the two materials, which creates a large potential barrier at the heterojunction. In addition, we certify the switchable rectification characteristic by varying the gate voltage with a maximum rectification ratio of ~103, at a modestly low source–drain voltage of 1 V and in ambient environment (room temperature of 300 K). This value is comparable with that of other p–n unisotype vdW heterostructure devices from previous reports17,23,29,30. Finally, we demonstrate a ternary inverter using the MoTe2/SnS2 heterojunction and a SnS2 channel transistor. We emphasize that this is the first experimental study reporting a systematical analysis of the MoTe2/SnS2 heterojunction device.

Results

Device structure and Raman spectrum of the heterojunction

Figure 1a shows the microscopic image of the multilayer MoTe2/SnS2 heterojunction device with four Ti/Au electrodes. Figure 1b is the schematic side view of the fabricated device. The four electrodes are used to compare the individual channel and heterojunction channel in a single device, i.e., the electronic properties of MoTe2, SnS2, and MoTe2/SnS2 heterojunctions can be examined using electrodes E1–E2, E3–E4, and E2–E3, respectively. Figure 1c shows the atomic force microscope (AFM) image for the green dashed box in Fig. 1a. From the topographic image and the respective height profiles (represented by solid black and red lines), the thicknesses of SnS2 and MoTe2 are approximately 30 and 70 nm, respectively.

Fig. 1: Heterojunction device structure and Raman spectrum evaluation.
figure 1

a The optical image and b the schematic side view of the MoTe2/SnS2 heterojunction device, respectively. The scale bar used is 10 μm. E1 and E2 (E3 and E4) are the electrodes to measure the electrical properties of MoTe2 (SnS2) individual channels and E2–E3 is for the heterojunction channel. c Topographic image for the green dashed box in the optical images, and the respective height profiles. d Raman spectra of the samples at different positions. e Raman shift in the SnS2 A1g peak after heterojunction formation.

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The Raman scattering measurement was performed on different channel areas of the fabricated device. The measured areas were marked with the black (MoTe2), red (SnS2). and green dots (heterojunction) in Fig. 1a, and each Raman spectrum is shown in Fig. 1d, respectively. We used a 514-nm green laser as the excitation source. On the MoTe2 region (black line), two peaks appear near 171 and 230 cm−1, corresponding to the respective out-of-plane A1g and in-plane E12g phonon modes. The bulk inactive B12g phonon mode around 290 cm−1 is not observed in our MoTe2 thick flake (Supplementary Fig. 1), which agrees with the previously reported observations31,32,33. The spectrum in the SnS2 region (red line) shows a prominent peak of the A1g mode at ~315 cm−1 and a weaker peak of the Eg mode near 206 cm−1, which are also consistent with previous results34,35. In the heterojunction region (green), the peaks receive contributions from both MoTe2 and SnS2, indicating the existence of two distinct materials. Especially, a significant reduction of the SnS2 Raman peak intensity was observed due to the thick MoTe2 flake (~70 nm) placed on the SnS2 flake. This, in turn, led to the feeble peak of Eg that is indistinguishable in the overlapped region. In addition, we observe a redshift of ~3 cm−1 in the out-of-plane mode (A1g), owing to the phonon softening caused by the electron transfer from MoTe2 to SnS236. The electron affinity rule (Anderson’s rule) accounts for this electron transfer.

Electrical characteristics and the band alignment

Figure 2a, b shows the transfer characteristics of individual MoTe2 and SnS2 channel FET with electrodes E1–E2 and E3–E4, respectively. A back-gate voltage (Vg) was applied to the heavily n-doped (As dopants) Si substrate with a resistivity of ~0.005 Ω cm. All electronic measurements were carried out under ambient conditions (room temperature of 300 K). The observed linear output curves at different gate voltages for both MoTe2 and SnS2 FETs in the inset of Fig. 2a, b suggest the sufficiently low contact resistances between Ti/Au metal electrodes and both materials37,38. At the source–drain voltage (Vds) of 1 V, n-type dominant ambipolar behavior was observed for the bulk MoTe238,39,40,41. We checked the low gate leakage current through SiO2—300-nm thick—in tens of picoampere level for whole gate voltage ranges as shown in Supplementary Fig. 2. Specifically, MoTe2 FET exhibited ambipolar behavior for an intermediate flake and p-type behavior for a thin flake, as shown in Supplementary Fig. 2. This dependence of change in conductivity on the thickness has been reported in previous studies as well42,43. For SnS2, a typical n-type unipolar was observed37,44,45,46. It is noteworthy that we achieved sufficiently high on/off ratios (~105) in both FETs with thick flakes even though they operate in the depletion-mode, i.e., a negative gate voltage for an n-channel transistor is required to turn off the device. Usually, the on/off ratio in a depletion-mode transistor limits the thickness of the channel material, because the gating field weakens gradually, or even entirely lost, as the distance between the gate oxide surface and the channel increases47. In other words, a large leakage current flows through the expanding undepleted parts as the channel thickness increases, leading to a poor on/off ratio. In this respect, the high on/off ratio in our devices implies that the carriers in the channel can be fully depleted under the given gate voltage. Especially, a very high on/off ratio reaching 107 in the SnS2 FET was achieved even with a thick flake (~30 nm), as shown in Fig. 2a. This result can be attributed to the larger bandgap of bulk SnS2 (~2.2 eV) than that of the other TMDs48. The small bandgap of bulk MoTe2 (~0.9 eV) accounts for the relatively high off-state current of MoTe2 FET.

Fig. 2: Electrical characteristics of each device and band diagrams before and after contact.
figure 2

The transfer characteristics of a MoTe2 and b SnS2 FETs at Vds = 1 V. The insets are the output curves at different gate voltages in the range of −80 to 80 V at steps of 10 V. c Energy band alignment of MoTe2/SnS2 heterojunction before and after contact.

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Figure 2c shows the band alignment of the MoTe2/SnS2 heterojunction before and after contact. The conduction band minimum (Ec) and valence band maximum (Ev) values of MoTe2 (SnS2) were previously reported to be 3.8 eV (5.2 eV) and 4.7 eV (7.4 eV), respectively26,27,28. A very large conduction band offset (ΔEc) and valence band offset (ΔEv) of approximately 1.4 and 2.7 eV are achieved between MoTe2 and SnS2, respectively, compared with other combinations of 2D materials. Majority carrier concentrations per unit area for the respective channels (electron for both materials) at Vg = 0 V are estimated by16, \(n_{{\mathrm{MoTe}}_2}\left( {n_{{\mathrm{SnS}}_2}} \right) = \frac{{C_{{\mathrm{ox}}}\left| {V_{{\mathrm{th}}} - V_g} \right|}}{q} = 2.16 \times 10^{12}{\mathrm{(}}3.59 \times 10^{11}{\mathrm{)cm}}^{ - 2}\), where q = 1.6 × 10−19C and Cox = 1.15 × 10−8F/cm2 is the capacitance per unit area of the 300-nm-thick SiO2 gate oxide layer. The threshold voltage (Vth) is extracted based on the extrapolation in the linear region method, which finds the gate-voltage axis intercept of the linear extrapolation of transfer curves at the first maximum point of transconductance49. The values are −30 and −5 V for MoTe2 and SnS2 FET, respectively, as shown in Supplementary Fig. 3. We treated both MoTe2 and SnS2 as nondegenerate semiconductors, to simplify the calculations.

Thus, the Fermi level position was estimated using \(n^ \ast = {\int}_{E_c}^\infty {f(E)N(E)dE \cong N_c{\mathrm{exp}}\left( {\frac{{E_F - E_c}}{{k_{\mathrm{B}}T}}} \right)}\), where n* is the number of electrons per unit volume, Nc is the effective density of states in the conduction band, kB is the Boltzmann constant (1.38 × 10−23 J/K), and T is the temperature (300 K, in this case)50. Note that the channels in our devices were completely depleted under given gate voltages, which means the number of unit volumes can be simply calculated by dividing the carrier concentration obtained above by the material thickness (tMoTe2 = 70 nm, tSnS2 = 30 nm); n*MoTe2 = 3.07 × 1017 cm−3 and n*SnS2 = 1.2 × 1017 cm−3. Nc is equal to \(2\left( {\frac{{2\pi m ^\ast k_BT}}{{h^2}}} \right)^{3/2}\), where m* is the effective mass of the electron (0.55 m0 for MoTe2 and 0.43 m0 for SnS2)51,52,53 and h is the Planck constant (6.63 × 10−34 Js), giving Nc of 1.02 × 1019 and 7.08 × 1018 cm−3 for MoTe2 and SnS2, respectively. Consequently, the difference between the conduction band edge and Fermi level (EF–Ec) were calculated to be 0.09 eV for MoTe2 and 0.1 eV for SnS2. From this, the work functions were 3.89 eV (5.3 eV) for MoTe2 (SnS2).

From these band structures, the predicted band alignments of the heterojunction when these two materials were in contact were schematically described. The smaller work function of MoTe2 allows the electrons in the MoTe2 side to spill over to the SnS2 side until thermal equilibrium is established, forming a depletion region on the MoTe2 side and an accumulation region on the SnS2 side. This phenomenon is consistent with the Raman analysis in Fig. 1e. Thus, band bending occurs at the heterojunction, which yields the built-in potential ϕMo and ϕSn on the MoTe2 and SnS2 sides, respectively. The total built-in potential (Vbi) must be equal to the sum of the potential drops on the two sides (Vbi = ϕMo + ϕSn). It can be calculated from the work function difference between the two materials (~1.41 eV), since the Fermi level is constant and flat throughout the heterojunction at equilibrium. It is worth mentioning that ours is an isotype heterojunction, which is different from the conventional p–n junction heterostructures15,17,22. Therefore, the depletion region width on the MoTe2 side can be calculated by the following equations54:

$$V_{{\mathrm{bi}}} = \phi _{{\mathrm{Mo}}} + \phi _{{\mathrm{Sn}}} = \frac{{qN_{{\mathrm{d}},{\mathrm{Mo}}}x_{{\mathrm{Mo}}}^2}}{{2\varepsilon _{{\mathrm{Mo}}}}} + \phi _{{\mathrm{Sn}}},$$
(1)
$$\sqrt {2\varepsilon _{{\mathrm{Sn}}}N_{{\mathrm{d}},{\mathrm{Sn}}}k_{\mathrm{B}}T} \sqrt {\left( {\exp \left( {\frac{{q\phi _{{\mathrm{Sn}}}}}{{k_{\mathrm{B}}T}}} \right) - 1} \right) - \frac{{q\phi _{{\mathrm{Sn}}}}}{{k_{\mathrm{B}}T}}} = qN_{{\mathrm{d,Mo}}}x_{{\mathrm{Mo}}},$$
(2)

where Nd,Mo ≈ 3.1 × 1017 cm−3 and Nd,Sn ≈ 1.2 × 1017 cm−3, calculated by Nd,Mo(Sn) = nMo(Sn)/tMo(Sn), from the electron majority carrier concentrations and thicknesses of each material. εMo = 10.1 and εSn = 17.7 are the dielectric constants of MoTe2 and SnS2, respectively55,56. Eqs. (1) and (2) can be solved for ϕSn, ϕMo, and xMo. Consequently, we obtained ϕMo = 1.3 eV, ϕSn = 0.11 eV, and xMo = 68.7 nm, as shown in Fig. 2c. This depletion region width is almost similar with the thickness of MoTe2 (70 nm), implying that the MoTe2 layer may be fully depleted after contact with SnS2 at equilibrium. The barrier height value of 1.31 eV will be used to identify the transport behavior of the junction. We note that the energy band alignment of this device is also similar to that in the previous report, where the band alignment was determined by the combination of X-ray photoemission spectroscopy and ultraviolet photoelectron spectroscopy measurements28.

Transport mechanism through the heterojunction

To examine the carrier transport through the MoTe2/SnS2 heterojunction at Vg = 0 V, a Vds of up to 5 V was applied to the electrode on the MoTe2 side (E2), and the electrode on SnS2 (E3) was grounded. The forward (If) and backward currents (Ib) are defined as arising when the positive and negative voltages are applied to E2, respectively. As shown in Fig. 3a, the backward current increased rapidly up to a few microamperes with Vds, and the forward current increased only up to a few hundreds of nanoamperes even at high Vds, showing a clear rectifying characteristic. We confirmed the same trend with the other devices, which also exhibited good rectification behavior (Supplementary Fig. 4). The rectification ratio with different Vds, defined as Ib/If at the same Vds, is illustrated in Fig. 3b. The ratio behaves significantly differently across Vds = 1.35 V. In the small Vds range represented by region (I), the rectification ratio increases until a maximum value of ~4 × 102. It then decreases in region (II), where Vds is larger than 1.35 V. This transitional behavior implies our device has two different transport mechanisms.

Fig. 3: Investigation on the rectification of the MoTe2/SnS2 heterojunction device.
figure 3

a Output characteristic of the MoTe2/SnS2 heterojunction device. The inset shows the logarithmic scale of the output curve. b Rectification ratio, defined by Ib/If at the same Vds, with the increasing magnitude of Vds. c Fowler–Nordheim plot. d Energy band diagrams of the heterojunction at different Vds.

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We further investigated the transport of forward current using the Simmons approximation54 to figure out the rectification behavior and found out two distinctive transport mechanisms can explain our device’s transport property57. Direct tunneling (DT) and Fowler–Nordheim tunneling (FNT) can be expressed by the following relations:

$$I_{\mathrm{DT}} \propto V\exp \left( { - \frac{{4\pi d\sqrt {2m^ \ast \phi } }}{h}} \right),$$
(3)
$$I_{\mathrm{FNT}} \propto V^2\exp \left( { - \frac{{8\pi d\sqrt {2m^ \ast \phi ^3} }}{{3hqV}}} \right),$$
(4)

where ϕ is the barrier height, d is the tunneling barrier width, h is the reduced Plank constant, and m* is the effective mass of an electron. With the above equations, we draw the Fowler–Nordheim plot, i.e., ln(I/V2) vs. 1/V plot, as shown in Fig. 3c. This plot clearly shows the transition from a logarithmic regime at small Vds for DT to a linear regime with a negative slope at high Vds for FNT, representing region I (pink) and region II (blue), respectively. The transition voltage (Vtrans) of 1.35 V is consistent with the voltage at which RR begins to decrease, indicating that the increased forward current via FNT gave rise to the decrease of the rectification ratio. Moreover, Vtrans corresponds to ϕ/q, yielding the tunneling barrier height of ~1.35 eV. This value is analogous with the value of ϕMo = 1.3 eV in the previous band diagram analysis. With the slope in the linear regime, \(\frac{{8\pi d\sqrt {2m^ \ast \phi ^3} }}{{3hq}} = 7.9\), where m* = 0.43 m0 is the effective mass of electron in SnS251,52, we obtained d ≈ 1.12 nm.

From these results, the band diagrams of Fig. 3d are used to explain the rectification behavior. Note that only the electron carrier transport is considered because the electron is the majority carrier for both materials. When a negative voltage is applied to the MoTe2 side (Vds < 0 V), the electron is transferred from the MoTe2 to the SnS2 side will face the much lower barrier height or even no barrier at high negative voltages. As a result, the electrons easily contribute to the current by overcoming the potential barrier, even with the small thermal energy via thermionic emission. This results in the rapidly increasing backward current. In contrast, in the range of 0 < Vds < 1.35 V, the electrons in the SnS2 side confront the built-in potential barrier, whose height is determined from the conduction band offset between MoTe2 and SnS2. This barrier blocks the electron transfer from the SnS2 side to the MoTe2 side, so that the current could be achieved purely by direct tunneling through the trapezoidal barrier. This current is lower than the backward current, causing the rectification property. However, for Vds > 1.35 V, the potential barrier becomes narrower, more triangular as shown in Fig. 3d. Consequently, the increased forward current via the FNT reduces the rectification ratio.

Next, we examine the output curves of MoTe2/SnS2 heterojunction at different gate voltages from −80 to 80 V in steps of 20 V, as shown in Fig. 4a. The simple measurement schematic is in the inset of Fig. 4a. The output curves of the heterojunction device illustrate the gate-tunable rectification behavior. The backward current was decreased as Vg was changed toward negative values, so that the rectification property became imperceptible. Indeed, the rectification ratio at Vds = 1 V was less than 10 for Vg < −20 V, as shown in Fig. 4b. Notably, the ratio reached up to ~103 in a positive Vg range. This value is more than twice the value at Vg = 0 V.

Fig. 4: Gate-voltage dependence of the heterojunction device.
figure 4

a Gate dependence of output characteristics of the MoTe2/SnS2 heterojunction in the range −1 to 1 V. The inset shows the schematic for the electrical measurement on the heterojunction. Vds is applied to E2, which is in contact with MoTe2, and E3, which is in contact with SnS2, is grounded. b Rectification ratio under different gate voltages at Vds = 1 V. The inset represents the band alignment at negative voltages. c Transfer characteristics of the heterojunction at |Vds| = 1 V.

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To inspect these gate-tunable rectification properties, the corresponding transfer characteristics of the MoTe2/SnS2 heterojunction device are summarized in Fig. 4c. The transfer curve of the heterojunction on the backward current (green open circle) follows a similar trend with that of SnS2. The curve on the forward current (green closed circle) also follows that of SnS2 for Vg < −20 V. However, the current variation for Vg > −20 V with increasing Vg is negligible, yielding consistent gate-tunable rectification properties. From the transfer curves of the MoTe2 and SnS2 FET, SnS2 channel will turn off for Vg < −20 V, implying that there are no carriers, and the majority carrier in MoTe2 will change from electron to hole in the negative gate-voltage range. The relevant band diagram is illustrated in the inset of Fig. 4b. In this band diagram, when the negative Vds is applied to the MoTe2 side, the current flow of hole carriers from SnS2 to MoTe2 would be very low because the SnS2 channel is depleted. In addition, the majority hole carriers flowing from MoTe2 to SnS2 upon application of positive Vds to MoTe2 face a large potential barrier caused by the large valence band offset (Supplementary Fig. 5). Consequently, both forward and backward currents are very low for Vg < −20 V, suppressing the rectification behavior. In this manner, this device can be viewed as a series connection of MoTe2/SnS2 heterojunction and two resistors of MoTe2 and SnS2, whose resistance values can be adjusted by controlling Vg. Note the MoTe2/SnS2 heterojunction has a lateral configuration. The simple equivalent circuit is shown in the inset of Fig. 4c. The transfer curves of a heterojunction device fabricated with a thin MoTe2 flake was also investigated in Supplementary Fig. 6, indicating the gate dependence was determined by the series connection of the two materials. Based on this analysis, we deduce that the MoTe2/SnS2 heterojunction gives rise to the rectification property only when the resistance values of the parts other than the junction is low enough for the heterojunction to dominate the current flow in the series connection.

Ternary inverter

Finally, we applied the MoTe2/SnS2 heterojunction to a multivalued logic device by fabricating a ternary inverter with only two n-type FETs. As illustrated in Fig. 5a, the driving voltage (Vdd) and input voltage (Vin) were applied to the electrode of the MoTe2 side (E2) and Si back-gate electrode. The end of the electrode of the SnS2 side (E4) was grounded, and then the output voltage (Vout) on the other electrode in contact with the SnS2 side (E3) was measured.

Fig. 5: Application for the ternary inverter.
figure 5

a Schematic of the measurement setup for the ternary inverter. Vdd, Vout, and Vin are applied to E2 on MoTe2, E3 on SnS2, and the back-gate electrode. E4 is grounded. b An analog circuit diagram. c Vout as a function of Vin for Vdd = 1 V.

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This is the integration of MoTe2/SnS2 heterojunction with SnS2 FETs, which their resistance value can be fully controlled by regulating Vin. Figure 5b depicts the equivalent circuit of the ternary inverter. The plot of Vin vs. Vout in Fig. 5c clearly shows three distinct output voltage regions in the range of 0–60 V at Vdd = 1 V, corresponding to the three logical states. The output voltage (Vout) is a voltage drop across SnS2 FET determined by the fraction of the driving voltages (VDD) that depends on the resistance ratio between SnS2 and heterojunction channel. The input voltage-dependent resistance values of both channels are exhibited in Supplementary Fig. 7. For Vin < 10 V, the SnS2 FET has a smaller current path than that of the MoTe2/SnS2 heterojunction channel because of the MoTe2 channel part, leading to “logic 1.” For 15 < Vin < 25 V, SnS2 and heterojunction channels have a constant resistance ratio as shown in Supplementary Fig. 7. This implies the voltage drop across the SnS2 channel is sustained in this region, resulting in the output “logic 1/2”7,58. At high Vin, SnS2 FET is completely turned on, whereas the current passing through the heterojunction is restricted by the large potential barrier, and thus the state “logic 0” is achieved.

Discussion

We fabricated a multilayer n-MoTe2/n-SnS2 isotype heterojunction device. Raman analysis confirmed the electron transfer from MoTe2 to SnS2 side based on Anderson’s rule. The output characteristics of the MoTe2/SnS2 heterojunction clearly exhibited the rectification behavior. From a systematic analysis based on a numerical solution of Poisson’s equation and Simmons approximation, we ascribed the rectification to a potential barrier exceeding ~1 eV, attributed to the large band offsets between the two materials. Unlike the conventional p–n heterostructure operating by diffusion of minority carrier, we confirmed the transport is determined by the majority carriers via thermionic emission and tunneling process through the potential barrier. Furthermore, we certified the switchable rectification characteristic by varying the gate voltage. While the rectification was turned off for the negative Vg, it was enhanced for the positive Vg up to a maximum rectification ratio of ~103 at a modest source–drain voltage of 1 V in ambient environment. This value is comparable with that of other p–n unisotype vdW heterostructure devices reported by previous studies. Finally, we demonstrate the working of the new device by fabricating a ternary inverter using the MoTe2/SnS2 FET and a SnS2 channel transistor. This is the first experimental study reporting a systematical analysis for a MoTe2/SnS2 heterojunction device. The results can be used as guidelines for the optimization and designing of a variety of heterojunction-based customizable electronic or photonic devices.

Methods

Device fabrication

MoTe2/SnS2 heterostructure devices were fabricated by the dry transfer method. MoTe2 and SnS2 were mechanically exfoliated from their commercial bulk forms (HQ graphene, America) using blue tape on PDMS (Gel-Pak, PF-X4–17 mil.) and a highly n-doped (As doped) substrate with a 300-nm-thick SiO2 layer, respectively. The MoTe2 flakes on PDMS were aligned by a transfer system-mounted microscope, and then transferred on to SnS2 flakes. The electrodes were patterned by the electron-beam lithography process, and Ti/Au (20/50 nm) metals were deposited by a thermal evaporator at high vacuum pressure (~106 Torr).

Device characterization

AFM measurement was performed in ambient environment with tapping mode, to confirm the thickness of the flakes. Raman spectroscopic measurements (Renishaw) were carried out at room temperature using a 514-nm laser as the excitation source with <2 mW power. We used a Keithley-4200SCS parameter analyzer to measure the electrical properties of the MoTe2/SnS2 heterojunction device and the ternary inverter.