Gate-switchable rectification in isotype van der Waals heterostructure of multilayer MoTe2/SnS2 with large band offsets

Despite intensive studies on van der Waals heterostructures based on two-dimensional layered materials, isotype vdW heterojunctions, which consist of two different semiconductors with the same majority carrier, have received little attention. We demonstrate an n–n isotype field-effect heterojunction device composed of multilayer moly ditelluride (MoTe2) and tin disulfide (SnS2). The carrier transport flowing through the n-MoTe2/n-SnS2 heterojunction exhibits a clear rectifying behavior exceeding 103, even at a moderate source–drain voltage of 1 V in ambient environment. Owing to the large band offsets between the two materials, a potential barrier exceeding ~1 eV is formed, which is verified by comparing a numerical solution of Poisson’s equation and experimental data. In contrast to the conventional p–n heterostructure operating by diffusion of the minority carrier, we identify the carrier transport is governed by the majority carrier via the thermionic emission and tunneling-mediated process through the potential barrier. Furthermore, the gate voltage can completely turn off the device and even enhance the rectification. A ternary inverter based on the isotype MoTe2/SnS2 heterojunction and a SnS2 channel transistor is demonstrated for potential multivalued logic applications. Our results suggest that the isotype vdW heterojunction will become an able candidate for electronic or optoelectronic devices after suitable band engineering and design optimization.


INTRODUCTION
Van der Waals (vdW) heterostructures based on two-dimensional (2D) layered materials have been extensively studied owing to its enormous combinations of selectable materials and excellent semiconducting properties. These structures have replaced conventional group IV-or III-V-based materials for applications in electronics and related fields [1][2][3][4] . Weak vdW interactions between individual layers and the absence of dangling bonds at the interfaces make it possible to fabricate high-performance devices [5][6][7][8][9] . On the one hand, unisotype vdW heterostructures, namely p-n junction, have only been studied as a building block for diodes or optoelectronic devices with distinct current rectification, gate-tunable polarity behavior, negative differential resistance from the band-to-band tunneling, and photovoltaic effect [10][11][12][13][14][15][16][17][18][19][20][21] . While there are a variety of choices for n-type vdW materials, there are few natural p-type vdW materials such as black phosphorus [10][11][12][13][14][15] and WSe 2 7,16-21 . On the other hand, there are few published research works on isotype vdW heterojunction, in which the transport dominated by the same majority carriers in both components. For optoelectronic device, photodetectors made of isotype vdW heterojunctions with WS 2 and MoS 2 were recently reported 22,23 . One of the reasons why isotype heterojunction is not considered for electronic devices is that it has a smaller expected rectifying response than p-n heterojunctions. However, the lack of natural p-type vdW materials has shifted the focus of researchers toward isotype vdW heterojunctions, especially n-n type, because there are enormous candidate materials.
In this study, an isotype heterojunction device combined with a multilayer moly ditelluride (MoTe 2 ) and tin disulfide (SnS 2 ) is demonstrated. The transistor is fabricated by exfoliating each material and stacking them by the polydimethylpolysiloxane (PDMS) dry transfer method on a Si/SiO 2 (300 nm) substrate (see the details in the Methods section) 24 . The transport properties of individual SnS 2 and MoTe 2 channels were measured. It was confirmed that the conductivity of SnS 2 is n type, regardless of its thickness, and MoTe 2 exhibits n-type behavior for a thick flake. SnS 2 has a large electron affinity (~5.2 eV) and bandgap (~2.2 eV) in the bulk phase 25 , which can form distinct band alignments when combined with other transition metal dichalcogenide (TMD) groups [26][27][28] . MoTe 2 , however, has a smaller electron affinity (~3.8 eV) and smaller bandgap (~0.9 eV) 27 . Therefore, a large band offset and a large built-in potential barrier at the heterojunction between MoTe 2 and SnS 2 is expected to form. In addition, we measured the Raman spectroscopy of the vdW heterojunction and confirmed the electron transfer from MoTe 2 to SnS 2 side according to Anderson's rule.
As a result, the electrical measurement of the MoTe 2 /SnS 2 heterojunction device clearly exhibits rectification. From the systematic analysis of carrier transport, based on a numerical solution of Poisson's equation and Simmons approximation, we ascribe the rectifying behavior to the large band offsets between the two materials, which creates a large potential barrier at the heterojunction. In addition, we certify the switchable rectification characteristic by varying the gate voltage with a maximum rectification ratio of~10 3 , at a modestly low source-drain voltage of 1 V and in ambient environment (room temperature of 300 K). This value is comparable with that of other p-n unisotype vdW heterostructure devices from previous reports 17,23,29,30 . Finally, we demonstrate a ternary inverter using the MoTe 2 /SnS 2 heterojunction and a SnS 2 channel transistor. We emphasize that this is the first experimental study reporting a systematical analysis of the MoTe 2 /SnS 2 heterojunction device.

RESULTS
Device structure and Raman spectrum of the heterojunction Figure 1a shows the microscopic image of the multilayer MoTe 2 / SnS 2 heterojunction device with four Ti/Au electrodes. Figure 1b is the schematic side view of the fabricated device. The four electrodes are used to compare the individual channel and heterojunction channel in a single device, i.e., the electronic properties of MoTe 2 , SnS 2 , and MoTe 2 /SnS 2 heterojunctions can be examined using electrodes E1-E2, E3-E4, and E2-E3, respectively. Figure 1c shows the atomic force microscope (AFM) image for the green dashed box in Fig. 1a. From the topographic image and the respective height profiles (represented by solid black and red lines), the thicknesses of SnS 2 and MoTe 2 are approximately 30 and 70 nm, respectively.
The Raman scattering measurement was performed on different channel areas of the fabricated device. The measured areas were marked with the black (MoTe 2 ), red (SnS 2 ). and green dots (heterojunction) in Fig. 1a, and each Raman spectrum is shown in Fig. 1d, respectively. We used a 514-nm green laser as the excitation source. On the MoTe 2 region (black line), two peaks appear near 171 and 230 cm −1 , corresponding to the respective out-of-plane A 1g and in-plane E 1 2g phonon modes. The bulk inactive B 1 2g phonon mode around 290 cm −1 is not observed in our MoTe 2 thick flake ( Supplementary Fig. 1), which agrees with the previously reported observations [31][32][33] . The spectrum in the SnS 2 region (red line) shows a prominent peak of the A 1g mode at 315 cm −1 and a weaker peak of the E g mode near 206 cm −1 , which are also consistent with previous results 34, 35 . In the heterojunction region (green), the peaks receive contributions from both MoTe 2 and SnS 2 , indicating the existence of two distinct materials. Especially, a significant reduction of the SnS 2 Raman peak intensity was observed due to the thick MoTe 2 flake (~70 nm) placed on the SnS 2 flake. This, in turn, led to the feeble peak of E g that is indistinguishable in the overlapped region. In addition, we observe a redshift of~3 cm −1 in the out-of-plane mode (A 1g ), owing to the phonon softening caused by the electron transfer from MoTe 2 to SnS 2 36 . The electron affinity rule (Anderson's rule) accounts for this electron transfer.
Electrical characteristics and the band alignment Figure 2a, b shows the transfer characteristics of individual MoTe 2 and SnS 2 channel FET with electrodes E1-E2 and E3-E4, respectively. A back-gate voltage (V g ) was applied to the heavily n-doped (As dopants) Si substrate with a resistivity of~0.005 Ω cm. All electronic measurements were carried out under ambient conditions (room temperature of 300 K). The observed linear output curves at different gate voltages for both MoTe 2 and SnS 2 FETs in the inset of Fig. 2a, b suggest the sufficiently low contact resistances between Ti/Au metal electrodes and both materials 37,38 . At the source-drain voltage (V ds ) of 1 V, n-type dominant ambipolar behavior was observed for the bulk MoTe 2 38-41 . We checked the low gate leakage current through SiO 2 -300-nm thick-in tens of picoampere level for whole gate voltage ranges as shown in Supplementary Fig. 2. Specifically, MoTe 2 FET exhibited ambipolar behavior for an intermediate flake and p-type behavior for a thin flake, as shown in Supplementary  Fig. 2. This dependence of change in conductivity on the thickness has been reported in previous studies as well 42,43 . For SnS 2 , a typical n-type unipolar was observed 37,[44][45][46] . It is noteworthy that we achieved sufficiently high on/off ratios (~10 5 ) in both FETs with thick flakes even though they operate in the depletion-mode, i.e., a negative gate voltage for an n-channel transistor is required to turn off the device. Usually, the on/off ratio in a depletion-mode transistor limits the thickness of the channel material, because the gating field weakens gradually, or even entirely lost, as the distance between the gate oxide surface and the channel increases 47 . In other words, a large leakage current flows through the expanding undepleted parts as the channel thickness increases, leading to a poor on/off ratio. In this respect, the high on/off ratio in our devices implies that the carriers in the channel can be fully depleted under the given gate voltage. Especially, a very high on/off ratio reaching 10 7 in the SnS 2 FET was achieved even with a thick flake (~30 nm), as shown in Fig. 2a. This result can be attributed to the larger bandgap of bulk SnS 2 (~2.2 eV) than that of the other TMDs 48 . The small bandgap of bulk MoTe 2 (~0.9 eV) accounts for the relatively high off-state current of MoTe 2 FET. Figure 2c shows the band alignment of the MoTe 2 /SnS 2 heterojunction before and after contact. The conduction band minimum (E c ) and valence band maximum (E v ) values of MoTe 2 (SnS 2 ) were previously reported to be 3.8 eV (5.2 eV) and 4.7 eV (7.4 eV), respectively [26][27][28] . A very large conduction band offset (ΔE c ) and valence band offset (ΔE v ) of approximately 1.4 and 2.7 eV are achieved between MoTe 2 and SnS 2 , respectively, compared with other combinations of 2D materials. Majority carrier concentrations per unit area for the respective channels (electron for both materials) at V g = 0 V are estimated by 16 , Cox V th ÀVg j j q ¼ 2:16 10 12 ð3:59 10 11 Þcm À2 , where q = 1.6 × 10 −19 C and C ox = 1.15 × 10 −8 F/cm 2 is the capacitance per unit area of the 300-nm-thick SiO 2 gate oxide layer. The threshold voltage (V th ) is extracted based on the extrapolation in the linear region method, which finds the gate-voltage axis intercept of the linear extrapolation of transfer curves at the first maximum point of transconductance 49 . The values are −30 and −5 V for MoTe 2 and SnS 2 FET, respectively, as shown in Supplementary Fig. 3. We treated both MoTe 2 and SnS 2 as nondegenerate semiconductors, to simplify the calculations.
Thus, the Fermi level position was estimated using where n * is the number of electrons per unit volume, N c is the effective density of states in the conduction band, k B is the Boltzmann constant (1.38 × 10 −23 J/K), and T is the temperature (300 K, in this case) 50 . Note that the channels in our devices were completely depleted under given gate voltages, which means the number of unit volumes can be simply calculated by dividing the carrier concentration obtained above by the material thickness (t MoTe2 = 70 nm, t SnS2 = 30 nm); n * MoTe2 = 3.07 × 10 17 cm −3 and n * SnS2 = 1.2 × 10 17 cm −3 . N c is equal to 2 2πm Ã kBT From these band structures, the predicted band alignments of the heterojunction when these two materials were in contact were schematically described. The smaller work function of MoTe 2 allows the electrons in the MoTe 2 side to spill over to the SnS 2 side until thermal equilibrium is established, forming a depletion region on the MoTe 2 side and an accumulation region on the SnS 2 side. This phenomenon is consistent with the Raman analysis in Fig. 1e. Thus, band bending occurs at the heterojunction, which yields the built-in potential ϕ Mo and ϕ Sn on the MoTe 2 and SnS 2 sides, respectively. The total built-in potential (V bi ) must be equal to the sum of the potential drops on the two sides (V bi = ϕ Mo + ϕ Sn ). It can be calculated from the work function difference between the two materials (~1.41 eV), since the Fermi level is constant and flat throughout the heterojunction at equilibrium. It is worth mentioning that ours is an isotype heterojunction, which is different from the conventional p-n junction heterostructures 15,17,22 . Therefore, the depletion region width on the MoTe 2 where N d,Mo  1) and (2) can be solved for ϕ Sn , ϕ Mo , and x Mo . Consequently, we obtained ϕ Mo = 1.3 eV, ϕ Sn = 0.11 eV, and x Mo = 68.7 nm, as shown in Fig. 2c. This depletion region width is almost similar with the thickness of MoTe 2 (70 nm), implying that the MoTe 2 layer may be fully depleted after contact with SnS 2 at equilibrium. The barrier height value of 1.31 eV will be used to identify the transport behavior of the junction. We note that the energy band alignment of this device is also similar to that in the previous report, where the band alignment was determined by the combination of X-ray photoemission spectroscopy and ultraviolet photoelectron spectroscopy measurements 28 .
Transport mechanism through the heterojunction To examine the carrier transport through the MoTe 2 /SnS 2 heterojunction at V g = 0 V, a V ds of up to 5 V was applied to the electrode on the MoTe 2 side (E2), and the electrode on SnS 2 (E3) was grounded. The forward (I f ) and backward currents (I b ) are defined as arising when the positive and negative voltages are applied to E2, respectively. As shown in Fig. 3a, the backward current increased rapidly up to a few microamperes with V ds , and the forward current increased only up to a few hundreds of nanoamperes even at high V ds , showing a clear rectifying characteristic. We confirmed the same trend with the other devices, which also exhibited good rectification behavior ( Supplementary Fig. 4). The rectification ratio with different V ds , defined as I b /I f at the same V ds , is illustrated in Fig. 3b. The ratio behaves significantly differently across V ds = 1.35 V. In the small V ds range represented by region (I), the rectification ratio increases until a maximum value of~4 × 10 2 . It then decreases in region (II), where V ds is larger than 1.35 V. This transitional behavior implies our device has two different transport mechanisms. We further investigated the transport of forward current using the Simmons approximation 54 to figure out the rectification behavior and found out two distinctive transport mechanisms can explain our device's transport property 57 . Direct tunneling (DT) and Fowler-Nordheim tunneling (FNT) can be expressed by the following relations: where ϕ is the barrier height, d is the tunneling barrier width, h is the reduced Plank constant, and m * is the effective mass of an electron. With the above equations, we draw the Fowler-Nordheim plot, i.e., ln(I/V 2 ) vs. 1/V plot, as shown in Fig. 3c. This plot clearly shows the transition from a logarithmic regime at small V ds for DT to a linear regime with a negative slope at high V ds for FNT, representing region I (pink) and region II (blue), respectively. The transition voltage (V trans ) of 1.35 V is consistent with the voltage at which RR begins to decrease, indicating that the increased forward current via FNT gave rise to the decrease of the rectification ratio. Moreover, V trans corresponds to ϕ/q, yielding the tunneling barrier height of~1. 35   From these results, the band diagrams of Fig. 3d are used to explain the rectification behavior. Note that only the electron carrier transport is considered because the electron is the majority carrier for both materials. When a negative voltage is applied to the MoTe 2 side (V ds < 0 V), the electron is transferred from the MoTe 2 to the SnS 2 side will face the much lower barrier height or even no barrier at high negative voltages. As a result, the electrons easily contribute to the current by overcoming the potential barrier, even with the small thermal energy via thermionic emission. This results in the rapidly increasing backward current. In contrast, in the range of 0 < V ds < 1.35 V, the electrons in the SnS 2 side confront the built-in potential barrier, whose height is determined from the conduction band offset between MoTe 2 and SnS 2 . This barrier blocks the electron transfer from the SnS 2 side to the MoTe 2 side, so that the current could be achieved purely by direct tunneling through the trapezoidal barrier. This current is lower than the backward current, causing the rectification property. However, for V ds > 1.35 V, the potential barrier becomes narrower, more triangular as shown in Fig. 3d. Consequently, the increased forward current via the FNT reduces the rectification ratio.
Next, we examine the output curves of MoTe 2 /SnS 2 heterojunction at different gate voltages from −80 to 80 V in steps of 20 V, as shown in Fig. 4a. The simple measurement schematic is in the inset of Fig. 4a. The output curves of the heterojunction device illustrate the gate-tunable rectification behavior. The backward current was decreased as V g was changed toward negative values, so that the rectification property became imperceptible. Indeed, the rectification ratio at V ds = 1 V was less than 10 for V g < −20 V, as shown in Fig. 4b. Notably, the ratio reached up to~10 3 in a positive V g range. This value is more than twice the value at V g = 0 V.
To inspect these gate-tunable rectification properties, the corresponding transfer characteristics of the MoTe 2 /SnS 2 heterojunction device are summarized in Fig. 4c. The transfer curve of the heterojunction on the backward current (green open circle) follows a similar trend with that of SnS 2 . The curve on the forward current (green closed circle) also follows that of SnS 2 for V g < −20 V. However, the current variation for V g > −20 V with increasing V g is negligible, yielding consistent gate-tunable rectification properties. From the transfer curves of the MoTe 2 and SnS 2 FET, SnS 2 channel will turn off for V g < −20 V, implying that there are no carriers, and the majority carrier in MoTe 2 will change from electron to hole in the negative gate-voltage range. The relevant band diagram is illustrated in the inset of Fig. 4b. In this band diagram, when the negative V ds is applied to the MoTe 2 side, the current flow of hole carriers from SnS 2 to MoTe 2 would be very low because the SnS 2 channel is depleted. In addition, the majority hole carriers flowing from MoTe 2 to SnS 2 upon application of positive V ds to MoTe 2 face a large potential barrier caused by the large valence band offset ( Supplementary Fig. 5). Consequently, both forward and backward currents are very low for V g < −20 V, suppressing the rectification behavior. In this manner, this device can be viewed as a series connection of MoTe 2 /SnS 2 heterojunction and two resistors of MoTe 2 and SnS 2 , whose resistance values can be adjusted by controlling V g . Note the MoTe 2 /SnS 2 heterojunction has a lateral configuration. The simple equivalent circuit is shown in the inset of Fig. 4c. The transfer curves of a heterojunction device fabricated with a thin MoTe 2 flake was also investigated in Supplementary Fig. 6, indicating the gate dependence was determined by the series Fig. 4 Gate-voltage dependence of the heterojunction device. a Gate dependence of output characteristics of the MoTe 2 /SnS 2 heterojunction in the range −1 to 1 V. The inset shows the schematic for the electrical measurement on the heterojunction. V ds is applied to E2, which is in contact with MoTe 2 , and E3, which is in contact with SnS 2 , is grounded. b Rectification ratio under different gate voltages at V ds = 1 V. The inset represents the band alignment at negative voltages. c Transfer characteristics of the heterojunction at |V ds | = 1 V.  Fig. 5 Application for the ternary inverter. a Schematic of the measurement setup for the ternary inverter. V dd , V out , and V in are applied to E2 on MoTe 2 , E3 on SnS 2 , and the back-gate electrode. E4 is grounded. b An analog circuit diagram. c V out as a function of V in for V dd = 1 V.
connection of the two materials. Based on this analysis, we deduce that the MoTe 2 /SnS 2 heterojunction gives rise to the rectification property only when the resistance values of the parts other than the junction is low enough for the heterojunction to dominate the current flow in the series connection.
Ternary inverter Finally, we applied the MoTe 2 /SnS 2 heterojunction to a multivalued logic device by fabricating a ternary inverter with only two n-type FETs. As illustrated in Fig. 5a, the driving voltage (V dd ) and input voltage (V in ) were applied to the electrode of the MoTe 2 side (E2) and Si back-gate electrode. The end of the electrode of the SnS 2 side (E4) was grounded, and then the output voltage (V out ) on the other electrode in contact with the SnS 2 side (E3) was measured.
This is the integration of MoTe 2 /SnS 2 heterojunction with SnS 2 FETs, which their resistance value can be fully controlled by regulating V in . Figure 5b depicts the equivalent circuit of the ternary inverter. The plot of V in vs. V out in Fig. 5c clearly shows three distinct output voltage regions in the range of 0-60 V at V dd = 1 V, corresponding to the three logical states. The output voltage (V out ) is a voltage drop across SnS 2 FET determined by the fraction of the driving voltages (V DD ) that depends on the resistance ratio between SnS 2 and heterojunction channel. The input voltage-dependent resistance values of both channels are exhibited in Supplementary Fig. 7. For V in < 10 V, the SnS 2 FET has a smaller current path than that of the MoTe 2 /SnS 2 heterojunction channel because of the MoTe 2 channel part, leading to "logic 1." For 15 < V in < 25 V, SnS 2 and heterojunction channels have a constant resistance ratio as shown in Supplementary Fig. 7. This implies the voltage drop across the SnS 2 channel is sustained in this region, resulting in the output "logic 1/2" 7,58 . At high V in , SnS 2 FET is completely turned on, whereas the current passing through the heterojunction is restricted by the large potential barrier, and thus the state "logic 0" is achieved.

DISCUSSION
We fabricated a multilayer n-MoTe 2 /n-SnS 2 isotype heterojunction device. Raman analysis confirmed the electron transfer from MoTe 2 to SnS 2 side based on Anderson's rule. The output characteristics of the MoTe 2 /SnS 2 heterojunction clearly exhibited the rectification behavior. From a systematic analysis based on a numerical solution of Poisson's equation and Simmons approximation, we ascribed the rectification to a potential barrier exceeding~1 eV, attributed to the large band offsets between the two materials. Unlike the conventional p-n heterostructure operating by diffusion of minority carrier, we confirmed the transport is determined by the majority carriers via thermionic emission and tunneling process through the potential barrier. Furthermore, we certified the switchable rectification characteristic by varying the gate voltage. While the rectification was turned off for the negative V g , it was enhanced for the positive V g up to a maximum rectification ratio of~10 3 at a modest source-drain voltage of 1 V in ambient environment. This value is comparable with that of other p-n unisotype vdW heterostructure devices reported by previous studies. Finally, we demonstrate the working of the new device by fabricating a ternary inverter using the MoTe 2 /SnS 2 FET and a SnS 2 channel transistor. This is the first experimental study reporting a systematical analysis for a MoTe 2 / SnS 2 heterojunction device. The results can be used as guidelines for the optimization and designing of a variety of heterojunctionbased customizable electronic or photonic devices.

Device fabrication
MoTe 2 /SnS 2 heterostructure devices were fabricated by the dry transfer method. MoTe 2 and SnS 2 were mechanically exfoliated from their commercial bulk forms (HQ graphene, America) using blue tape on PDMS (Gel-Pak, PF-X4-17 mil.) and a highly n-doped (As doped) substrate with a 300-nm-thick SiO 2 layer, respectively. The MoTe 2 flakes on PDMS were aligned by a transfer system-mounted microscope, and then transferred on to SnS 2 flakes. The electrodes were patterned by the electron-beam lithography process, and Ti/Au (20/50 nm) metals were deposited by a thermal evaporator at high vacuum pressure (~10 6 Torr).
Device characterization AFM measurement was performed in ambient environment with tapping mode, to confirm the thickness of the flakes. Raman spectroscopic measurements (Renishaw) were carried out at room temperature using a 514-nm laser as the excitation source with <2 mW power. We used a Keithley-4200SCS parameter analyzer to measure the electrical properties of the MoTe 2 /SnS 2 heterojunction device and the ternary inverter.