Introduction

During the last decade, AlGaN/GaN heterostructure field-effect transistors (HFETs) have been extensively developed in the area of RF power electronics due to their high electron mobility and high breakdown electric field1,2,3. Device linearity is a crucial requirement for power amplifiers in wireless base stations, satellite communications, and radar applications. Linear distortion, which has hindered maximizing the advantages of AlGaN/GaN HFETs, has most recently been attracting extensive attention, given the increasingly thorough and widespread application of AlGaN/GaN HFETs in power amplifiers4,5,6,7.

Polarization Coulomb field (PCF) scattering, caused by the non-uniform distribution of the polarization charges at the AlGaN/GaN interface, is a particular scattering mechanism in AlGaN/GaN HFETs8,9,10. PCF scattering has been found to be capable of affecting the parasitic source access resistance and the device transconductance10,11, which are relevant to the device linearity. However, sufficient evidence of the effect of PCF scattering on device linearity is lacking in both experiments and theoretical studies. Previous studies have reported that PCF scattering can be changed by the material component and device structure9,10. This means that studying the effect of PCF scattering on device linearity may contribute to improving the linearity at the device level.

In this research, two types of AlGaN/GaN HFETs with different gate widths were fabricated. Then, the single-tone power was measured for the two samples. By analyzing the gain and input power at the 1-dB compression point, the effect of PCF scattering on the device linearity was explored.

Results and Discussion

The on-wafer RF power performances were tested by using a single-tone continuous-wave signal at 2.7 GHz. At a drain voltage of 20 V, the device matching was optimized for the maximum output power. The gate biases were chosen as −2 V, −1.5 V, −1 V, and −0.5 V, respectively. The match condition was correlated with the device structure and the chosen direct current quiescent points (DCQPs). Therefore, the detailed match parameters under different DCQPs were different for two samples, as shown in Table 1. Here, ΓS and ΓL refer to the source matching point and the load matching point, respectively. Figure 1 shows the output power (POUT), gain (GT), and power added efficiency (PAE) as a function of the input power (PIN) for the two samples. The GT variation range for Sample 2 is obviously smaller than that for Sample 1. A flatter gain curve implies better device linearity. This means that Sample 2, which has a larger gate width, has better linearity. To further compare the linearity between the two samples, the input power at the 1-dB compression point PIN-1dB was extracted from Fig. 1, as shown in Table 1. The difference in PIN-1dB between the two samples can be written as

$${\rm{\Delta }}=\frac{{P}_{\mathrm{IN} \mbox{-} 1{\rm{dB}}}({\rm{Sample}}\,2)-{P}_{\mathrm{IN} \mbox{-} 1{\rm{dB}}}({\rm{Sample}}\,1)}{{P}_{\mathrm{IN} \mbox{-} 1{\rm{dB}}}({\rm{Sample}}\,1)}\times 100 \% .$$
(1)
Table 1 The detailed match parameters and the input power at 1-dB compression point PIN-1dB under different DCQPs for two samples.
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Figure 1
figure 1

The output power POUT, gain GT, and power added efficiency PAE as a function of the input power PIN for the two samples with VDS = 20 V at gate-source voltages of (a) −2 V, (b) −1.5 V, (c) −1 V, and (d) −0.5 V, respectively.

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Under every fixed gate bias, the PIN-1dB for Sample 2 is significantly larger than that for Sample 1; Δ is at least 38.71% and can reach up to 148.37% (at VGS = −1 V).

The linearity in power amplification is well known to be a complex phenomenon. The charge trapping in the surface state, gate-drain capacitance, self-heating effect, device transconductance, and parasitic source access resistance can affect the device linearity7,10,12,13,14,15,16. Because both samples were fabricated on the same material and with the same device technology, the charge trapping in the surface state and the gate-drain capacitance should be the same. The DC current-voltage (I-V) characteristics and the transfer characteristics were measured for the two samples, as shown in Fig. 2. The currents are almost the same for the two samples; therefore, the influence of the self-heating effect on the linearity of the two samples should be consistent. Because of the polarization Coulomb field scattering, the gate width can affect the parasitic source access resistance (RS) and transconductance (gm) under the unit gate width17. Because the ohmic contact resistance RC (in the normalized unit “Ω·mm”) is constant, RS here is exclusive of RC and refers only to the gate-source channel resistance. Considering that both samples have the same device size, except for their different gate widths, the intrinsic transconductance (gm0) under the unit gate width for the two samples should be the same. An analysis of the expression gm = 1/(1/gm0 + RS + RC) indicates that the RS variation can affect gm, and then influence the gain and the device linearity7,10. Therefore, the improved linearity can be explained by considering the variation of RS.

Figure 2
figure 2

(a) The DC I-V characteristics and (b) the transfer characteristics for the two samples.

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RS is determined by the scattering mechanisms in the gate-source channel. The main scattering mechanisms in the gate-source channel include polar optical phonon (POP), deformation potential (DP), piezoelectric (PE), interface roughness (IFR), dislocation (DIS), and polarization Coulomb field (PCF) scatterings. Among these, the two major mechanisms are POP and PCF scatterings, which can be changed with the increase of the gate voltage.

When the electron drift velocity is sufficiently increased, the POP and electron temperatures start to increase; the POP scattering is enhanced with the increase of the electron temperature, inducing an increase in RS10. For a clearer presentation, the POP scattering and the electron temperature as a function of VGS at VDS = 20 V can be calculated. Initially, the electron drift velocity ve in the gate-source channel can be obtained from the I-V characteristic by applying IDS = n2D∙q∙ve. With the obtained ve, the electric field EGS in the gate-source channel can be determined by the dependence of the electron drift velocity on the electric field18. Then, the dissipated power per electron UIDS/N e in the gate-source channel can be calculated, as shown in Fig. 3(a). Here, U = EGS∙LGS is the voltage applied along the gate-source channel, LGS is the gate-source distance, and N e  = n2D∙LGS∙WG is the number of electrons in the gate-source channel. Finally, based on the relationship between the electron temperature and the dissipated power per electron18, the electron temperature Te can be obtained, as shown in Fig. 3(b). As the gate bias is increased, the electron temperature is increased, and it remains at almost the same value for the two samples. This means that the influence of self-effect on RS is the same for the two samples17. The RS determined by the POP scattering \({R}_{{\rm{S}}}^{{\rm{POP}}}\) can be calculated as follows9

$${R}_{{\rm{S}}}^{{\rm{POP}}}=\frac{{L}_{{\rm{GS}}}}{{n}_{2{\rm{D}}}q{\mu }_{{\rm{POP}}}}=\frac{{L}_{{\rm{GS}}}{m}^{\ast }}{{n}_{2{\rm{D}}}{q}^{2}}\cdot \frac{1}{{\tau }_{{\rm{POP}}}}=\frac{{L}_{{\rm{GS}}}{m}^{\ast }}{{n}_{2{\rm{D}}}{q}^{2}}\cdot \frac{{e}^{2}{\omega }_{{\rm{POP}}}{m}^{\ast }{N}_{{\rm{B}}}({T}_{{\rm{e}}})G({k}_{0})}{2{\varepsilon }^{\ast }{k}_{0}{\hslash }^{2}{P}_{{\rm{POP}}}(y)},$$
(2)

where m* is the electron effective mass in GaN, ɛ* = ɛ0/(1/ɛh − 1/ɛs), ɛ0 is the vacuum dielectric permittivity, ɛh is the high-frequency dielectric constant of GaN, ɛs is the static dielectric constant of GaN, y = πћ2n2D/m*kBTe, kB is the Boltzmann constant, ћωPOP is the POP energy, k0 = (2 m*(ћωPOP)/ћ2)1/2 is the POP wave vector, NB(T e ) = 1/exp(ћωPOP/kBTe) − 1 is the Bose-Einstein function, G(k0) = b(8b2 + 9k0b + 3k02)/(8(k0 + b)3) and PPOP(y) = 1 + (1 + e−y)/y. As shown in Fig. 4(a), when the gate voltage is more than −2.5 V, the increased POP scattering causes RS to increase as the gate voltage is increased.

Figure 3
figure 3

(a) The dissipated power per electron UIDS/N e and (b) the electron temperature Te in the gate-source channel as a function of the gate-source voltage for the two samples.

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Figure 4
figure 4

The RS determined by (a) the polar optical phonon scattering \({R}_{{\rm{S}}}^{{\rm{POP}}}\) and (b) the polarization Coulomb field scattering \({R}_{{\rm{S}}}^{{\rm{PCF}}}\).

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PCF scattering originates from the non-uniform distribution of the polarization charges at the AlGaN/GaN interface8,9,10. Before the device processing or without the gate bias, the polarization charges at the AlGaN/GaN interface are uniform. On one hand, to form the ohmic contacts, Ti/Al/Ni/Au was deposited and then rapidly thermally annealed at 850 °C. During the annealing process, the ohmic contact metal atoms can diffuse into the AlGaN barrier layer and change the barrier layer strain9,19. On the other hand, because of the converse piezoelectric effect, the gate bias can also change the strain of the AlGaN barrier layer under the gate region9,20. The strain variation of the AlGaN barrier layer causes the variation of the polarization charges. Then, the distribution of the polarization charges becomes non-uniform. Compared with the uniformly distributed polarization charges, the non-uniformly distributed ones can generate an additional scattering potential, which can scatter the channel electrons. The additional polarization charges are defined as the difference between the non-uniformly distributed polarization charges and the uniformly distributed ones. After the device processing, the additional polarization charges near the ohmic contact area do not change, and their influence on the PCF scattering is constant. The additional polarization charge ∆σ under the gate region can be calculated as10,20:

$${\rm{\Delta }}{\sigma }{=}\frac{{e}_{33}^{2}}{{C}_{33}}\cdot \frac{{V}_{\text{GS}}-{V}_{{\rm{ch}}}}{{d}_{{\rm{AlGaN}}}},$$
(3)

where e33 is the piezoelectric coefficient, C33 is the elastic stiffness tensor of AlGaN, Vch is the potential in the channel, and dAlGaN is the thickness of the AlGaN barrier layer. As shown in (3), ∆σ is relevant to VGS. The larger ∆σ is, the stronger the PCF scattering. As VGS is increased, ∆σ decreases and the PCF scattering weakens. The PCF scattering is stronger in the sample with a larger width17. Therefore, under the same gate voltage, Sample 2 has a larger PCF scattering than Sample 1. The RS determined by the PCF scattering \({R}_{{\rm{S}}}^{{\rm{PCF}}}\) can be obtained11, as shown in Fig. 4(b). \({R}_{{\rm{S}}}^{{\rm{PCF}}}\) clearly shows a monotonic decline as the gate bias is increased. Because Sample 2, which has a larger width, has a stronger PCF scattering, its \({R}_{{\rm{S}}}^{{\rm{PCF}}}\) is larger compared with Sample 1.

As the gate bias is increased, the POP scattering is increased and the PCF scattering is decreased; together, these determine the variation of RS. The decreased PCF scattering can effectively offset the increased POP scattering, decrease the variation of RS, and then improve the linearity. This causes Sample 2, which has a larger PCF scattering, to have better linearity. The RS values for different scattering mechanisms were calculated11,21, as shown in Fig. 5(a) and (b). The POP, DP, and PE scatterings are enhanced with the increased gate bias, leading to the increase in RS. Among these three mechanisms, POP scattering is the major one. Conversely, PCF scattering is the only mechanism that is decreased with the increased gate bias. The decreased PCF scattering can offset the increased scatterings, causing the RS value to have a small variation. For a clear comparison, Fig. 5(c) shows the total RS for the two samples. As shown in Fig. 2(b), the threshold voltage for the two samples is −2.5 V, therefore the VGS in the range of −2.5 V to 2 V is effective. During the effective gate bias range, the RS for Sample 2 is flatter than that for Sample 1, which means that Sample 2 has a smaller RS variation. Based on gm = 1/(1/gm0 + RS + RC), a smaller RS variation implies a smaller gm variation and better device linearity. Hence, Sample 2 shows better linearity.

Figure 5
figure 5

(a) The RS determined by the polar optical phonon scattering \({R}_{{\rm{S}}}^{{\rm{POP}}}\), polarization Coulomb field scattering \({R}_{{\rm{S}}}^{{\rm{PCF}}}\), deformation potential scattering \({R}_{{\rm{S}}}^{{\rm{DP}}}\), piezoelectric scattering \({R}_{{\rm{S}}}^{{\rm{PE}}}\), interface roughness scattering \({R}_{{\rm{S}}}^{{\rm{IFR}}}\), and dislocation scattering \({R}_{{\rm{S}}}^{{\rm{DIS}}}\); the total gate-source resistance values RS (total) for (a) Sample 1 and (b) Sample 2, and (c) the total gate-source resistance values RS (total) as a function of the gate-source voltage for the two samples.

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In addition, when the gate bias is more negative, the PCF scattering is stronger than the POP scattering, and RS is decreased with the increased gate bias. As the gate bias is increased, the POP scattering is rapidly increased with the increase of the electron temperature. When VGS = −1 V was chosen as the DCQP, the offset effect between the PCF and the POP scattering was the most suitable for the power output. Therefore, when VGS = −1 V, the offset range for POP and PCF scattering is the largest, and the improvement in linearity is most apparent (corresponding to Δ = 148.37%). This further confirmed that PCF scattering exerts a vital influence on the device linearity by affecting RS.

Conclusion

The single-tone power of the AlGaN/GaN HFETs with different gate widths was measured, and the improvement in linearity was determined. The results indicate that PCF scattering can offset the increased POP scattering as the gate bias is increased, as well as enhance the linearity of the devices. Thus, the approach is effective in improving the device linearity of AlGaN/GaN HFETs.

Methods

Sample fabrication

The AlGaN/GaN heterostructure was grown by molecular beam epitaxy (MBE). The epitaxial structure was grown on a sapphire substrate consisting of, from the bottom to the top, a 40-nm-thick AlN buffer layer, a 2-μm-thick GaN channel layer, a 1-nm-thick AlN interlayer, and a 20-nm-thick Al0.2Ga0.8N barrier layer. The Hall measurement yielded a two-dimensional electron gas (2DEG) sheet electron density (n2D) of 8 × 1012 cm−2 and an electron mobility (μ) of 2000 cm2/V∙s at room temperature. The device fabrication started with mesa isolation, which was formed by inductively coupled plasma reactive ion etching (ICP-RIE) with the use of a BCl3/Cl2 gas mixture. Ti/Al/Ni/Au (300/1500/500/600 Å) was evaporated and annealed at 850 °C for 30 s in nitrogen atmosphere to form the drain and source ohmic contacts. The space between the drain and source ohmic contacts was 6 μm. Transmission-line matrix measurements showed that the specific contact resistivity of the ohmic contacts was 2 × 10−5 Ω·cm2. Ni/Au (600/2000 Å) two-finger gate with 1-μm gate length (LG) was fabricated and located in the middle of the drain and source ohmic contacts. Finally, the devices were passivated by using a 100-nm-thick SiN layer deposited by PECVD. Devices with gate width (WG) of 546 μm (2 × 273 μm) and 780 μm (2 × 390 μm) were marked as Samples 1 and 2, respectively.

Measurements

The on–wafer RF power performance of uncooled devices were tested by using a Maury load-pull system. The I-V characteristics were measured with the use of an Agilent B1500A semiconductor parameter analyzer.