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Superconducting quantum circuits at the surface code threshold for fault tolerance


A quantum computer can solve hard problems, such as prime factoring1,2, database searching3,4 and quantum simulation5, at the cost of needing to protect fragile quantum states from error. Quantum error correction6 provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing7 is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger–Horne–Zeilinger state8,9 using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits.

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Figure 1: Architecture.
Figure 2: Single-qubit randomized benchmarking.
Figure 3: Controlled-phase gate physics and randomized benchmarking results.
Figure 4: Quantum state tomography and generation of the GHZ states.


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We thank F. Wilhelm, D. Egger, and J. Baselmans for discussions. We are indebted to E. Lucero for photography of the device. This work was supported by the Office of the Director of National Intelligence (ODNI), Intelligence Advanced Research Projects Activity (IARPA), through the Army Research Office grants W911NF-09-1-0375 and W911NF-10-1-0334. All statements of fact, opinion or conclusions contained herein are those of the authors and should not be construed as representing the official views or policies of IARPA, the ODNI or the US Government. Devices were made at the UC Santa Barbara Nanofabrication Facility, a part of the US NSF-funded National Nanotechnology Infrastructure Network, and at the NanoStructures Cleanroom Facility.

Author information




R.B. and J.K. designed the sample, performed the experiment and analysed the data. J.K., A.M. and R.B. fabricated the sample. R.B., J.K., J.M.M. and A.N.C. co-wrote the manuscript. A.V. and A.N.K. provided assistance with randomized benchmarking. A.G.F. verified the experimental gate fidelities to be at the surface code threshold. All authors contributed to the fabrication process, experimental set-up and manuscript preparation.

Corresponding authors

Correspondence to R. Barends or John M. Martinis.

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The authors declare no competing financial interests.

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Barends, R., Kelly, J., Megrant, A. et al. Superconducting quantum circuits at the surface code threshold for fault tolerance. Nature 508, 500–503 (2014).

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