Introduction

The abacus is a simple, yet powerful, decimal storage medium that serves as memory for performing computations quickly. In a Chinese abacus a divider separates two and five beads on the upper and lower section of every column, respectively. Moving a bead towards the divider makes the bead count, giving one count per bead from the lower section and five counts for every bead from the upper section. Each column represents a digit in the decimal system. The abacus is used as a counting frame for addition and subtraction, or for more complex operations such as multiplication and division. Although it has mostly been replaced by calculators, the concept of an abacus suggests significant merits in the field of spintronics1,2,3.

Future spintronic devices hold the promise of highly integrated ultrafast memory and logic applications. Therefore, packing memory units into the third dimension4,5,6, realising direct spin-information communication7 and developing a universal logic gate8,9,10 are key challenges for next generation spintronic devices. The concept of an abacus enables the combination of all three of these key merits: First, each column serves as one multivalued three-dimensional memory unit. Second, computations are implemented in a straightforward manner by storing the superposition of two digits as the result of the computation, i.e., direct computation. Finally, each column also serves as both memory and universal logic11, thereby reducing the size and energy requirements of an abacus-based device. One can envisage a powerful memory device by considering electron spins or magnetic moments as abacus beads. Here, we demonstrate a room-temperature spintronic version of the abacus system which functions as a stackable multilevel memory device.

Results

The concept of second quantisation of memory

In the context of spintronic memory, a single bit is conveniently assigned to a magnetic state which can either be ‘0’ or ‘1’ (denoted as |0〉 or |1〉 here). The basic concept of building up a three-dimensional storage system is to physically merge a number of bits into a single memory unit. Consequently, the state of the unit is described by an ordered set of states in a single bit ‘basis’, i.e., {|b〉1, |b〉2, …, |b〉N} for an N bit system, where |b〉i is the binary state (|0〉 or |1〉) of the ith bit. Previously proposed 3D memory schemes6,12,13,14,15 are based on this idea and can be summarised as shown in Fig. 1a, in which four memory units are shown. Each unit has N = 4 bits and each bit has two magnetisation states, encoded by |0〉 for magnetisation-down and |1〉 for up. Therefore, the four units, from left to right, are in the distinctly states |1, 0, 0, 0〉, |0, 1, 0, 0〉, |0, 0, 1, 0〉 and |0, 0, 0, 1〉, respectively.

Figure 1
figure 1

Illustration of the magnetic abacus memory concept.

(a) Generic concept for magnetic 3D memory. Typically several magnetic units are stacked on top of each other, where each unit stores one bit of information. In a conventional scheme, the magnetisation state of a unit depends on the sequence of bits in the stack, i.e., |1000〉, …, |0001〉 going from left to right in the example shown. However, if the layers are treated as indistinguishable, the state of the stack is adequately described by only counting the number of spin-up layers. In this way, all four states shown in (a) have the same logic value of ‘1’. (b–f) illustrate the five logic states a four-layer stack can store: |0〉, |1〉, |2〉, |3〉 and |4〉, respectively. This counting scheme is analogous to the beads in an abacus, as shown for comparison.

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Experimental prototypes of such memory concepts include racetrack memory6 in nanowires, as well as the 3D-stacked thin film version, so-called ratchet memory12. However, reading information out of the stack remains problematic. As measuring the magnetoresistance16 of the entire stack cannot resolve the ordered single-bit states, one has to locally access each individual bit. Thus a shift-register-like mechanism has to be carefully designed to move the data array for reading. In the racetrack scheme, high current densities are required to move the entire set of domains homogeneously via spin-transfer torque. Apart from the energy consumption, read-out times are also a concern, as the desired bit has to be positioned under the read component. Further, the scheme is asymmetric, meaning that the read-out times vary depending on the position of the bit and can't be directly clocked. Ratchet memory suffers similar challenges when moving the data and is further limited by the fact that the read-out operation erases the memory and renders the device volatile.

The performance of 3D memory can be significantly improved by adopting the abacus's unique storage approach. The lower column of the abacus can be characterised by the fact that it consists of N = 5 indistinguishable binary beads and each bead can either be at the or away from the divider. The encoding of information in the memory unit does not bother about the state of a single bead, but simply counts the number of beads in the up-state. This notion of indistinguishable particles resembles ‘second quantisation’ of memory in that only the ‘occupation number’ of a memory element is counted. For a stacked spintronic memory containing N single-bits, a new representation of |m1, m0〉 can be formulated, in which m1 counts the number of the ‘1’-bits and m0 = N − m1, counts the ‘0’s. Therefore, all four units in Fig. 1a are represented as |1, 3〉, or simply |1〉 to note the number of spin-up and are statistically equivalent. Consequently, such a four-layer stack can store five distinct physical states, as shown in Fig. 1c–e. This new recoding approach allows for direct read-out by measuring the total extraordinary Hall effect (EHE)17 without spatially moving the data array, thus offering a solution to the fundamental issue of shift-register-like 3D memories. As the EHE is an analogue probe of the magnetisation in ferromagnetic systems13,18, the statistics of the magnetisation configuration in the stacked multilayer can be directly probed via the EHE. In the case that each magnetic layer contributes an equal amount to the overall Hall signal, evenly spaced Hall states are achieved (‘artificial quantum Hall effect’) and it is able to resolve the encoded magnetic state in a straight-forward manner.

N = 2 magnetic abacus

We first demonstrate the simplest magnetic abacus (MA) system which only consists of two binary ‘beads’. The N = 2 MA shares the similar structure with an extraordinary Hall balance (EHB)13. The EHB is proposed as a nonvolatile magnetic memory device that harnesses the EHE as the read-out approach, instead of measuring the magnetoresistance as in conventional magnetic tunnel junctions (MTJs). The material structure of the N = 2 MA also consists of two magnetic layers (labelled FM1 and FM2) with perpendicular magnetic anisotropy4 and large spin-orbit coupling (for pronounced EHE), separated by a non-magnetic insulating layer (similar to the structure shown in Fig. 3b). The stacked layers are then patterned into a Hall cross, which is contacted from the side by a common electrode, making the layers electrically parallel.

Figure 2
figure 2

Illustration of the unbiased extraordinary Hall balance (EHB) as an N = 2 magnetic abacus.

The Hall voltage is measured across the structure by applying a perpendicular magnetic field and forcing the current along the Hall cross structure (as illustrated in Fig. 3b). The EHB consists of a stack of two magnetic layers with perpendicular anisotropy, which are separated by an insulating layer. Electrical side contacts bridge across the entire layer stack, as in the conventional current-in-plane geometry. (a) shows the Hall resistance as a function of applied field for an optimised unbiased EHB. The ‘quantised’ memory states |0, 0〉, |0, 1〉, |1, 0〉 and |1, 1〉 can be relabelled using the second-quantisation notion as |0〉, |1〉 and |2〉. (b–e) illustrate the function of the unbiased EHB: depending on the magnetisation direction of the two bits, electrons of a particular spin orientation are preferably scattered to the left- or the right-hand side. If both bits are magnetised in the same direction (|0, 0〉 or |1, 1〉), the spin-dependent scattering mechanism gives rise to a large (negative or positive) Hall voltage. If the layers are oppositely magnetised (|0, 1〉 or |1, 0〉), there is a balance between the scattered carriers in the two layers and a low (or zero) Hall resistance is obtained.

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Figure 3
figure 3

Magnetic abacus architecture.

(a) The multilevel memory device consists of a stack of magnetic layers ([Co(0.4)/Pt(1.2)]3 multilayers (thicknesses in nm), denoted as [Co/Pt] for brevity), separated by insulating NiO with linearly increasing thickness. This spacer layer thickness gradient (here from 1 to 4 nm) allows for a tuning of the coercivities of the magnetic storage layer and thus for their individual manipulation. (b) The device is patterned into a Hall cross and Cu side contacts are attached for applying the longitudinal current and for measuring the Hall voltage (see Methods).

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The standard EHB device can be used as a binary memory cell, similar to an MTJ, where one of the layers is the data storage medium (state |0〉 or |1〉), while the other layer is magnetically biased and acts as a fixed reference layer (set as |1〉). On the other hand, the N = 2 MA can be regarded as an ‘unbiased EHB’, which gives access to all four magnetisation states and allows the introduction of the concept of ‘second memory quantisation’ (SMQ). The two magnetic layers (Co/Pt multilayer stacks, denoted as [Co/Pt]) were optimised (for details see Supplementary Material) such that both layers contribute an equal amount to the EHE signal, while having distinctly different coercivities. This way, one can achieve ‘quantised’ Hall states corresponding to the different magnetisation configurations of the system: |0, 0〉 (Fig. 2b), |0, 1〉 (Fig. 2c), |1, 0〉 (Fig. 2d) and |1, 1〉 (Fig. 2e). As |0, 1〉 and |1, 0〉 were designed to have the same Hall voltage and therefore represent the same spin-up count, a ‘second quantisation’ is possible. The new SMQ states |0〉, |1〉 and |2〉 are shown below.

Nontrivial N = 4 magnetic abacus

The full capability of the magnetic abacus becomes apparent when scaling up the number of ‘beads’ N. A experimental N = 4 prototype magnetic abacus is presented in Fig. 3. The four [Co/Pt] units can be easily stacked by magnetically decoupling them using insulating NiO interlayers, as shown in Fig. 3a. Through SMQ, the memory state of the entire unit is dependent only upon the number of spin-up (or spin-down) layers and can be electrically accessed by the ‘quantised’ magnitude of the EHE signal, as shown in Fig. 4a. The five possible states (|0〉, |1〉, |2〉, |3〉 and |4〉) can be achieved by ‘creation’ and ‘annihilation’ operations via external magnetic fields (pulses) or spin torque transfer19, analogously to the manipulation of the beads in an abacus. To achieve this behaviour, the four [Co/Pt] bits have to show linearly increasing coercivities, which is realised by introducing the space layers NiO with increasing thicknesses.

Figure 4
figure 4

Demonstration of a quinternary magnetic abacus system.

(a) Experimental Hall loop of a four-layer abacus, which shows discrete Hall levels corresponding to the magnetisation switching of the [Co/Pt] layers. A bias voltage (about 110 mV in this case) was applied to shift the lowest Hall voltage to 0 V. The abacus is first initialised to its ground state by switching all layer magnetisations to point down [as shown in (b)]. Then, the memory is written (as |0〉, |1〉, |2〉, |3〉 or |4〉) by applying an integer multiple of magnetic field or spin transfer torque required to switch a single layer. After reducing the applied field, the system stays in the chosen memory state (indicated by a red dot). To read out the quinternary information stored in the stack, the discrete Hall voltage is measured and directly associated with a memory state as shown on the right. (b) Behaviour of a fully optimised quinternary magnetic abacus system.

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Read-out approach

The read-out approach using a Hall cross is illustrated in Fig. 3b. The current (typically 1 mA in our experiments) is applied longitudinally along the long axis of the cross and the external field perpendicular to the film to implement creation and annihilation operations. To demonstrate our device concept, four-layer-stack samples were grown by UHV magnetron sputtering. The Hall voltage as a function of applied magnetic field is shown in Fig. 4a. Five discrete Hall states are obtained under different fields, corresponding to the five magnetisation configurations shown in Fig. 1b–f, respectively. A transverse voltage of −115 μV has been applied to shift the entire Hall loop, setting the |0000〉 (or |0〉) Hall state to around 0 μV. The ‘second quantisation’ of the spin configuration in the stack gives rise to five memory states as labelled in the figure.

By optimizing the materials parameters the device will show a Hall loop where both Hall states (read-out) and coercivities (switching) are evenly spaced, as illustrated in Fig. 4b. For instance, the |0〉, |1〉, |2〉, |3〉 and |4〉 states will have Hall voltages of 0 μV, 50 μV, 100 μV, 150 μV and 200 μV, respectively. By defining discrete Hall voltage steps of 50 μV, the memory stored in the stack can be simply read out by |n〉 = UHall/50 μV.

Writing approach

As a prototype device, here we simply demonstrate the writing mechanism by an Oersted field. The optimised structure will have coercivities of 125 Oe, 250 Oe, 375 Oe and 500 Oe for the four magnetic layers respectively. Therefore, the ‘annihilation’ operation is implemented by applying a field of −500 Oe thereby switching the magnetisation in all layers down. The layers are addressed by applying an integer multiple of 125 Oe to the stack. For instance, starting from |0〉, 250 Oe (2 × 125 Oe) field will switch two magnetic layers up (i.e., |2〉), while 500 Oe will switch all four layers (moving four ‘beads’ up in abacus terms). Thus writing is achieved in two steps, first by initializing the stack (annihilation), followed writing in the desired state (creation). It should be noted that after removing the applied magnetic field, the abacus memory remains in the set state as indicated by red dots in Fig. 4, keeping the memory nonvolatile.

Discussion

With the MA system we introduced stackable memory with multilevel states, allowing for three-dimensional, nonvolatile memory integration. The magnetic properties of the [Co/Pt] multilayers which form the individual bits can be conveniently tailored, allowing for easy device scaling. Most importantly, there is no fundamental limit to the number of units N in a MA stack and in fact, the total response is scaling linearly with the number of units. Direct access to the data through measurement of the extraordinary Hall voltage provides much better read performance than current 3D memory proposals. The discrete Hall states suggest direct translation between spin information and electrical signals (and vice versa), thereby, in principle, enabling complex logic operations via direct communication between the stacks.

It has to be stressed that the MA concept is not limited to Oersted field-based writing schemes. The basic layout is compatible with spin torque transfer (STT) writing using a perpendicular current. If a current is driven perpendicularly through the multilayer structure, spin torque of varying strength is exerted on each of the individual ferromagnetic layers as result of the transmitted and reflected electrons both carrying angular momentum20. Further, the layers can be engineered to exhibit different effective coercivities. Therefore, the ‘annihilation’ operation can be implemented by applying a DC from the top layer (smaller coercivity) through the stack to the bottom layer (larger coercivity), thereby switching all the |1〉 cells into |0〉 states. The ‘creation’ operation can be realised by reversing the current direction, which will flip the cells from the |0〉 to the |1〉 state. The number of the |1〉 cells that are to be ‘created’ depends on the amplitude of the applied current. As a result of the employed insulating space layers, the applied voltage for STT writing will become very large. Therefore, a further improvement will be to replace the insulating NiO layers by conductive, non-magnetic layers, as has been realised by Sbiaa et al. This will not alter the fundamental properties of MA, yet enable an energetically less costly writing scheme. It should be noted that the STT mechanism in the MA system is more complex than in a conventional MTJ as transmission and reflection of the charge carriers occurs at all interfaces of the multilayered structure, thus requiring more in-depth theoretical and experimental investigations.

Finally, we would like to point out that as the number of units is getting very large, the coercive field required to switch all units may become too large to be practical. Further work will be concentrated on optimising the materials parameters in order to increase the number of bits in an individual stack, implementing STT-based writing and the fabrication of a spin abacus system with several communicating cells.

Methods

Thin film growth

The stacked-layer thin films were grown by UHV magnetron sputtering. The base pressure of the chamber was below 10−8 Torr. During sputtering, typical Ar partial pressures of 4 mTorr were used for Co, Pt and NiO sputtering. Typical sputtering rates were 0.071 nm/s for Co and 0.068 nm/s for Pt (both DC sputtering) and 0.034 nm/s for NiO (RF sputtering). The binary memory unit has the structure recipe of: [Co(0.4)/Pt(1.2)]3 (in nm), denoted as [Co/Pt] all through the text.

Device fabrication

The as-grown samples were then patterned into Hall structures with a length of 60 μm and a width of 20 μm using photolithography followed by reactive ion etching. The deposition and patterning of Cu contacts was the final fabrication step, with wire bonding performed prior to the measurement. Typical driving currents were 1 mA. The reported magnetic properties and transport measurements were all performed at room-temperature.

Oscillatory interlayer exchange coupling

Ferromagnetic layers separated by a non-magnetic spacer display oscillatory interlayer exchange coupling between the FM layers21. The coupling type switches between FM and AFM as a function of spacer thickness (as shown in the Supplementary Figure S2). Based on this effect, the EHB can be optimized to show symmetric three-state behaviour, which is suitable for complex logic operations. By carefully tuning the structure, the net EHE in the antiparallelly aligned state can be lowered down to zero while maintaining a well-defined AFM coupling (see Fig. 3b).