IEEE Int. Solid-State Circuits Conf. https://doi.org/10.1109/ISSCC.2018.8310327 (2018)

The upcoming deployment of 5G wireless technology and the development of the Internet of Things (IoT) brings the need for small-scale, high-performance gigahertz domain transceivers, setting new challenges for circuit designers. Transceivers typically use timing references that reside outside of integrated circuits (ICs), requiring additional circuitry to distribute and boost the signal frequency, which costs power and system real estate. To circumvent these issues, microelectromechanical (MEMS) resonators can be monolithically integrated on ICs to provide timing references. However, this often requires several fabrication steps in addition to the underling IC creation.

Dana Weinstein and colleagues at Purdue University, Massachusetts Institute of Technology and GlobalFoundries have now developed an alternative approach that utilizes the three-dimensional structure of FinFET transistors — the core component of modern ICs — and confines the entire fabrication processes to within the core IC stack. The researchers use electrostatic gating to generate acoustic vibrations in the 3D transistor channels, which can then be detected as changes in the transistor channel current. With the help of metal reflectors to carefully confine multiple transistors within a resonant cavity, they are able to get the whole system to resonate at 32 GHz, with a Q-factor of 49,000 — performance that is better than current MEMS approaches and with a circuit footprint of less than one square micrometre.