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A reconfigurable transistor and memory based on a two-dimensional heterostructure and photoinduced trapping

Abstract

Reconfigurable field-effect transistors (FETs) combine unipolar n- and p-type characteristics in a single programmable device and could be used to reduce the complexity of electronic devices. However, current reconfigurable FETs require a constant voltage supply to achieve polarity conversion, leading to high power consumption. Here we report a reconfigurable FET that is based on a hexagonal boron nitride/rhenium diselenide/hexagonal boron nitride (hBN/ReSe2/hBN) heterostructure and has a nonvolatile and tunable polarity. A photoinduced trapping mechanism is used to drive photoexcited holes or electrons into the interface between the hBN and the silicon dioxide substrate. The reconfigurable FET can switch between a transistor and memory mode, and several FETs can be used to create inverter, AND, OR, NAND, NOR, XOR and XNOR circuits. We also show that, when in memory-mode operation, the devices can be used to emulate synaptic functions for neuromorphic computing systems.

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Fig. 1: Device structure and its functional features.
Fig. 2: Nonvolatile photoinduced trapping in a ReSe2/hBN stack.
Fig. 3: Demonstration of reconfigurable transistor–memory operations in PT-RFET.
Fig. 4: Demonstration of gate logic circuits.
Fig. 5: Demonstration of artificial synaptic functions.

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Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding authors on reasonable request.

Code availability

The codes used for simulation and data plotting are available from the corresponding authors on reasonable request.

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Acknowledgements

This work was supported by the Taiwan Ministry of Science and Technology (grants nos. MOST 109-2112-M-005-013-MY3, 111-2923-M-005-001-MY3 and 110-2119-M-007-003-MBK). This work was also financially supported by the Center for Semiconductor Technology Research from the Featured Areas Research Center Program within the framework of the Higher Education Sprout Project of the Ministry of Education (MOE) in Taiwan. This study was partly supported by the National Science and Technology Council, Taiwan, under grant no. NSTC 111-2634-F-A49-008. K.W. and T.T. acknowledge support from JSPS KAKENHI (grants nos. 19H05790, 20H00354 and 21H05233). We thank V. Pi-Ho Hu (National Taiwan University) for useful discussions and Jie Dong Co. for facility support.

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Contributions

Y.-F.L., P.-W.C. and M.-Y.T. conceived and designed the entire experiments. J.-L.W. designed and realized the CNN simulation. M.-Y.T. and C.-T.H. fabricated the devices and conducted the measurements. M.-Y.T. completed the data analysis. The paper was written by Y.-F.L. and M.-Y.T. with contributions from all co-authors. Y.-F.L. and P.-W.C. supervised the research. C.-Y.L. provided some experimental methods. K.W., T.T. and C.-H.H. provided the 2D crystals. M.-P.L., F.-S.Y., M.L., Y.-M.C., W.-W.W. and M.Y. provided suggestions related to the experiments. All the authors discussed the results and commented on the manuscript.

Corresponding authors

Correspondence to Jiunn-Lin Wu, Po-Wen Chiu or Yen-Fu Lin.

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Nature Electronics thanks Wei Chen, Jens Trommer and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Supplementary Figs. 1–6, Notes 1 and 2 and Table.

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Tsai, MY., Huang, CT., Lin, CY. et al. A reconfigurable transistor and memory based on a two-dimensional heterostructure and photoinduced trapping. Nat Electron 6, 755–764 (2023). https://doi.org/10.1038/s41928-023-01034-7

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