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In-sensor optoelectronic computing using electrostatically doped silicon


Complementary metal–oxide–semiconductor (CMOS) image sensors allow machines to interact with the visual world. In these sensors, image capture in front-end silicon photodiode arrays is separated from back-end image processing. To reduce the energy cost associated with transferring data between the sensing and computing units, in-sensor computing approaches are being developed where images are processed within the photodiode arrays. However, such methods require electrostatically doped photodiodes where photocurrents can be electrically modulated or programmed, and this is challenging in current CMOS image sensors that use chemically doped silicon photodiodes. Here we report in-sensor computing using electrostatically doped silicon photodiodes. We fabricate thousands of dual-gate silicon p–i–n photodiodes, which can be integrated into CMOS image sensors, at the wafer scale. With a 3 × 3 network of the electrostatically doped photodiodes, we demonstrate in-sensor image processing using seven different convolutional filters electrically programmed into the photodiode network.

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Fig. 1: Electrostatically doped silicon p–i–n photodiode.
Fig. 2: Programmable photoresponse of the dual-gate silicon p–i–n photodiode.
Fig. 3: Wafer-scale array of the dual-gate silicon p–i–n photodiodes.
Fig. 4: A 3 × 3 photodiode network for analogue multiply–accumulate computation.
Fig. 5: In-sensor image processing using the 3 × 3 dual-gate p–i–n photodiode network.

Data availability

Source data are provided with this paper. The data that support the other findings of this study are available from the corresponding authors upon reasonable request.

Code availability

Experimental code is available from the corresponding authors on reasonable request.


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We acknowledge support by the Samsung Advanced Institute of Technology (SAIT) under Contract A30216 and by the National Science Foundation (NSF) Science and Technology Center for Integrated Quantum Materials under Contract DMR-1231319. Device fabrication was performed in part at the Harvard Center for Nanoscale Systems (CNS), which is supported by the NSF under Contract 1541959.

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Authors and Affiliations



H.J., H.H., S.P. and D.H. conceived and designed the experiments. H.J., M.P. and S.-K.L. designed and fabricated the electrostatically doped silicon photodiodes. H.H. designed the interface electronics. H.J., H.H., M.P. and S.-K.L. performed the measurements of individual dual-gate p–i–n photodiodes. H.J. and H.H. performed the in-sensor image processing. M.-H.L. and C.K. performed the wafer-scale measurements. W.-B.J. performed the COMSOL Multiphysics simulations on the dual-gate p–i–n photodiode. H.J., H.H., W.-B.J., M.-H.L., C.K., M.P., S.-K.L. and D.H. analysed the data. S.P. and D.H. supervised the project. H.J., H.H. and D.H. wrote the article. All the authors discussed the results and implications, and reviewed the article.

Corresponding authors

Correspondence to Seongjun Park or Donhee Ham.

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Nature Electronics thanks Yang Chai and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Supplementary Information

Supplementary Figs. 1–10.

Source data

Source Data Fig. 1

Source data for Fig. 1b,c.

Source Data Fig. 2

Source data for Fig. 2b–d.

Source Data Fig. 3

Source data for Fig. 3b–d and raw data for Fig. 3d.

Source Data Fig. 4

Source data for Fig. 4b–d.

Source Data Fig. 5

Source data for Fig. 5a–d.

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Jang, H., Hinton, H., Jung, WB. et al. In-sensor optoelectronic computing using electrostatically doped silicon. Nat Electron 5, 519–525 (2022).

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