Analogue in-memory computing using memristors could alleviate the performance constraints imposed by digital von Neumann systems in data-intensive tasks. Conventional linear memristors typically operate at high currents, potentially limiting power efficiency and scalability in practical applications. Here, we show that nonlinear ferroelectric tunnel junction memristors can perform linear computation at ultralow currents. Using logarithmic line drivers, we demonstrate that analogue-voltage-amplitude vector–matrix multiplication (VMM) can be performed in selectorless ferroelectric tunnel junction crossbars by exploiting a device nonlinearity factor that remains constant for multiple conductive states. We also show that our ferroelectric tunnel junction crossbars have the attributes required to scale analogue VMM-intensive applications, such as neural inference engines, towards energy efficiencies above 100 tera-operations per second per watt.
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The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.
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We thank K. Nomura, S. Miyano and F. Tachibana for fruitful and insightful discussions. We also thank K. Mizushima for his kind feedback during the writing of this paper.
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Berdan, R., Marukame, T., Ota, K. et al. Low-power linear computation using nonlinear ferroelectric tunnel junction memristors. Nat Electron 3, 259–266 (2020). https://doi.org/10.1038/s41928-020-0405-0
Nature Electronics (2020)
Nature Electronics (2020)