Spin qubits created from gate-defined silicon metal–oxide–semiconductor quantum dots are a promising architecture for quantum computation. The high single qubit fidelities possible in these systems, combined with quantum error correcting codes, could potentially offer a route to fault-tolerant quantum computing. To achieve fault tolerance, however, gate error rates must be reduced to below a certain threshold and, in general, correlated errors must be removed. Here we show that pulse engineering techniques can be used to reduce the average Clifford gate error rates for silicon quantum dot spin qubits down to 0.043%. This represents a factor of three improvement over state-of-the-art silicon quantum dot devices and extends the randomized benchmarking coherence time to 9.4 ms. By including tomographically complete measurements in our randomized benchmarking, we infer a higher-order feature of the noise called the unitarity, which measures the coherence of noise. This, in turn, allows us to theoretically predict that average gate error rates as low as 0.026% may be achievable with further pulse improvements. These spin qubit fidelities are ultimately limited by incoherent noise, which we attribute to charge noise from the silicon device structure or the environment.

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The data sets generated during and/or analysed during the current study are available from the corresponding authors on reasonable request.

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The analysis code that support the findings during the current study are available from the corresponding authors on reasonable request.

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The authors acknowledge support from the US Army Research Office (W911NF-13-1-0024, W911NF-14-1-0098, W911NF-14-1-0103 and W911NF-17-1-0198), the Australian Research Council (CE170100009 and CE170100012) and the NSW Node of the Australian National Fabrication Facility. B.H. acknowledges support from the Netherlands Organization for Scientific Research (NWO) through a Rubicon Grant. K.M.I. acknowledges support from a Grant-in-Aid for Scientific Research by MEXT, NanoQuine, FIRST and the JSPS Core-to-Core Program. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the Army Research Office or the US Government.

Author information


  1. Centre for Quantum Computation and Communication Technology, School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, New South Wales, Australia

    • C. H. Yang
    • , K. W. Chan
    • , W. Huang
    • , J. C. C. Hwang
    • , B. Hensen
    • , A. Laucht
    • , T. Tanttu
    • , F. E. Hudson
    • , A. Morello
    •  & A. S. Dzurak
  2. Centre for Engineered Quantum Systems, School of Physics, The University of Sydney, Sydney, New South Wales, Australia

    • R. Harper
    • , T. Evans
    • , S. T. Flammia
    •  & S. D. Bartlett
  3. School of Fundamental Science and Technology, Keio University, Kohoku-ku, Yokohama, Japan

    • K. M. Itoh


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C.H.Y. conceived and designed the GRAPE pulse sequences and the feedback control systems for the experiments. C.H.Y. and K.W.C. performed the experiments. C.H.Y., R.H., T.E., S.T.F. and S.D.B. analysed the data. K.W.C. and F.E.H. fabricated the device. K.M.I. prepared and supplied the 28Si epilayer wafer. All authors contributed materials, analysis and/or tools. C.H.Y., R.H., S.T.F., S.D.B. and A.S.D. wrote the paper with input from all co-authors. A.S.D. supervised the project.

Competing interests

The authors declare no competing interests.

Corresponding authors

Correspondence to C. H. Yang or S. D. Bartlett or A. S. Dzurak.

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  1. Supplementary Information

    Supplementary Figs. 1–2, Supplementary equations 1–2, Supplementary Table 1

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