Abstract
Ternary content-addressable memory (TCAM) is specialized hardware that can perform in-memory search and pattern matching for data-intensive applications. However, achieving TCAMs with high search capacity, good area efficiency and good energy efficiency remains a challenge. Here, we show that two-transistor–two-resistor (2T2R) transition metal dichalcogenide TCAM (TMD-TCAM) cells can be created by integrating single-layer MoS2 transistors with metal-oxide resistive random-access memories (RRAMs). The MoS2 transistors have very low leakage currents and can program the RRAMs with exceptionally robust current control, enabling the parallel search of very large numbers of data bits. These TCAM cells also exhibit remarkably large resistance ratios (R-ratios) of up to 8.5 × 105 between match and mismatch states. This R-ratio is comparable to that of commercial TCAMs using static random-access memories (SRAMs), with the key advantage that our 2T2R TCAMs use far fewer transistors and have zero standby power due to the non-volatility of RRAMs.
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Data availability
The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.
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Acknowledgements
We acknowledge the discussions with T. Phan, A. Tang, Y. Nishi, K. Saraswat and Y. Chai. We acknowledge the support from the Air Force Office of Scientific Research (AFOSR) Multidisciplinary University Research Initiative (MURI) under award FA9550-16-1-0031, the National Science Foundation (NSF) EFRI 2-DARE grant 1542883, the AFOSR grant FA9550-14-1-0251, the Initiative for Nanoscale Materials and Processes (INMP), the Stanford Non-volatile Memory Technology Research Initiative (NMTRI), and Stanford SystemX Alliance. This work was supported in part by ASCENT, one of six centres in JUMP, a Semiconductor Research Corporation (SRC) programme sponsored by DARPA. R.Y. thanks University of Michigan–Shanghai Jiao Tong University Joint Institute at Shanghai Jiao Tong University for their financial support. K.K.H.S. acknowledges partial support from the Stanford Graduate Fellowship programme and the NSF Graduate Research Fellowship (no. DGE-114747). We are grateful to Stanford Nanofabrication Facility (SNF) and Stanford Nano Shared Facilities (SNSF) for providing the equipment for device fabrication and measurements.
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R.Y. and H.-S.P.W. conceived the concept and designed the research. R.Y. performed the fabrication and the electrical measurements of the 2T2R structure. H.L. assisted in the electrical measurement and performed the simulation of the TCAM array. K.K.H.S. performed the CVD growth of MoS2. T.R.K. and K.O. took the TEM images. E.P., J.A.F. and H.-S.P.W. provided feedback on the experiments. R.Y. and H.-S.P.W. wrote the manuscript, with input from E.P. and J.A.F. All authors have discussed the results and given approval to the final version of the manuscript.
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Yang, R., Li, H., Smithe, K.K.H. et al. Ternary content-addressable memory with MoS2 transistors for massively parallel data search. Nat Electron 2, 108–114 (2019). https://doi.org/10.1038/s41928-019-0220-7
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DOI: https://doi.org/10.1038/s41928-019-0220-7
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