Introduction

Conventional integrated circuits (ICs) built on silicon wafers are rigid and fragile. However, recently, flexible devices have been fabricated on polymer films1,2. In addition to flexibility, polymer materials exhibit plasticity or mouldability and can be permanently deformed into arbitrary shapes by applying mechanical force and heat. A variety of plastic products, ranging from those for daily necessities to electronics products and medical devices, are produced by such moulding techniques. However, neither the conventional semiconductor materials nor the electrodes/interconnections that comprise ICs can be moulded, owing to their poor stretchability and heat tolerance. Carbon nanotube (CNT) assemblies have excellent mechanical flexibility and stretchability as well as electric conductivity and heat tolerance. They have been used in various electronic and electromechanical devices, including flexible transparent conductive films3,4,5, thin-film transistors (TFTs)6,7,8,9,10, functional ICs8,9,11 and electromechanical sensors12. Currently available carbon-based devices such as TFTs13,14,15,16 usually exhibit limited flexibility and stretchability owing to the use of rigid metal electrodes and oxide insulators (such as Al2O3 and SiO2, to name a few). Gate dielectrics made of polymers17 and ionic liquids18 have been introduced as alternatives; however, these usually result in high operating voltages and low operating speeds, respectively.

In this study, we demonstrate fully transparent and extremely stretchable TFTs and ICs that can operate at low voltages with a thick polymer gate insulator, utilizing the field focusing effect. We also show that these devices are mouldable via an air-assisted thermopressure-forming technique.

Results

All-carbon TFTs and ICs

We fabricated top-gate-type TFTs and ICs on a polyethylene naphthalate (PEN) substrate with a thickness of 125 μm. The active layer comprised a sparse network-like CNT thin film and the passive elements a dense 80-nm thick CNT thin film, with the dielectric and intermediate layers consisting of a 660-nm thick polymethyl methacrylate (PMMA) layer. We grew the CNTs using a floating-catalyst (aerosol) chemical vapour deposition technique19; collected them on a membrane filter, while controlling the CNT density to the appropriate level by adjusting the collection time; transferred the CNT film onto the substrate; and patterned it using standard photolithographic and oxygen plasma etching processes9. The average diameters of CNTs were evaluated from the optical absorption spectrum to be 1.1 nm for the channel9 and 1.4 nm for the electrodes and interconnections5. The CNT electrodes and interconnections exhibit a sheet resistance of 230 Ω sq−1 and a transparency of 85% at a wavelength of 550 nm after being chemically doped with HNO3 for 1 min.

As can be seen from Fig. 1a, the fabricated devices are fully transparent and flexible, with their transmittance being 10% lower than that of the PEN substrate and reaching up to 80% when 48% of the substrate is covered with the thick CNT film that forms the electrodes and the interconnections as shown in Fig. 1b. The colour map in the inset shows that the all-carbon ICs have less colour as compared with previously reported transparent devices based on oxides such as ZnO and indium tin oxide13,20.

Figure 1c shows the transfer characteristics of an all-carbon top-gate TFT. The channel length (Lch) and channel width (Wch) are both 100 μm. The device exhibits p-type characteristics with a high ON/OFF ratio of >105 and the subthreshold voltage of 0.73 V dec−1. The effective device mobility was 1,027 cm2 V–1 s–1, which was evaluated in the linear region at VDS=−0.5 V using the standard formula μ=(Lch/Wch)(1/C)(1/VDS)(dID/dVGS). Here, C was estimated using a rigorous model that takes into account the realistic electrostatic coupling between the sparse CNTs and the gate electrode21. The mobility of the fabricated all-carbon TFTs exceeds not only those previously reported for CNT TFTs9,22 and low-temperature poly-Si TFTs23,24 but also that reported for single-crystal Si metal–oxide–semiconductor field-effect transistors25. For C calculated using a parallel-plate model, that is, for C=ɛ/tox, where ɛ is the dielectric constant of the gate insulator, the effective mobility is 321 cm2 V–1 s–1. Even for the high carrier mobility, the output saturation current density per unit device width (210 μA mm−1 at VDS=−5 V, Fig. 1d) was still much smaller than conventional Si metal–oxide–semiconductor field-effect transistors. This is mainly due to the small gate capacitance composed by the thick PMMA gate insulator and low-density CNT channel. It is worth mentioning that the IDVDS characteristics exhibit ohmic behaviour in the linear region as shown in Fig. 1d, suggesting a formation of good ohmic contacts between the CNT channel and CNT electrodes.

As the all-carbon devices are made of CNTs and polymers, they exhibit better flexibility and stretchability compared with devices fabricated from rigid metals and oxide insulators. We performed the bending tests, in which the all-carbon devices were rolled, under various conditions, on cylinders having different diameters. When a substrate with a thickness (d) is bent with a radius of curvature (D) measured from the point of origin O to the natural axis of the substrate, the linear tensile strains of d/2D is experienced by the outer surfaces of the devices as shown in Fig. 1e. The all-carbon TFTs exhibit only a small variation in the ON and OFF currents when subjected to bending strains of up to 0.8% as shown in Fig. 1f, thus demonstrating that the devices exhibited good flexibility.

We fabricated all-carbon ICs, including inverters; 11- and 21-stage ring oscillators; NOR, NAND and XOR gates; and static random access memory (SRAM) cells. The CNT electrodes and PMMA insulators were similar to those of the all-carbon TFTs. The load for the logic gates is a gate-source-shorted all-carbon TFT. The channel width of the load TFTs is designed to be 50 μm, whereas that of the driver is 100 μm in order to adjust the thresholds of the logic gates. Figure 2a,b, respectively, show the photograph and circuit diagram and the oscillation waveform for a 21-stage all-carbon ring oscillator, in which 21 inverters are connected in series and with which an additional output buffer is integrated, resulting in the device having 44 TFTs in total. The output voltage begins oscillating spontaneously at a VDD of −3 V. The oscillation frequency reaches a value of 3.0 kHz at a VDD of −5 V, and the delay time for each inverter is 7.9 μs per gate, which is shorter than that for the ring oscillators with Au interconnections that we had reported previously9. Although the parasitic resistances of the CNT electrodes and interconnections are higher than those of metals, they do not significantly influence the delay times because the RC delay in switching is primarily caused by the ON resistance of the TFTs. The oscillation frequency of the ring oscillator is determined by the total gate delay of the inverters in the circuit chain. The delay time (τ) of each inverter can be approximated by the product of the total series resistance and the load capacitance (Cload) attributable to the gate of the inverter of the next stage. Thus, as shown in the simplified models in Fig. 2c. Here the resistance includes the resistances of the CNTs and the interconnections (R1, R2, R3 and R4) and the ON resistances (RL and RD) of the TFTs. We estimated the resistances in the fabricated all-carbon devices to be R17 kΩ, R21.5 kΩ, R3R415 kΩ, RL2 MΩ and RD1 MΩ, respectively, showing that the delay time is mostly determined by the channel resistance.

We also confirmed that the other functions of the ICs worked at VDD of −5 V (Supplementary Fig. 1). It is worth mentioning that the various functions of the ICs could be tested at the fairly low voltage of −5 V even though a 660-nm thick polymer layer was used for the gate insulator in the TFTs. It is known that a thicker insulator usually leads to a higher operating voltage (tens of volts) in conventional Si-based TFTs and organic TFTs26, because the gate-to-channel capacitance necessary for charging the carriers in the channel decreases in inverse proportion to the thickness of the gate insulator for a conventional two-dimensional (2D) channel. However, for a sparse network-like CNT thin film in which the spacings between the CNTs are large compared with the thickness of the gate insulator, the electrostatic coupling between the nanotubes and the gate electrode is enhanced because the electric force lines are focused on the nanotubes, whose diameters are in the nanometre range, as shown in Fig. 2d. As a consequence, the gate-to-channel capacitance approximately becomes a function of log−1(t), where t is the thickness of the gate insulator, leading to the gate-to-channel capacitance having a considerable value even for an increased gate insulator thickness, in contrast to what is noticed in 2D channels. On comparing the devices fabricated in this study with previously reported ones having inorganic gate insulators (Al2O3; tox: 40 nm; relative dielectric constant (ɛr): 10)9, the equivalent oxide layer thickness (${t}_{\text{OX}}{\epsilon }_{{\text{SiO}}_{\text{2}}}/{\epsilon }_{\text{r}}$) for the present devices, which use PMMA as the gate insulator (tox: 660 nm; ɛr: 3.4), increases from 15.6 to 757 nm. Here, ɛSiO2 is relative dielectric constant of SiO2. For this case, the gate capacitance of the parallel-plate capacitor decreases to be 2%, whereas the capacitance of the sparse CNT channel is 41.5% of the initial value, resulting in an increase in the gate effect by a factor of 20.8. The low-voltage operation of the fabricated ICs is attributable to the sparse network-like CNT film.

The large gate-induced hysteresis typically observed in transfer characteristics of CNT transistors is one of the issues to be addressed. The present all-carbon TFTs exhibited relatively smaller hysteresis than previous CNT TFTs with a bottom gate structure9 (Supplementary Fig. S2). This is probably because the channel is covered with the PMMA gate insulator layer so as to decrease the amount of adsorbing ambient molecules such as water and oxygen causing hysteresis27,28,29. Although the width of hysteresis increased with sweep amplitude of VGS, in the range of an operation voltage of present ICs (VDD=−5 V), the hysteresis is still small enough to secure the noise margin for the logic operation as will be shown later.

Mouldability of all-carbon devices

The unique compositions of the devices allows them to be deformed in a three-dimensional (3D) manner using extremely high strains, which are induced via moulding using an air-assisted thermopressure-forming technique. This technique is shown schematically in Fig. 3a. The planar substrate is heated and blown to form a dome-shaped structure (Fig. 3b). The all-carbon device, as well as the PEN substrate, is then stretched biaxially during the forming process as shown in Fig. 3c. The process does not cause the CNT films to crack or peel, and the channel width and length both increase from 100 to 112 μm, corresponding to biaxial tensile strains of 12% (25% increase in area). This is in sharp contrast to rigid materials such as metals, which generally break down for strains greater than 1% (Supplementary Fig. S3). Moreover, the positions of upper layers such as the gate insulator and gate electrode did not shift relatively to the position of underlying drain/source and channel layers in the moulding process. The radii of curvature of the dome-shaped devices and the tensile strains induced in them can be controlled through the forming temperature as shown in Fig. 3d.

Figure 4a–f show the variations in the static characteristics of the all-carbon TFTs for a series of biaxial tensile strains with values up to 18.0%. The detail of the uniformity in the device property is shown in Supplementary Fig. S4. These TFTs were prepared using CNTs in two different densities; the lower density (0.67 CNTs μm−1) results in an initial ON/OFF ratio of 106 (Fig. 4a), whereas the higher one (1.34 CNTs μm−1) leads to an initial ON/OFF ratio of <102 (Fig. 4d). It is known that even if the metallic CNTs are incorporated in the channel in an amount of 30%, a high ON/OFF ratio can still be obtained by adjusting the density of the CNTs such that it is lower than the percolation threshold30. On increasing the strain, the ON currents decrease slightly in both devices as shown in Fig. 4b,e. Consequently, the median mobility decreases from 675 to 311 cm2 V–1 s–1 for the lower CNT density (Fig. 4c) and from 1,168 to 935 cm2 V–1 s–1 for the higher one (Fig. 4f). We could notice two distinct trends in the OFF currents of the two devices. The ON/OFF ratio for the device with the lower CNT density remains constant at 106, whereas it increases from 40 to 105 for the device with the higher CNT density.

These variations in the properties of the TFTs would be attributable to the decrease in the density of CNTs per unit area with the increase in the channel area. The increase in ON/OFF ratio of the higher-CNT-density device is caused by the density of metallic CNTs that become lower than the percolation threshold. We found no evidence to suggest that the channel CNTs are cut by the shearing force in effect at the interface between the CNTs and the surrounding polymer31,32 during the forming process. The noncovalent intermolecular interactions between the CNTs and the polymer are much weaker than covalent sp2 carbon–carbon bonds33,34,35. Furthermore, the shearing force decreases as the temperature increases. Because of the weak Van der Waals forces at the CNT/CNT junctions, the increase in the area of the CNT thin films is owing to the relative movements of the CNTs. In addition, the sheet resistance of CNT interconnections also increases by 60% for a strain of 18%.

Demonstration of mouldable ICs

The all-carbon logic ICs also exhibit mouldability. We demonstrate this by using the CNT film with the higher density for the channel to ensure that the ICs function even after being moulded. Figure 5 shows the electrical performance of a moulded inverter with various biaxial tensile strain. The ON/OFF ratio of the driving TFT of the inverter increased from 30 to 2 × 104 (data not shown) at a strain of 7.2%. Accordingly, the output performance of the device shows a distinct improvement, with the output voltage swings increasing from −4.0 V and −1.8 V to −4.9 V and −0.2 V, respectively, and the voltage gain from 0.8 to 11, suggesting that such logic circuits can function even after being strained to this extent. Figure 6 shows the all-carbon ICs for an XOR gate (Fig. 6a–e) and an SRAM device (Fig. 6f–i), moulded such that they experience a 7.2% biaxial strain. The XOR gate, which represents the inequality function, consists of two inverters and three NAND gates, is operated by a clock (CLK) signal of 40 Hz and shows clear logic outputs with the large voltage swings.

SRAM is a type of memory that uses bistable latching circuitry to store each bit and is faster and more reliable than dynamic RAM. To our knowledge, the present device is the first SRAM fabricated using CNT-based transistors. The 1-bit all-carbon SRAM demonstrated consists of a pair of inverters and two access transistors. The folded transfer characteristics in Fig. 6h exhibit a large noise margin for the read and write operations of the SRAM, suggesting that the SRAM operates robustly during the write and read processes. This can also be seen from the time chart in Fig. 6i. When the word line (WL) is set to ‘1’ to turn the access transistors (T5 and T6) ON, the data D and are repeatedly written or read. Other logic gates that operate similarly under a biaxial strain of 7.2% are presented in Supplementary Fig. S5.

Discussion

Our demonstration of high-performance, low-voltage all-carbon TFTs and ICs opens new possibilities for transparent and flexible/stretchable electronics. Such low-voltage devices overcome the fundamental limits experienced by TFTs with 2D channels fabricated using thick polymers as insulators. This suggests that not only flexible/stretchable electronic devices but also printed ones, in which the printing of the gate insulator and low-voltage operations are usually difficult to achieve simultaneously, can be fabricated. More importantly, the mouldability of our all-carbon devices, owing to the extreme biaxial stretchability of both the passive and the active elements of the devices, could open the door for novel 3D electronic devices based on forming techniques that are used today to shape plastic products, and also allow electronic functionalities to be incorporated into plastic products at low cost.

One of the major challenges that should be addressed for scaling up the CNT devices is the improvement of the performance variation of devices. The s.d. of ON current obtained in this work was σ(ION)/<ION>=0.32 as shown in Supplementary Fig. S4a, which is about four time larger than that simulated for ideal random networks of CNTs with a constant length and conductivity. This suggests that the experimentally obtained variation is caused by the structural fluctuation of CNTs, and it is important to grow CNTs with a uniform length and diameter. For further improvement, metallic CNTs incorporated in the channel should be eliminated so that the density of CNTs is able to be increased without degrading ON/OFF ratio. Selective etching of metallic CNTs based on chemical36, electrochemical37, plasma38 and light irradiation39 methods would be applicable for present devices.

Methods

Device fabrication

First, metal marks (Ti/Au: 10/40 nm) were fabricated on a PEN (Teijin DuPont Films) substrate by standard photolithography, electron-beam evaporation and lift-off processes to aid in the alignment of the transparent CNT thin films. CNTs were grown using a floating-catalyst chemical vapour deposition technique and collected using a membrane filter. The dense CNT thin film for the source and drain electrodes and interconnections was transferred from the membrane filter to the substrate via a simple press transfer process5, and then patterned by photolithography and oxygen plasma etching processes. Next, a sparse CNT thin film to form the channels was transferred onto the substrate by dissolving the filter in acetone9. An insulator was formed on the substrate by spin coating a layer of PMMA (Microchem, 950 k MW) on it and baking the substrate on a hotplate at 170 °C for 1 h. The contact windows were formed by etching the PMMA insulator using acetone and a polydimethylglutarimide-based resist mask. Finally, another dense CNT film to form the gate electrodes was transferred onto the substrate and patterned using the same method as the one used to pattern the source and drain layer (See Supplementary Fig. S6 for the detail).

Moulding process

The fabricated all-carbon devices were fixed in the gas-moulding apparatus using screws. Compressed air at a pressure of 0.8 MPa was introduced into the moulding container, which was heated with a hotplate. After being heated for 5 min, the apparatus was allowed to cool to the room temperature, with the pressure of the compressed air being maintained.

Measurements

All electrical measurements were performed under ambient conditions. In order to test the logic ICs, function generators and oscilloscopes were used to generate the CLK and input signals and to observe the outputs, respectively. To prevent the input impedance of the oscilloscopes from interfering with the logic operations, high-impedance instrumental amplifiers were used as buffers. During the operation of the SRAM device, analogue switch ICs were also used to connect the bit lines to the input or output, depending ‘Write enable’ or ‘Read enable’ signals generated by a logic analyser.