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High-resolution non-destructive three-dimensional imaging of integrated circuits

Nature volume 543, pages 402406 (16 March 2017) | Download Citation


Modern nanoelectronics1,2 has advanced to a point at which it is impossible to image entire devices and their interconnections non-destructively because of their small feature sizes and the complex three-dimensional structures resulting from their integration on a chip. This metrology gap implies a lack of direct feedback between design and manufacturing processes, and hampers quality control during production, shipment and use. Here we demonstrate that X-ray ptychography3,4—a high-resolution coherent diffractive imaging technique—can create three-dimensional images of integrated circuits of known and unknown designs with a lateral resolution in all directions down to 14.6 nanometres. We obtained detailed device geometries and corresponding elemental maps, and show how the devices are integrated with each other to form the chip. Our experiments represent a major advance in chip inspection and reverse engineering over the traditional destructive electron microscopy and ion milling techniques5,6,7. Foreseeable developments in X-ray sources8, optics9 and detectors10, as well as adoption of an instrument geometry11 optimized for planar rather than cylindrical samples, could lead to a thousand-fold increase in efficiency, with concomitant reductions in scan times and voxel sizes.

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We thank S. Stutz and S. Finizio for helping with the preparation of the Intel sample, and B. Schmitt, X. Shi and A. F. J. Levi for discussions. The measurements were performed at the cSAXS beamline of the Swiss Light Source (SLS) at the Paul Scherrer Institut (PSI). We thank ScopeM, the scientific centre for optical and electron microscopy, for providing access to the xenon FIB/SEM (Tescan, Fera3). This work was supported by the Swiss National Science Foundation (grant no. 200021_152554) and R'EQUIP (project number 145056).

Author information


  1. Paul Scherrer Institut, 5232 Villigen PSI, Switzerland

    • Mirko Holler
    • , Manuel Guizar-Sicairos
    • , Esther H. R. Tsai
    • , Roberto Dinapoli
    • , Elisabeth Müller
    • , Oliver Bunk
    • , Jörg Raabe
    •  & Gabriel Aeppli
  2. Department of Physics, ETH Zürich, Zürich CH-8093, Switzerland

    • Gabriel Aeppli
  3. Institut de Physique, EPFL, Lausanne CH-1015, Switzerland

    • Gabriel Aeppli


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The sample preparation was done by E.H.R.T., R.D., E.M. and J.R. The experiment was carried out by M.H., M.G.-S. and E.H.R.T. The data were analysed and visualized by M.H., M.G.-S., E.H.R.T., J.R., R.D. and G.A. The FIB/SEM data were collected by E.M. The manuscript was written by M.H., M.G.-S., O.B. and G.A.

Competing interests

The authors declare no competing financial interests.

Corresponding author

Correspondence to Mirko Holler.

Publisher's note: Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Reviewer Information Nature thanks J. Bruley and J. Hastings for their contribution to the peer review of this work.

Extended data

Supplementary information


  1. 1.

    3D rendering of the detector ASIC

    This video shows the 3D rendering of the detector ASIC.

  2. 2.

    3D rendering of the Intel® chip

    This video shows 3D rendering of the Intel® chip.

  3. 3.

    Axial slices of the Intel® chip

    This video shows moving up and down through the axial slices of the Intel® chip.

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