Monolithic integration of III-V compound semiconductors on silicon is highly sought after for high-speed, low-power-consumption silicon photonics and low-cost, light-weight photovoltaics. Here we present a GaAs/Si direct fusion bonding technique to provide highly conductive and transparent heterojunctions by heterointerfacial band engineering in relation to doping concentrations. Metal- and oxide-free GaAs/Si ohmic heterojunctions have been formed at 300°C; sufficiently low to inhibit active material degradation. We have demonstrated 1.3 μm InAs/GaAs quantum dot lasers on Si substrates with the lowest threshold current density of any laser on Si to date, and AlGaAs/Si dual-junction solar cells, by p-GaAs/p-Si and p-GaAs/n-Si bonding, respectively. Our direct semiconductor bonding technique opens up a new pathway for realizing ultrahigh efficiency multijunction solar cells with ideal bandgap combinations that are free from lattice-match restrictions required in conventional heteroepitaxy, as well as enabling the creation of novel high performance and practical optoelectronic devices by III-V/Si hybrid integration.
III-V semiconductor compound light sources integrated onto Si chips1,2,3,4,5,6,7,8,9 or waveguides10,11,12,13,14,15,16 are promising for the realization of photonic integrated circuits17,18 utilizing well-established complementary metal-oxide-semiconductor (CMOS) fabrication technologies. Such III-V/Si hybrid devices would compensate for the poor ability of silicon to act as a light source due to its low radiative recombination rate stemming from indirect energy bandgaps. For solar cell applications, Si-based multijunction stacking would provide high efficiency19,20, low cost, mechanical robustness and light weight cells, relative to conventional Si and III–V multijunction cells. Additionally, heterojunction tunnel field-effect transistors consisting of low bandgap III–V semiconductors and Si are promising for the realization of high-density, low-power-consumption very-large-scale-integration (VLSI) by enhanced drive current relative to conventional Si-only transistors21,22. For III–V/Si hybrid integration, direct epitaxial growth of III–V compounds on Si substrates would be the most desirable approach, but heteroepitaxy typically introduces a substantial crystalline defect density due to the large lattice mismatch and the polar-nonpolar nature of the III–V/IV semiconductor system that can adversely affect device performance23,24,25. Wafer bonding, on the other hand, is not subject to the lattice matching limitations associated with epitaxial growth, and heterostructure devices fabricated via wafer bonding can, in principle, have a performance close to those obtained by homoepitaxy by confining the defect network needed for lattice mismatch accommodation to the bonded interfaces26. It is known that ohmic Si/Si junctions of the same polarity, i.e. p-Si/p-Si and n-Si/n-Si, can be relatively easily obtained by direct wafer bonding even at room temperature26,27. It is, however, not the case for compound semiconductors such as GaAs and InP, and ohmic p-type/p-type or n-type/n-type junction formation has required high temperature bonding above 600°C28,29,30,31,32,33 which would severely degrade the device materials. For GaAs/Si bonding that would be particularly attractive for fabrication of high performance photonic and photovoltaic devices, no successfully direct-bonded ohmic junctions have been reported, and bonding even at 700°C was reported to have failed27,34. Although an alternative method to prepare ohmic heterointerfaces uses metal bonding agents5,35,36, the bonding metal layers would shadow light as well as cause photon absorption loss and, therefore, is not ideal for optoelectronic applications. In this work, we have succeeded in preparing ohmic GaAs/Si heterojunctions, to realize both optical transparency and electrical conductivity, by direct bonding at 300°C in ambient air for p-GaAs/p-Si homopolarity-junctions and p-GaAs/n-Si tunnel-junctions by applying heavy, degenerating doping at the GaAs and Si surfaces to be bonded to enhance the GaAs/Si interfacial conductivity.
GaAs/Si direct fusion bonding
We investigated experimentally the bonding of GaAs and Si wafers with varying doping concentrations and bonding temperature, and we characterized the GaAs/Si heterointerfacial electrical conductivities. The doping concentrations of the p-GaAs wafers, p+-GaAs layers, p+-Si, and n+-Si wafers were 9×1018 cm−3 Zn, 5×1019 cm−3 Zn, 3×1019 cm−3 B, and 3×1019 cm−3 As, respectively. Current-voltage (I-V) curves, under the measurement configuration shown schematically in Fig. 1a, for the bonded GaAs/Si wafer pairs are shown in Fig. 1b and 1c. Rectified, non-ohmic behaviour is seen for all p-GaAs/p+-Si and p-GaAs/n+-Si pairs including those annealed at 500°C. In contrast to the non-ohmic I–V characteristics for the p-GaAs/p+-Si and p-GaAs/n+-Si pairs, the p+-GaAs/p+-Si and p+-GaAs/n+-Si pairs exhibit ohmic I–V curves as seen in Fig. 1b and 1c. A cross-sectional transmission electron microscope image at a direct-bonded p+-GaAs/p+-Si heterointerface is shown in Fig. 1f. An amorphous layer at the GaAs/Si interface with a thickness of around 2 nm can be seen in the image. Even if this interfacial layer is an oxide, this thickness is sufficiently thin to provide ohmic interfacial conductivity by inducing a tunnelling current or by oxide breakdown by the applied voltage37,38. Selected-area diffraction patterns at and around the GaAs/Si heterointerface, shown in Fig. 1g–i, verify that the regions immediately above and below the amorphous layer are single-crystalline GaAs and Si, respectively. The images indicate that both the GaAs and Si materials remain single crystals during our bonding process with no threading dislocation generation observed around the vicinity of the bonded heterointerface. This is in contrast to interfaces in the cases of lattice-mismatched heteroepitaxy23,24,25.
III–V quantum dot lasers on Si substrates
As a demonstration of our GaAs/Si direct bonding technique applied to optoelectronic devices, we have fabricated semiconductor lasers using self-assembled InAs quantum dots embedded in GaAs (InAs/GaAs quantum dot lasers39) on Si substrates and operated by current injection through direct-bonded GaAs/Si heterointerfaces. A double-hetero InAs/GaAs quantum dot laser structure was grown on a GaAs substrate by molecular beam epitaxy and layer-transferred onto a p+-Si substrate by means of p+-GaAs/p+-Si direct bonding at 300°C and subsequent removal of the GaAs substrate. The finished device consists of a 3.9-μm-thick III-V semiconductor double-hetero laser structure on top of a Si substrate, as shown in Fig. 2a and 2b. Fig. 2c shows the light-current characteristics of the fabricated device under 500 Hz, 400 ns pulsed pumping at room temperature. The clear kink in the light-current curve indicates the lasing turn-on with a threshold current density of 205 A cm−2; the lowest threshold current density, to the best of our knowledge, of any kind of laser on Si. The inset of Fig. 2c shows the I–V characteristics of the laser. The resistivity in the linear I–V region at higher voltages is around 0.1 Ω cm2, which is the same order of magnitude as the bonded p+-GaAs/p+-Si bare wafer heterointerface shown in Fig. 1b. Fig. 2d and 2e show the electroluminescence spectra at current densities of 140 and 380 A cm−2, corresponding to spontaneous and lasing emission, respectively. Room temperature lasing at the 1.3 μm optical communication band, associated with the ground state transition of the InAs quantum dots, is observed. Additionally, an onset of room temperature continuous-wave lasing has been observed in a same type of sample (see Supplementary Information).
III–V/Si multijunction solar cells
We have also fabricated AlGaAs/Si dual-junction solar cells using the direct bonding technique. An Al0.1Ga0.9As subcell was grown on a GaAs substrate by molecular beam epitaxy and layer-transferred onto a Si subcell by means of the p+-GaAs/n+-Si direct bonding at 300°C and subsequent removal of the GaAs substrate. Fig. 3a and 3b show a cross-sectional schematic diagram and scanning electron microscope image of the fabricated AlGaAs/Si dual-junction solar cell, respectively. Both the Al0.1Ga0.9As and Si subcells had n-on-p structures, and the bonding of the p+-GaAs/n+-Si heterointerface acts as a tunnel junction to switch the polarity. The light I–V and power-voltage characteristics of the solar cell under a 600 nm-peaked halogen white light source of a one-sun intensity (100 mW cm−2) are shown in the inset of Fig. 3b. The device performance parameters for this solar cell are Jsc = 27.9 mA cm−2, Voc = 1.55 V, FF = 0.58, and η = 25.2%, where Jsc, Voc, FF and η are the short-circuit current, open-circuit voltage, fill factor and energy conversion efficiency, respectively.
The electrical conductivity dependence on bonding temperature seen in Fig. 1b and 1c does not show monotonic behavior, attributed to the trade-off between conductivity increase and decrease by formation of covalent bonds and thermal expansion mismatch between GaAs and Si at higher temperature, respectively. Interfacial oxide formation might also be a cause of higher interfacial resistivity at higher temperature for our wafer bonding process in ambient air. It should be also noted that the wafer bonding process basically contains some randomness in reproducibility for the bonded interfacial properties degradable for example even by a single particle accidental incorporation into the interface. The conductivity enhancement seen in Fig. 1b and 1c can be explained through an analysis of the heterojunction band offset at the GaAs/Si interfaces. One-dimensional simulations of the heterojunction bandbending (PC1D software, University of New South Wales) indicate thinning of the potential barrier at the valence band edge due to the change of the doping concentration in GaAs from 9×1018 cm−3 to 5×1019 cm−3 for the p-type/p-type pairs as seen in Fig. 1d, leading to the interfacial electrical conductivity enhancement. On the other hand, simulations indicate tunnel junction formation due to the same change in doping concentration in GaAs for the p-type/n-type pairs as seen in Fig. 1e. This valence-band-edge rising on the GaAs side enables tunnelling carrier transport, leading to higher conductivity and ohmic characteristics across the heterojunction interfaces. These p-type/p-type and p-type/n-type GaAs/Si ohmic heterojunctions are very suitable for next-generation III-V/Si hybrid optoelectronic devices that will enable both optical and electrical interconnections.
We have fabricated hundreds of lasers in a single wafer bonding step demonstrating the advantage of this approach for high volume, low cost integration over the conventional pick-and-place scheme18,40. Evanescent optical coupling to underneath waveguides to fabricate so-called hybrid Si lasers10,11,12,13,14,15,16,41 could be realized by preparing rib structures on commercially available silicon-on-insulator substrates in advance of wafer bonding. In contrast to oxide-mediated bonding used for hybrid laser fabrication to date10,11,12,13,14,15, conductive wafer-bonded heterointerfaces enable vertical carrier injection that prevents current spreading towards cavity stripe edges. Therefore, direct-bonded hybrid lasers have the advantages of higher quantum efficiencies and simpler fabrication without mesa etching or ion implantation for carrier confinement that was required in the fabrication of earlier lateral-current-injection III-V/Si hybrid lasers41.
The low FF seen in Fig. 3b is likely due to the large series resistance. However, the wafer-bonded GaAs/Si heterojunction interfacial resistance with exactly same doping concentrations in GaAs and Si to those used for the bonding surfaces in the dual-junction solar cell seen in Fig. 1c is far lower than the total series resistance of the dual-junction solar cell estimated from the light I–V characteristics. We therefore attribute the low FF principally to insufficient optimization of our front metal contact grids. Very high efficiency, over 30% under 1 sun, seems quite realistic simply through a contact redesign and would be expected based on the Jsc and Voc values obtained at this preliminary research stage. To the best of our knowledge, while there have been two reports for all-III–V bonded multijunction solar cells42,43, this is the first bonded multijunction solar cell with a Si subcell. Our monolithic AlGaAs/Si dual-junction solar cell (overcoming a 4% lattice-mismatch between AlGaAs and Si) has demonstrated a proof-of-principle for the viability of direct wafer bonding for solar cell applications. This wafer-bonding interconnecting approach is extendable to ultrahigh efficiency multijunction solar cells, such as InGaN/AlGaAs/Si/Ge four-junction solar cells, with optimal subcell bandgap sequences free from the lattice-matching restriction required in conventional heteroepitaxy. In this work, we adopted an etch-back method to detach the GaAs growth substrate to simplify the fabrication process. Alternatively, the incorporation of an epitaxial lift-off6,44,45 or ion-cutting46,47,48 technique would enable the reuse of the GaAs substrates to reduce the production costs.
In conclusion, we have investigated GaAs/Si direct wafer bonding for electrically conductive, optically transparent materials interconnection in conjunction with heterointerfacial energy band alignment calculations in relation to doping concentrations. Heavy, degenerating doping at the GaAs and Si surfaces to be bonded is found to be significant for enhancing the GaAs/Si interfacial conductivity and results in ohmic GaAs/Si heterointerfaces even for bonding temperatures of as low as 300°C for both p-type/p-type and p-type/n-type combinations. Utilizing the p+-GaAs/p+-Si and p+-GaAs/n+-Si direct bonding, we have demonstrated a low threshold III–V laser on a Si substrate and a high-efficiency III–V/Si multijunction solar cell, respectively. Our low-temperature direct semiconductor bonding technique opens up a new pathway for realizing high-performance III–V/Si hybrid optoelectronics.
Wafer bonding and layer transfer
Bonding surfaces of the GaAs (100) and Si (100) wafers were first coated with a photoresist to protect the bonding surfaces from particles generated in the dicing process. The wafers were then diced into ∼1 cm2 area dies. The photoresist was then removed with acetone, and the bonding surfaces were degreased. Native oxide was removed by dipping both the GaAs and Si wafer pieces in HF aq. (20 vol%) for 30 s. The two die pieces were then brought into contact with the (011) edges aligned, which is useful for cleavage in the laser fabrication, and annealed at 300–500°C in ambient air for 3 h under a uniaxial pressure of 0.1 MPa. The bonded GaAs/Si interfacial I–V characteristics were measured by a DC bias source with AuGeNi/Au ohmic contacts applied to the outer surfaces of the bonded GaAs/Si pieces. Bonded pairs with varying doping concentrations at the subsequent bond interfaces were investigated. Highly doped p+-GaAs layers were prepared by metallorganic chemical vapor deposition on the p-GaAs (100) wafers. The bonding yields in relation to surface roughness appear in Supplementary Information.
The laser and solar cell structures were layer transferred onto a p+-Si (100) substrate and Si solar cell wafer (details described in Multijunction solar cells section), respectively, through wafer bonding and subsequent removal of the GaAs substrate. After direct semiconductor wafer bonding at 300°C, the GaAs substrate was removed at room temperature by selective chemical etching with H3PO4-H2O2 (3∶7 vol.) followed by 50% citric acid-H2O2 (4∶1 vol.), with the edges of the GaAs wafer coated with photoresist to avoid undercutting of the quantum dot laser structure. The H3PO4-H2O2 and citric acid-H2O2 solution compositions were chosen to maximize the etching rate of GaAs and the etching selectivity between GaAs and AlGaAs, respectively4. The Al0.7Ga0.3As etch stop layer was then removed by HCl aq. (conc.) or HF aq. (20 vol%) at room temperature.
Quantum dot lasers
The InAs/GaAs quantum dot laser structure was grown on a GaAs (100) substrate by molecular beam epitaxy. The laser structure consisted of a 440-nm-thick GaAs layer embedded with ten layers of self-assembled InAs quantum dots with a density per layer of 3.8×1010 cm−2. The GaAs layer was clad with 1.4-μm-thick Al0.4Ga0.6As. An Al0.7Ga0.3As etch stop layer was grown between the GaAs substrate and the lower Al0.4Ga0.6As clad. The as-grown InAs quantum dots exhibited a photoluminescence peak associated with the ground state emission at 1.3 μm with a full width at half maximum of 30 meV at room temperature. Following the wafer bonding and layer transfer described above, broad-area Fabry-Perot lasers with cleaved facets were formed by applying Au/AuGeNi electrodes to the top and bottom of the structure. The finished device is a 3.9-μm-thick double-hetero laser structure bonded to a Si substrate with no mediating agent. The laser cavity length and width were 2.1 mm and 100 μm, respectively. A high-reflection coating was not applied to the cleaved edges.
Multijunction solar cells
The Al0.1Ga0.9As subcell, with a bandgap energy of 1.6 eV, was a p-n Al0.1Ga0.9As/Al0.7Ga0.3As double-hetero structure. The subcell was grown inversely as p-on-n on a GaAs (100) substrate by molecular beam epitaxy with an Al0.7Ga0.3As etch stop layer immediately above the GaAs substrate. This results in an n-on-p top subcell in the final bonded dual-junction cell structure. The Si subcell, with a bandgap energy of 1.1 eV, was prepared by thermal diffusion of P from phosphoric-acid-based glass into the surface region of a p-type Si (100) wafer. Specifically, the GaAs subcell was terminated with a Be-doped GaAs layer with a carrier concentration of 5×1019 cm−3, and the Si subcell was terminated with a P-doped Si layer with a carrier concentration of 1×1020 cm−3. These subcells were directly bonded and followed by GaAs substrate removal, metallization with Au/AuGeNi, and application of an antireflection coating with MgF2/ZnS.
The authors thank Denis Guimard and Masao Nishioka for growing the p+-GaAs bonding layer. This research was supported by the JSPS through the FIRST Program and Kakenhi 23760303, MEXT Japan through the Special Coordination Funds for Promoting Science and Technology, and Intel Corporation.