New technologies are emerging which allow us to manipulate and assemble 2-dimensional (2D) building blocks, such as graphene, into synthetic van der Waals (vdW) solids. Assembly of such vdW solids has enabled novel electronic devices and could lead to control over anisotropic thermal properties through tuning of inter-layer coupling and phonon scattering. Here we report the systematic control of heat flow in graphene-based vdW solids assembled in a layer-by-layer (LBL) fashion. In-plane thermal measurements (between 100 K and 400 K) reveal substrate and grain boundary scattering limit thermal transport in vdW solids composed of one to four transferred layers of graphene grown by chemical vapor deposition (CVD). Such films have room temperature in-plane thermal conductivity of ~400 Wm−1 K−1. Cross-plane thermal conductance approaches 15 MWm−2 K−1 for graphene-based vdW solids composed of seven layers of graphene films grown by CVD, likely limited by rotational mismatch between layers and trapped particulates remnant from graphene transfer processes. Our results provide fundamental insight into the in-plane and cross-plane heat carrying properties of substrate-supported synthetic vdW solids, with important implications for emerging devices made from artificially stacked 2D materials.
The past decade of graphene research has accelerated scientific discovery of 2D transition metal dichalcogenides,1,2 phosphorene,3 silicene,4 and 2D hexagonal boron nitride.5 These materials have unique electrical, thermal, optical, and mechanical properties as compared to their 3-dimensional (3D) counterparts. Electrically, such 2D building blocks exhibit metallic, semiconducting, and insulating behavior, providing novel material combinations for electronic device design.1,6 For example, LBL assembly of graphene with other 2D materials has resulted in ultrathin heterostructures suitable for tunneling field effect transistors7,8,9 and ultrathin optoelectronic devices.10,11 However, the thermal properties of LBL assembled artificial vdW solids have received less attention. Similar to naturally occurring vdW solids, artificial vdW solids are expected to have strong in-plane bonds and weak inter-layer vdW interactions, resulting in anisotropic thermal properties between the in-plane and cross-plane directions.12,13,14
In this work, we use a combination of suspended-bridge electrical thermometry and time-domain thermoreflectance (TDTR) to probe heat flow in LBL assembled graphene-based vdW solids. We pay particular attention to the role of external influences on thermal transport in such films, e.g., grain size and the role of the substrate. We find the in-plane thermal conductivity (k||) of our substrate-supported CVD-grown polycrystalline graphene is approximately equal to that of substrate-supported exfoliated graphene15 at low temperatures (≈120 Wm−1 K−1 at 100 K). The k|| peaks at around room temperature between 300 and 400 Wm−1 K−1, depending on the grain size (Lg), but independent of the number of transferred graphene films grown by CVD which we denote as N. Importantly, we find the k|| of substrate-supported polycrystalline graphene with Lg ~140 nm is approximately 70% of substrate-supported exfoliated graphene, consistent with our previous theoretical study.16 This is an order of magnitude less than freely suspended graphene (2000–4000 Wm−1 K−1),13,14,17,18,19 and consistent with previous electrical thermometry15 and Raman thermometry20 measurements of SiO2-supported graphene. Our results highlight the important roles that substrate and grain boundary scattering play for in-plane thermal transport properties of ultra-thin LBL assembled graphene vdW solids (N = 1–4).
We also probe the cross-plane thermal conductance (G⊥) of LBL assembled graphene vdW solids and find that it is consistently below that of A-B stacked few-layer graphene. These findings present data for the grain size effect on in-plane thermal transport, as well as data probing cross-plane thermal transport in polycrystalline LBL assembled graphene vdW solids supported by dielectric substrates. Our results are highly relevant for future LBL assembled devices and interconnects, highlighting an approach which may be used to tune the heat flow properties of LBL assembled 2D heterostructures.
In-plane thermal measurements
Figure 1a-c shows scanning electron microcroscopy (SEM) images and a schematic cross-section of the suspended thermometry bridges used in this study. The layered graphene samples are supported by a thin silicon nitride bridge to provide thermal isolation and mechanical robustness. X-ray photoelectron spectroscopy reveals a Si3N3.3 stochiometry of the supporting bridges (Supplementary Information) and their thickness varies between 150 and 300 nm depending on the fabrication run (measured by ellipsometry and compared to cross-sectional SEM, inset of Fig. 1b). Polycrystalline graphene is grown on copper foils purchased from Alfa Aesar (CAS 7440-50-8) and then transferred to the Si3N3.3, (initially supported on Si) through a wet-transfer process using a polymer scaffold.21,22,23,24 The polymer is removed in organic solvents followed by annealing in Ar/H2 to remove residual contaminants (see Methods). For samples with more than a single transferred layer of CVD graphene the wet-transfer and anneal process is repeated in a LBL fashion to achieve artificial graphene vdW solids with up to N = 4 CVD layers. Metal heater and sensor strips are then patterned on top by photolithography, separated from the graphene by a thin evaporated SiO2 layer which serves as electrical insulation (see Methods and Supplement). The wafer is back-etched to suspend the supporting Si3N3.3 membrane (Fig. 1c). Our device yield is enhanced by utilizing a thin Al2O3 layer as a through-wafer etch stop for the BOSCH 2 process. The contrast of the graphene and the suspended region of the membrane are easily distinguishable in the final test structure (Fig. 1b).
We use optical transmittance measurements and Raman spectroscopy to characterize the assembled graphene stacks. We find the optical transmittance at 550 nm decreases by ~2.8% with each new layer, in good agreement with previous work (Fig. 1e).25 Raman analysis of LBL assembled graphene stacks shows a decreasing intensity ratio of 2D-peak to G-peak (I2D/IG), and increasing D-peak intensity with increasing transfers (Fig. 1f). From the D-peak in the Raman spectra we can estimate the grain size of a single transferred graphene film (N = 1) as Lg (nm) = 2 × 10−10 λ4(ID/IG)−1, where λ is the excitation laser wavelength and (ID/IG) is the D-peak to G-peak integrated intensity ratio.26,27 The CVD graphene used in the LBL assembly of graphene vdW solids has an average grain size of Lg ~ 140 ± 80 nm (Supplementary Information). We note this is not necessarily a crystallite size defined by the distance between graphene grain boundaries, but rather the distance between Raman-active defects, including graphene wrinkles,28 grain boundaries,29 transitions between single layer to bilayer thickness,30 and regions of polymer residue.31 Our measured Lg is also in good agreement with previous scanning transmission electron microscopy (STEM) imaging of polycrystalline graphene films grown by random nucleation using CVD on copper foils.32
Electrical thermometry measurements proceed as follows. A heating power (~5 to 175 µW) is passed through the heater electrode, while the temperature is sensed by monitoring calibrated changes in the electrical resistance of the heater and two sensors. One side of the measurement platform provides the total in-plane thermal conductance (GL′) of the graphene and silicon nitride film, while the other measures only the supporting silicon nitride film (GR) (Fig. 1c and Fig. S9). The in-plane thermal conductance of the graphene layer(s) (G||) is thus obtained by subtraction. Heat flow measurements are performed from 100 to 400 K under vacuum (~10−5 Torr) where heat loss due to convection is neglible. The maximum heat loss due to radiation is Qrad ≈ 1% at 400 K, where Qrad = σϵAs(T4 – T04). Here, σ is the Stefan-Boltzmann constant, ϵ is the membrane emmissivity (assumed to be 1 to provide an upper bound), As is the area of the suspended membrane, T0 is the background temperature, and T is the average temperature of the suspended membrane. We do not notice a significant temperature hysteresis in our measurements with increasing and decreasing ambient temperature sweeps. In addition, we have also compared a single transferred layer of CVD graphene to LBL assembled stacks of CVD graphene, and to non-equilibrium Green’s function (NEGF) calculations,16 in order to elucidate the role of the supporting substrate and that of graphene grain boundaries on the films’ thermal properties.
Similar to previous work from our group, we use a commercial software package (COMSOL Multiphysics) to extract the thermal properties of graphene from the electrical thermometry data.33,34 Figure 1d shows our optimized 3D finite element method (FEM) model of the suspended thermometry platform and a typical extracted steady-state temperature profile when a graphene film is placed on one side of the platform (also see Supplementary Information). The simulation is performed using isothermal boundary conditions at the bottom and side surfaces of the platform (i.e., at the Si heat sink), while the symmetry plane and the surfaces of the supporting membrane, electrodes, and graphene are given adiabatic boundary conditions. Importantly, the 3D simulations include thermal contact resistance effects of all interfaces33 (Supplementary Information), although these have a minimal effect on the extracted values of k||. A constant power is applied to the center heater electrode, consistent with the Joule heating (PH) induced in the measurements, and the structure is allowed to come to steady state. We then fit the simulated temperature rises in the heater and two sensors to the measured experimental data (ΔTH, ΔTSL, ΔTSR), using the thermal conductivity of the membrane (kSiN) and graphene (k||) as fitting parameters. We find that although our suspended membrane geometry allows us to approximate 1-dimensional heat flow, approximately 10% of the heat flows in a 2D manner near the membrane edges. This is also in good agreement with our analytical model described below.
Analytically, the k|| can be written as
where G|| is the thermal conductance of the graphene, LHL is the distance between the heater and graphene-side sensor, W is the width of graphene, and hg is the thickness of the graphene sample which is assumed to be 0.34 nm per transferred layer. This assumption provides an upper bound on the extracted thermal conductivity, and small thickness fluctuations (e.g., bilayer regions) are not expected to affect heat flow in otherwise continuous single layer graphene.35 G|| is calculated by subtracting the Si3N3.3 thermal conductance (GL) from the combined thermal conductance of the Si3N3.3 and graphene (\(G_L^\prime\)) measured in our differential setup as follows:
Here, PH is the heater power, α and β are dimensionless parameters which account for the asymmetry in heat flow perpendicular to the electrodes and heat loss parallel to the electrodes, respectively. ΔTH, ΔTSL, and ΔTSR, are the measured temperature rises in the heater, graphene-side (left), and Si3N3.3-side (right) sensors, respectively. The distance between the heater and the Si3N3.3-side sensor is LHR. We find the analytical model results are within 5% of the values obtained by the more computationally expensive FEM model (Fig. 2a, b, and Supplementary Figs. S10 and S11), highlighting the advantage of our differential electrical thermometry platform in simplifying the thermal analysis (see Supplementary Information for additional details of the analytical model).
We find the thermal conductivity of our Si3N3.3 films, deposited by plasma enhanced CVD is ~1.3 Wm−1 K−1 at 300 K and exhibits excellent agreement with data from the literature over the full temperature range of our measurements (Supplementary Figs. S11 e-h), providing a good control on our methods. The extracted in-plane thermal conductance values for our N = 1 sample are shown in Fig. 2a. It is easily seen that the \(G_L^\prime\) is significantly higher than GL due to the addition of a single layer of CVD graphene. We find the G|| of substrate-supported polycrystalline graphene films increases almost linearly with each additional layer added to the stack (Fig. 2b). When the G|| of the LBL graphene vdW solids are converted to k|| (Fig. 2c), however, we do not find a significant dependence on layer number up to N = 4, consistent with previous measurements on supported exfoliated few-layer graphene.36
We then compare single-layer graphene with different average grain sizes obtained arbitrarily from two different CVD growths in order to elucidate the role of line defects on thermal transport in substrate-supported graphene. In Fig. 2d, we plot the thermal conductivity of our two N = 1 CVD graphene samples (one with larger Lg is from Fig. 2c; the other with smaller Lg is from Supplementary Fig. S12) vs. their average grain sizes at different temperatures, as well as k|| of monocrystalline exfoliated graphene (limited by the sample width ~2 µm).15 It is shown that the thermal conductivity increases with increasing grain size, reaching ≈70% of the k|| for substrate-supported monocrystalline exfoliated graphene and similar to that of bulk copper when Lg ≈ 140 nm. Importantly, the measured dependence of k|| (symbols) on the grain size shows good agreement with our NEGF calculations16 for k|| vs. Lg (Fig. 2d), where the calculated k|| is the sum of the individual transverse (TA), longitudinal (LA), and flexural acoustic (ZA) phonon modes (Supplementary Fig. S12c). Furthermore, as shown in Supplementary Fig. S12d, the best fits to the experimental data of k|| vs. T are obtained using grain sizes (Lg) of 140 and 60 nm, which are in excellent agreement with the grain sizes extracted by Raman spectroscopy (Supplementary Figs. S2 and S3).
Figure 2f shows a comparison of our data to the selected data from the literature. It illustrates the dominate role of the substrate scattering (Fig. 2e—left) in suppressing the thermal conductivity of substrate-supported graphene as compared to freely suspended graphene. Additional phonon scattering by graphene grain boundaries (Fig. 2e—right) can further reduce its thermal conductivity, and our data provide the temperature-dependent thermal conductivity for substrate-supported polycrystalline graphene. We notice that polycrystalline graphene with small domain sizes still greatly exceeds the thermal conductivity of narrow graphene nanoribbons,33 suggesting such films may be a viable technology for flexible and transparent heat spreaders with potential applications in the field of transparent and flexible electronics.
Cross-plane thermal measurements
We now turn our attention to cross-plane heat flow in LBL assembled graphene vdW solids (Fig. 3). We assemble artificial graphene vdW solids with the number of transferred CVD graphene layers as 1 ≤ N ≤ 7 on SiO2 substrates (Fig. 3d). We then deposit ≈80 nm of Al by shadow-mask evaporation in an electron-beam evaporator, and measure G⊥ of the Al/N layers of graphene/SiO2 stack by TDTR, similar to previous work on exfoliated graphene samples.37 Figure 3b shows TDTR results (symbols) and numerical solutions of our thermal model (solid lines) taking the measurements of the Al/SiO2 interface as a reference. We find a reduction in G⊥ with increasing layer number N. G⊥ varies from ≈25 to 15 MWm−2 K−1 for N = 1–7 (Fig. 3c). These values are consistently below those of A-B stacked exfoliated samples and approach a factor of two reduction in G⊥ as compared to exfoliated graphene samples37 as N approaches 7 transfers.
Figures 3d–f show the schematic representation of our stacked layers, a cross-sectional bright field STEM (BF-STEM) image with trapped particulates indicated in the dark contrast regions, and a line profile of image intensity across the stack, respectively. The peak intensities in Fig. 3f illustrate the layered structure of our graphene stacks (Supplementary Fig. S13). High angle annular dark field STEM (HAADF-STEM) images and electron energy loss spectroscopy (EELS) analysis indicates the large trapped particulates are likely trapped copper particles, remnant from the etching and transfer process38,39 (Supplementary Fig. S13).
These measurements highlight the importance of material processing techniques on the structure–property correlations of thermal transport in LBL assembled graphene vdW solids. Our electrical thermometry measurements reveal the k|| of LBL assembled graphene vdW solids is independent of the number of transferred graphene layers, up to N = 4 transfers, with a value of ~400 Wm−1 K−1 at T = 300 K (Fig. 2c). Similar to mechanically exfoliated graphene supported by SiO2 substrates,15 we find the k|| of polycrystalline graphene films grown by CVD is greatly reduced by the supporting Si3N3.3 substrates, due to suppression of the out-of-plane flexural mode (ZA) phonons. Residual polymer residue remnant from our microfabrication process could also contribute to scattering of ZA phonons and a further reduction of our polycrystalline graphene k||,40 however it appears this effect is less than that of grain boundaries or the substrate here. Our results are also in good agreement with studies of encased graphene and ultra-thin graphite which indicated greater than 34 layers are needed to recover the k|| of bulk graphite.36 Using Raman spectroscopy we correlated a reduction in k|| to a reduction in the extracted Lg, a conclusion further supported by the study of Yasaei et al. which reported the detrimental effect of grain boundaries on thermal transport depending on the grain boundary angle and morphology.41
Our cross-plane thermal conductance (G⊥) measurements of such LBL graphene films show a reduction in G⊥ with increasing layer number (N) from G⊥ ≈ 25 to 15 MWm−2 K−1 for N = 1 to 7. We attribute this reduction to a weakening of vdW coupling between layers, possibly induced by trapped particulates and a rotational mismatch in the lattices of the stacked graphene layers. However, we cannot exclude the possibility that G⊥is reduced due to reduced mechanical coupling to the underlying SiO2 resulting from a potential increase in sample stiffness or changes in the vibrational spectra as additional graphene layers are added to the stack. Importantly, as revealed by AFM and cross-section TEM analysis, residual contaminants from the polymer assisted transfer method remain on the surface and in between the CVD graphene layers even after annealing. When such CVD graphene films are assembled in a LBL fashion this can lead to reduced sample quality which must be taken into account when analyzing data for such LBL vdW solids. Hence, additional advancements in the synthesis of 2D based heterostructures and vdW solids are needed in order to probe truly fundamental thermal transport properties across pristine interfaces in such emerging materials.
In conclusion, we have probed the thermal transport of LBL assembled vdW solids constructed from individual graphene layers grown by CVD. Using electrical thermometry on suspended membrane platforms we measure the k|| of such structures and find it varies between 120 and 425 Wm−1 K−1 over the temperature range of 100–400 K. This is nearly an order of magnitude lower than that of freely suspended CVD-grown graphene films and approximately 30% lower than monocrystalline graphene supported on SiO2. Technologically, this represents an ultrathin transparent heat spreader with a thermal conductivity similar to bulk copper. However, if copper films were scaled to the thickness of our LBL graphene stacks45 the increased boundary scattering would likely reduce the thermal conductivity by more than an order of magnitude, indicating graphene vdW solids have superior performance at the single-nanometer thicknesses we report here.
Graphene growth, transfer, and characterization
Polycrystalline graphene films are grown on 1.4 mil copper foils using a 1-inch quartz tube low-pressure CVD system. The copper foils are annealed under Ar/H2 flow for 60 min at 1000 °C prior to graphene growth, which occurs under CH4 and H2 flow at 1000 °C for 20 min at a pressure of ~500 mTorr. Transfer of the graphene films is performed by coating one side of the copper foil with a bilayer of 495 K and 950 K PMMA. Graphene films on the opposite side of the copper foil are removed by O2 plasma etching and the copper foil is etched overnight in CE-100 purchased from Transene Corporation. The PMMA-graphene film is cleaned in a 10% HCl in DI water solution to remove residual metal particles and rinsed again in DI water prior to transferring the film to the receiving substrates. The PMMA is removed in a 1:1 mixture of methylene chloride to methanol for 20 min and the samples are then annealed in the quartz tube furnace at 400 °C under Ar and H2 flow to remove residual PMMA. Transmittance measurements are performed using a Varian CARY 5G system photospectrometer. Raman measurements are performed using a scanning confocal Renishaw Raman microsope (inVia and WiRE 3.2 software).
Suspended thermometry platforms were fabricated on a dual-side polished silicon wafer (~300 μm thick). A thin layer of Al2O3 (~5 nm) is deposited by atomic layer deposition followed by deposition of low-stress Si3N3.3 films by plasma enhanced CVD in a mixed frequency mode. The Al2O3 layer acts as an etch stop for a BOSCH 2 through-wafer etch. Graphene is transferred to the Si3N3.3/Al2O3/Si substrates as previously described, and standard photolithographic techniques are used to pattern the metal electrodes and graphene samples. The graphene is etched from underneath the electrode patterns using an O2 plasma, followed by electron-beam evaporation of 20 nm SiO2, 5 nm of Ti, and 30 nm of Pd. The thickness of metal contact pads and metal spacers are further increased to ~100 nm by photolithography and e-beam evaporation, in order to allow for easier wire bonding and to provide a spacer between the device active area and the carrier wafer (Supplementary Information). A final photolithography step is used to align backside etch windows to topside features and through-wafer etching is accomplished using a BOSCH 2 process in an induced coupled plasma reactive ion etcher. Photoresists are removed in Remover PG at 80 °C following through-wafer etching. Importantly, graphene films are protected throughout all photolithography process steps by a thin layer of PMGI SF5, a PMMA derivative. Samples for cross-plane thermal measurements are fabricated by transferring graphene films as described above, to SiO2/Si (~90 nm/0.5 mm) substrates followed by shadow mask evaporation of ~80 nm thick Al disks with varying radii between 40 and 125 μm. Graphene thickness and effective grain size are evaluated with Raman spectroscopy using a 633 nm laser. The Si3N3.3 stoichiometry is measured by X-ray photoelectron spectroscopy.
Electrical and thermal measurement
In-plane: The heater and sensors of the suspended membrane devices are wirebonded to a KYOCERA leaded ceramic chip carrier, prior to being placed in a Janis vacuum probe station for measurements. The probe station is capable of reaching vacuum levels down to 10-6 Torr and the ambient temperature is controlled with a Lakeshore model 377 temperature controller and liquid nitrogen cooling. Prior to all measurements the device is annealed for ≈8 h in vacuum at 450 K to stabilize the resistance of all the metal electrodes. The heater and sensor resistances are calibrated as a function of temperature from 80 K to 450 K. This is done using a 4-point Delta Mode technique and the Keithley 6221/2182A current source and nanovoltmeter combo. Current is applied to the heater using a Keithley 4200-SCS and heater power and resistance are monitored with a 4-point current-voltage measurement. The dependence of the sensor resistance as a function of heater power is monitored by a 4-point Delta Mode technique.
Cross plane: The cross-plane thermal measurement is done by time-domain thermoreflectance (TDTR) using a Ti-sapphire laser that operates at a wavelength near 785 nm. All measurements are performed at room temperature. We use a double modulation technique with the pump beam modulated at 9.8 MHz and the probe beam modulated at 200 Hz to improve the signal-to-noise and suppress background created by a diffusely scattered pump light. To a good approximation at high modulation frequencies, the in-phase signal of the lock-in amplifier Vin(t) is proportional to the time-domain response of the sample, i.e., the temperature excursion created by each pump optical pulse. The out-of-phase signal Vout(t) is mostly determined by the imaginary part of the frequency domain response at the modulation frequency and is approximately independent of delay time. Comparing Vin/Vout of measurement and of thermal modeling, we determine the cross-plane thermal conductance of the Al/N layers of graphene/SiO2 stack (G⊥). A complete description of the analysis of TDTR data and the interpretation of Vin and Vout can be found in ref. 42.
The cross-section sample was prepared by lift-out technique using a FEI DB-235 focused-ion beam (FIB). The STEM images and EELS spectra were recorded using a JEOL 2200FS equipped with a CEOS probe corrector at 200 kV. Both BF and HAADF detectors were used for recording.
The data that support the findings of this study are available from the corresponding authors upon reasonable request.
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We thank M.-H. Bae and J.D. Wood for assistance with the experimental setup and optimization of graphene growth and transfer. Experiments were carried out in part in the Frederick Seitz Materials Research Laboratory at the University of Illinois. This work was sponsored by the National Science Foundation (NSF) Graduate Research Fellowship and the National Defense Science and Engineering Graduate Fellowship (D.E. and S.N.D). D.E. acknowledges career development support from Institutional Development Awards (IDeA) from the National Institute of General Medical Sciences of the National Institutes of Health under Grants #P20GM103408 and P20GM109095. J.L. acknowledges support from the National Research Foundation of Korea (NRF) grants funded by the Ministry of Science and ICT (NRF-2017R1A2B3009610 and NRF-2017R1A4A1015564). F.L. and E.P. acknowledge support from the NSF EFRI 2-DARE program under grant #1542883.
The authors declare no competing interests.
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Estrada, D., Li, Z., Choi, GM. et al. Thermal transport in layer-by-layer assembled polycrystalline graphene films. npj 2D Mater Appl 3, 10 (2019). https://doi.org/10.1038/s41699-019-0092-8
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