## Abstract

Vertical stacking of heterogeneous two-dimensional (2D) materials has received considerable attention for nanoelectronic applications. In the semiconductor industry, however, the process of integration for any new material is expensive and complex. Thus, first principles-based models that enable systematic performance evaluation of emerging 2D materials at device and circuit level are in great demand. Here, we propose an ‘atom-to-circuit’ modeling framework for all-2D MISFET (metal–insulator–semiconductor field-effect transistor), which has recently been conceived by vertically stacking semiconducting transition metal dichalcogenide (e.g., MoS_{2}), insulating hexagonal boron nitride and semi-metallic graphene. In a multi-scale modeling approach, we start with the development of a first principles-based atomistic model to study fundamental electronic properties and charge transfer at the atomic level. The energy band-structure obtained is then used to develop a physics-based compact device model to assess transistor characteristics. Finally, the models are implemented in a circuit simulator to facilitate design and simulation of integrated circuits. Since the proposed modeling framework translates atomic level phenomena (e.g., band-gap opening in graphene or introduction of semiconductor doping) to a circuit performance metric (e.g., frequency of a ring oscillator), it may provide solutions for the application and optimization of new materials.

## Introduction

Functionality of an electronic device originates from the interfacial properties of its constituent materials. Advancement of nanofabrication technology has opened up the possibility of realizing interfaces at their ‘ultimate-limit’ by vertical stacking^{1,2,3} or parallel stitching^{4} of 2D materials. Since these new materials inherit diverse electronic and opto-electronic properties, novel device functionalities could be engineered from such atomically thin interfaces.^{5} In such vertically stacked van der Waal’s heterostructures (vdWH),^{6} the individual layers are ‘glued’ together by weak van der Waal’s (vdW) forces of interaction,^{7} whereas the in-plane atoms are strongly bound by covalent or ionic bonds. The hetero-interfaces thus produced, are atomically sharp and self-passivated, i.e., free of dangling bonds and trapped charges. These subtle attributes have encouraged the application of vdWHs as a platform for constructing sophisticated nano-devices such as field-effect transistors (FETs),^{8,9,10} tunnel devices,^{11,12} photo-detector,^{13} light-emitting diode,^{14,15} solar cell,^{16} flexible electronics^{10} etc.

Among all types of FET devices studied theoretically or fabricated for experimental and commercial purposes, the MIS (metal–insulator–semiconductor) structure, which substitutes metal (or highly doped polysilicon) by semi-metallic graphene, SiO_{2} (or high-K gate dielectric) by insulating h-BN, and Si by MoS_{2}, could pave the way for realizing thinnest possible FET. Roy et al.^{9} have demonstrated such experimental device that exhibits n-type behavior with an ON/OFF current ratio >10^{6} and ~33 cm^{2}/Vs electron mobility. The work of Lee et al.^{10} evidences implementation of a flexible and transparent FET claiming field-effect mobilities up to 45 cm^{2}/Vs. At the same time, Jeong et al.^{12} have demonstrated the operation of a MIS diode, where carrier tunneling is the principle transport process. In a similar device Vu et al.^{17} have obtained high photocurrent/dark-current ratio >10^{5} and ultrahigh photodetectivity of 2.6 × 10^{13} Jones. Using first principles-based analysis, Zan et al.^{18} have demonstrated the enhancement of interlayer coupling and linear charge transfer between graphene and MoS_{2} layers upon application of homogeneous electric field, and conversely the weakening of interlayer coupling under applied biaxial strain.

It should, however, be noted that introduction of any new material in the process integration phase of technology development in semiconductor industry is an expensive and time-consuming affair. It is also a difficult task to select appropriate 2D materials from the plethora^{19} without assessing their performance at circuit level. Thus, a modeling framework, that enables systematic performance evaluation of new materials at device and circuit levels before entering into capital-intensive manufacturing phase, is in great demand. Such models must be first principles based so that the assessment could be conducted even before the wafer is available. Despite significant efforts on synthesis and fabrication, community lacks such modeling framework, which can predict integrated circuit performance solely from the crystallographic information of the constituent transistor materials.

In this article, we propose hierarchical bottom-up modeling methodology for all-2D MISFET that bridges between three levels of abstraction viz. material, device, and circuit. It is noteworthy that unlike conventional MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), in this device, the gate electrostatics is dictated by the effects of dipole–dipole interactions,^{20,21,22} prevailing at the interfaces of a typical vdWH. Thus, modeling methodologies reported earlier for 2D-semiconductor FETs^{23,24,25} are not applicable here. Apart from this, the band-gap opening in graphene due to vdW interactions poses additional complexity to the device physics. To capture all these intricate atomic level phenomena at circuit level, we adopt several sophisticated techniques, e.g., density functional theory (DFT)-based atomistic model, tight-binding Hamiltonian for graphene encompassing the effect of sublattice symmetry breaking, Fermi-Dirac (FD) distribution of mobile charge carriers, drift-diffusion (DD) formalism^{26} with bias-dependent diffusivity, and piecewise charge linearization (PWCL) technique.^{27} Finally, we arrive at the closed-form expressions for drain current and terminal charges for the all-2D MISFET, which are implemented in professional circuit simulator using Verilog-AMS interface in order to conduct static and transient simulation of integrated circuits. We induce bandgap variation in graphene by tuning the interlayer distance between hBN and graphene^{28}, and observe its effect at transistor and circuit level. Since doped MoS_{2} is now commercially available,^{29} we further demonstrate a material-device-circuit co-assessment scheme based on the semiconductor doping. The Verilog-AMS module developed in this work connects the material modeling tools^{30,31,32} with industrial electronic design automation tools^{33,34} and thus promises to provide a solution to the DTCO (design-technology co-optimization) challenges for new materials.

## Results

The proposed ‘atom-to-circuit’ modeling framework has been synopsized in Fig. 1. We start with the DFT-based atomistic model development of vdWH in order to probe the energy band structure and interlayer charge transfer. Dielectric constant values and carrier mobilities of the materials have been acquired from reported first principle-based calculations.^{35,36} The material level attributes thus obtained are then used to develop physics-based compact device model to understand the properties of MIS capacitor and FET. Limited by the computational budget, we consider only two layers of hBN for developing the atomistic model, although experiments^{12,17} were conducted using several layers of it. However, our device model parameters could easily be calibrated to any number of hBN-layer based vdWH. Finally, those closed-form expressions of current and charges are implemented in professional circuit simulator to enable design and simulation of a digital logic inverter and a 15-stage ring oscillator.

### Energy band structure and interlayer charge transfer

The geometrically optimized atomic structure of graphene-hBN-hBN-MoS_{2} is shown in Fig. 2(a) (see methods for details). The equilibrium spacings between graphene-hBN (*d*_{1}), MoS_{2}-hBN (*d*_{2}) and hBN-hBN (*d*_{3}) were found to be 3.2, 4.9 and 3.1 Å respectively. It is well-known^{28,37,38,39,40,41,42} that the energy gap at Dirac point of graphene is strongly influenced by the substrates and the stacking pattern of the layers. This is due to the fact that there is always an interplay between the strain energy of graphene, when placed on a substrate^{38} and the reduction of symmetry from C_{6v} to C_{3v} point group due to breaking of the chemical equivalency of carbon lattice sites.^{21} For graphene on top of hBN (CB configuration), there is an effective charge transfer from *C*_{0} (C atom on top of BN hexagon center) atom to C_{B} (C atom on top of B atom) atom owing to the difference in electronegativities of B and N atoms of hBN.^{41} It results into an onsite energy difference of C atoms at different sublattices. Thus, sublattice symmetry is broken and the energy levels of *p*_{z} orbitals of carbon atoms shift to open a bandgap, exactly equal to the onsite energy difference at the Dirac point of otherwise gapless semi-metallic graphene. The band-gap opening in graphene (analogous to depletion in poly-silicon gate of Si MOSFETs) is expected to play a very crucial role in dictating the MIS capacitor and transistor characteristics. Since this bandgap might be perturbed due to material defects, externally applied strain or any uncertainties in process variations, we emulate such bandgap variation by changing the graphene–hBN interlayer distance *d*_{1} (3.2 ± 0.2 Å) of the graphene-hBN-MoS_{2} system.

Figure 2(b) illustrates the band structures of the vdWH with *d*_{1} varying from 3.0 to 3.4 Å with an interval of 0.2 Å. The Fermi level (*E*_{F}) for the band structure is referenced to 0 eV. As depicted in Fig. 2(b), graphene has a bandgap of 0.06 eV at equilibrium separation and the bandgap almost doubles at 0.2 Å decrease of *d*_{1}. Besides, the energy dispersion near Dirac point of graphene resembles more of a parabolic nature^{28} rather than linear one and the parabolicity increases with the reduction of *d*_{1}. It also reveals that the otherwise pristine MoS_{2} becomes p-type in nature due to vdW stacking at equilibrium spacing (*d*_{1} = 3.2 Å), which is in agreement with the reported hBN-MoS_{2} heterostructure.^{43} We further observe that the p-type nature becomes more evident with decreasing values of *d*_{1}, whereas it tends to behave like n-type semiconductor while *d*_{1} increases from its equilibrium value. However, the bandgap of MoS_{2} remains unaltered with a value of 1.71 eV. The absolute numeric values of Δ_{GC}, Δ_{GV}, Δ_{MC}, Δ_{MV}, which represent the shifts in energy of graphene-CBM (conduction band minima), graphene-VBM (valence band maxima), MoS_{2}-CBM and MoS_{2}-VBM respectively, as measured from *E*_{F} and the values of effective masses (viz. \(m_{{\mathrm{e}}{\mathrm{G}}}^ \ast\), \(m_{{\mathrm{h}}{\mathrm{G}}}^ \ast\), \(m_{{\mathrm{e}}{\mathrm{M}}}^ \ast\), \(m_{{\mathrm{h}}{\mathrm{M}}}^ \ast\); where the subscripts denote e: electron, h: hole, G: graphene, M: MoS_{2}) as calculated from band structures, are presented in Table 1 (*m*_{0} being rest mass of electron).

The charge transfer from *C*_{0} to *C*_{B} atom can be quantified by the Mulliken population analysis as listed in Table 2. It reveals the fact that the amount of charge transfer (Δ_{q}) increases with decreasing values of *d*_{1}, indicating wider bandgap opening in graphene. To further investigate the charge redistribution at the hetero-interfaces, we calculate the electron density difference (EDD), Δ*ρ*, for three different values of *d*_{1}, averaged along the z direction as shown in Fig. 2(c). The EDD is computed as \(\Delta \rho = \rho _{G + hBN + MoS_2} - \rho _G - \rho _{hBN} - \rho _{MoS_2}\), where *ρ* represents electron density. In Fig. 2(c), both charge accumulation (positive peaks) and depletion (negative peaks) regions are found at the interfaces. Clearly, the charge redistribution is more pronounced at the graphene–hBN interface rather than hBN–hBN or hBN–MoS_{2} interfaces and it increases at the graphene–hBN interface with decreasing *d*_{1}, while remains almost unaltered at the other two interfaces. When *d*_{1} < 3.2 Å, the surface charge repulsion (Pauli repulsion) dictates the charge redistribution in graphene–hBN interface, whereas for *d*_{1} > 3.2 Å, an accumulation region at the middle of the interlayer spacing indicates strong orbital hybridization^{22} between graphene and hBN. Quite obviously, there is a concoction of Pauli repulsion and orbital hybridization prevalent at *d*_{1} = 3.2 Å. This orbital hybridization originates from the orbital contributions of distinct atoms to the band structure (detailed in Supplymentary Information). The VBM and CBM of graphene at K-point in Brillouin zone are contributed by the *p*_{z} orbitals (π-bonding and π^{*}-antibonding states respectively) of C atoms, which are prone to be perturbed by the interactions with π-electron clouds of hBN, localized around N centers. But this should not be the case for MoS_{2} since its CBM and VBM are mostly composed of \(d_{z^2}\) and \(d_{x^2 - y^2}\) orbitals of Mo atoms; whose interactions with *s* and *p* orbitals of B and N atoms are very limited. However, a comparatively small accumulation region at MoS_{2}–hBN interface indicates orbital hybridization between *s* and *p* orbitals of hBN and nearer S atoms. Interestingly, there is a dipole formation at MoS_{2}–hBN interface which in turn causes the work-function modification,^{22} signifying band alignment of MoS_{2} and hBN. This effectuates a charge transfer between MoS_{2} and hBN, thereby dictating the p-type character of MoS_{2}. To further quantify the charge redistribution, we have calculated the area under EDD curve at MoS_{2}–hBN (between hBN and nearest S atoms) and graphene–hBN interfaces as detailed in Table 3. The higher the value, more pronounced is the charge redistribution with more chemical interactions occurring at the interface. As depicted, the comparatively smaller area under EDD at MoS_{2}–hBN interface remains almost unaltered with variation of *d*_{1}, while for graphene–hBN interface it increases with decreasing *d*_{1}. The threshold voltage of MIS capacitor is expected to increase with the bandgap broadening in graphene and the upward shifting of MoS_{2} band structure. Furthermore, since the charge distribution at the interlayer spacing can be perceived as a way of energy storing, the increment of EDD area at the graphene–hBN interface with decreasing *d*_{1} signifies possible enhancement of the quantum capacitance of graphene as will be elucidated in the next section.

The electronic band structure of the aforesaid vdWH comprising of n-type and p-type MoS_{2} monolayer is depicted in Fig. 2(d). The downward or upward shifting of the bands with respect to the Fermi level is clearly visible for n-type and p-type doping respectively; although the band gaps and effective masses of graphene and MoS_{2} remain unaltered. The values of effective masses and absolute positions of conduction and valence band edges of graphene and MoS_{2} (n or p-type) in the energy scale are provided in Table 1. Figure 2(d) reveals that even though the graphene layer is kept pristine and only MoS_{2} layer undergoes electrostatic doping, due to interlayer charge transfer and thereby charge redistribution, graphene also becomes effectively n-type or p-type according to the doping in MoS_{2}. Since this is mediated by interlayer charge transfer, graphene should eventually tend to remain pristine if we increase the number of hBN layers in between graphene and MoS_{2}.

### MIS capacitor and transistor characteristics

It is worth noting that in previous studies^{18} the electric field within the material system was considered to be homogeneous. The charge distribution inside a material system under spatially varying electric field is beyond the scope of pure DFT calculations.^{44} The proposed model is thus useful to understand the C-V characteristics of the vdWH system. The transistor schematic of the concerned vdWH-based MISFET is illustrated in Fig. 3(a), where ‘S’ and ‘D’ denotes source and drain (deemed to be ‘ideal’) respectively, *V*_{GS} and *V*_{DS} refer to gate-to-source and drain-to-source voltage respectively. The non-ideal effects arising from the charges, unintentionally present in semiconductor substrate have been neglected in this work. The coined device symbol is portrayed in inset of Fig. 3(a). The electrical equivalent circuit of this MIS capacitor is shown in Fig. 3(b) that consists of three capacitors in series connection viz. quantum capacitance of graphene (*C*_{qG}), insulator capacitance of bilayer hBN (*C*_{I}) and quantum capacitance of MoS_{2} (*C*_{qM}). Considering the semiconductor body to be grounded, if we apply a gate voltage *V*_{G} in graphene, equal amount of charge will be stored in all three capacitors, thereby causing a potential drop of *Ψ*_{G} across *C*_{qG}, *Ψ*_{I} across *C*_{I} and *Ψ*_{S} across *C*_{qM}. For convenience, the relevant band structure parameters used in our model are depicted in Fig. 3(c). The calibrated tight-binding Hamiltonian (see methods section) and corresponding energy dispersion relations, used for device model development, are found to be in good agreement with DFT calculation as shown in Fig. 3(d), where \(m_{eG}^ \ast = \Delta _{GC}/v_F^2\) (*v*_{F} being the reduced Fermi velocity of graphene over hBN) and \(m_{hG}^ \ast = \Delta _{GV}/v_F^2\). For a given bias condition, the variation of the inversion charge density in MoS_{2} layer (\(Q_I^\prime\)) along the MISFET channel as a function of surface potential *Ψ*_{S} is demonstrated in Fig. 3(e). Similar to conventional Si-MOSFETs, \(Q_I^\prime\) holds a linear relationship with *Ψ*_{S} as long as the band gap opening in graphene is small. However, significant non-linearity creeps in as the bandgap broadens, which necessitates PWCL technique based drain current and terminal charge modeling as discussed in methods section.

Figure 4(a) and (b) respectively depicts the plots of *C*_{qG} and *C*_{qM} as a function of *V*_{GS} (swept from 0 V to 1.5 V) with *V*_{DS} set to 0 V. It is found that both *C*_{qG} and *C*_{qM} operate within the quantum capacitance limit (i.e., *q*^{2}*g*_{2D}, where *q* is fundamental electronic charge and *g*_{2D} is 2D density of states). The value of *C*_{qG} increases as we decrease the interlayer separation due to the increased charge redistribution at graphene–hBN interface as mentioned before. However, unlike *C*_{qG}, *C*_{qM} doesn’t even tend to saturate at large gate bias of 1.5 V. The total gate capacitance of the device as seen from the gate terminal, i.e. *C*_{gg}, can be calculated as \(C_{gg} = \left( {1/C_{qG} + 1/C_I + 1/C_{qM}} \right)^{ - 1}\) using the value of *C*_{I}, computed to be ~26.5 fF considering the relative permittivity of bilayer hBN, i.e. *ε* to be 1.9.^{35} The variation of *C*_{gg} as a function of *V*_{GS} has been plotted in Fig. 4(c) keeping *V*_{DS }= 0 V. It reveals that saturated *C*_{gg} increases with increasing bandgap of graphene and the crossing between individual graphs is a direct consequence of threshold voltage increment of the device. In the overall capacitance-voltage characteristics, *C*_{gg} is mostly dominated by *C*_{qG}.

Figure 4(d) and (e) respectively provides the transfer and drain characteristics of the MISFET, where *I*_{DC} denotes the dc drain current flowing in the channel. The transfer characteristics of Fig. 4(d) clearly points out the threshold voltage increment of the transistor as bandgap opening in graphene becomes more pronounced with decreasing *d*_{1}. However, the subthreshold slope remains almost unaltered in all three cases. The subthreshold swings were calculated to be ~60.48 mV/decade for all cases. This is because in subthreshold regime *C*_{qM} is found to be much smaller than *C*_{qG} and *C*_{I}, which makes the subthreshold slope factor nearly unity. In the drain characteristics, delineated in Fig. 4(e), *I*_{DC} attains a maximum value of ~60 μA/μm for *d*_{1} = 3.2 Å. Since the threshold voltage is maximum for *d*_{1} = 3.0 Å, it bears the lowest pinch-off voltage (*V*_{P}) among all three cases and that’s why the corresponding drain current saturates at earliest having smallest saturation drain current value (*I*_{D,sat}). From similar analogy, the transistor with *d*_{1} = 3.4 Å has highest *V*_{p} and therefore it should have maximum *I*_{D,Sat}. However, this is not the case due to the trade-off between *V*_{p} reduction and *C*_{gg} increment. The higher capacitance value for *d*_{1} = 3.2 Å drives the drain current of the transistor with *d*_{1} = 3.2 Å to be greater than that with *d*_{1} = 3.4 Å. On the other hand, upon introduction of n-type doping in MoS_{2}, the threshold voltage of the device decreases and accordingly *I*_{DC} attains a much higher value (~105 μA/μm) at saturation (see Supplementary Information). Conversely, the threshold voltage of the transistor with p-type MoS_{2} as channel material increases and *I*_{DC} saturates with a value as small as ~17 μA/μm (see Supplementary Information). We also plot the nature of two important transcapacitances: *C*_{gd} (calculated at *V*_{GS }= 1.5 V) and *C*_{dg} (calculated at *V*_{DS} = 1.5 V) in Fig. 4(f), which follow the similar trends as that of *C*_{gg}. For all these characteristics, the mobility value is taken to be 400 cm^{2}/Vs as estimated by the DFT + Bolzmann formalism.^{36}

### Digital logic performance

The equations for proposed compact device model are shown in Fig. 5 (where *V*_{CB} is channel potential/imref; *W* and *L*—both taken to be 1 μm, specifies the channel width and length respectively; *μ* and *D*, respectively denotes low-field mobility and field-dependent diffusivity; *Q*_{G}, *Q*_{D}, *Q*_{S} and *i*_{G}, *i*_{D}, *i*_{S} refers to terminal charges and currents at gate, drain and source respectively; and finally \(Q_{I_n}^\prime\) and \(\psi _{S_n}\) symbolizes the values of \(Q_I^\prime\) and *Ψ*_{S} at n^{th} breakpoint). The surface potential equation ζ = 0 (Eqn. (F1) in Fig. 5) is a function of gate bias, imref and material parameters, which are obtained from the DFT calculations. We solve this equation numerically for different bias conditions to calculate the surface potentials and inversion charge densities, and thereby the dc drain current (*I*_{DC}) and terminal charges (*Q*_{G}, *Q*_{D}, and *Q*_{S}) become explicit polynomials of them. Efficient algorithms^{45,46} could be developed in this regard to solve such equations inside the circuit simulator. We implement this model in professional circuit simulator^{34} or SPICE (simulation program for integrated circuit emphasis) using its Verilog–AMS interface in order to conduct static and transient simulation of integrated circuits. As shown in Fig. 5, SPICE engine assigns terminal voltages (viz. *V*_{G}, *V*_{D} and *V*_{S}) to the Verilog-AMS module, which computes terminal currents (viz. *i*_{G}, *i*_{D} and *i*_{S}) according to Eqn. (F1)–(F5), and then returns them to the individual terminals to be further processed by the SPICE engine. A direct implementation of these equations in SPICE without any numerical pitfall is very tedious and time-consuming process. For simulation of basic logic circuits, however, a look-up table approach will suffice and be followed in this work. First, we have designed a resistive-load inverter (see Fig. 6(a)) and simulated its voltage transfer characteristics (VTC) with the input voltage varying from 0 V to 1.5 V, as plotted in Fig. 6(b). It reflects the effect of bandgap broadening of graphene by indicating the positive shift of threshold voltage of the inverter, designed with the MISFET having smaller *d*_{1}. Also plotted in Fig. 6(b) are the VTC of the logic inverters designed with the MISFETs having n and p-type MoS_{2} monolayers as semiconducting channel materials. As depicted in Fig. 6(b), the inverter corresponding to n-type MoS_{2} channel experiences a smaller threshold voltage, whereas the inverter with p-type MoS_{2} has a greater threshold voltage. Clearly, this effect of threshold voltage modification is quite similar to the effect of band gap modulation of graphene. Subsequently, we have designed 15-stage ring oscillator circuits with these resistive-load inverters to study the transient response. The output voltage waveforms of three ring oscillators (each designed with the MISFETs with different values of *d*_{1}) are shown in Fig. 6(c). It exhibits moderate changes in oscillation frequencies as mentioned in the figure itself. To be precise, variation of *d*_{1} by ± 0.2 Å results in increment of the oscillating frequency by a factor of 1.085 and conversely, a decrement of the same by a factor of 0.85. The ring oscillator featuring *d*_{1} = 3.0 Å possesses the lowest frequency of oscillation among all. The waveforms of the oscillators featuring MISFETs with n and p-type MoS_{2} channel have also been plotted in Fig. 6(c) and similar trends of increment and decrement of oscillating frequencies are observed. For n-type doping, the frequency increases to 1.125*f*_{0} and it decreases to 0.85*f*_{0} for p-type doping, with *f*_{0} = 5.75 MHz being the frequency of the ring oscillator featuring undoped MoS_{2} channel and *d*_{1} = 3.2 Å. Good convergence of the simulations in all cases advocates the practicality and applicability of the proposed model for large-scale circuit simulation in order to assess the device performance at circuit level at the early stage of technology development.

## Discussion

In this article, we propose a first principle-based ‘atom-to-circuit’ modeling methodology, which can assess the impact and predict the performance of a material or material-system at device and circuit level even in the absence of any experimental data. We demonstrate two applications of the proposed model: (i) effect of band-gap fluctuation of graphene on the circuit performance and (ii) material-device-circuit co-assessment scheme considering semiconductor doping as a design parameter. A schematic view as depicted in Fig. 6(d) captures the basic philosophy of the proposed modeling scheme, which bridges between first principle-based material modeling tools and industry standard circuit simulators. The model equations could further be simplified to be applicable for any 2D-material-channel MOSFET with conventional gate stack. Furthermore, since we use industry-standard DD formalism for SPICE model development, the proposed model is ‘core’ in nature and standard techniques (i.e., pre-correction) for including several small geometry effects (such as drain induced barrier lowering, velocity saturation etc.) could easily be conjoined with it. Henceforth, this stupendous flexibility and extensive scope of applicability should encourage our modeling framework to stand high.

## Methods

### Atomistic model development

In order to carry out the first principles-based calculations, the DFT code as implemented in atomistix tool kit (ATK)^{30} is employed in conjunction with generalized gradient approximation (GGA) exchange correlation and the Perdew-Burke-Ernzerhof (PBE) functional.^{47} Apart from that, we have used the OpenMX (Open Source package for Material eXplorer) norm-conserving pseudopotentials^{48,49} as implemented in ATK database with pseudo-atomic orbitals (PAO) and ‘medium’ basis sets for the constituent atoms. To be precise, the LCAO (linear combination of atomic orbitals) basis sets for ‘C’, ‘B’, ‘N’ and ‘S’ atoms are adopted to be s^{2}p^{2}d^{1}, and s^{3}p^{2}d^{1} for ‘Mo’ atom. The k-points in the Monkhorst-Pack grid^{50} were set to 9 × 9 × 1 along with the density mesh cutoff of 90 Hartree. The maximum iteration steps were set to 200 using Pulay mixer algorithm and the Poisson solver we followed was the fast Fourier transform (FFT). To account for the vdW interactions in the heterostructures, we have incorporated Grimme DFT-D2 semi-empirical correction^{51} as defined in ATK database in combination with counterpoise correction^{52} that deals with the basis set superposition error (BSSE) of LCAO basis sets. Furthermore, for all the structures, we have provided sufficient vacuum in the perpendicular, i.e., normal-to-the-plane direction to avoid spurious interactions between periodic images. The geometry optimization of the unit cells of graphene, hBN, and semiconducting 2H-MoS_{2} were performed using the LBFGS (Limited-memory Broyden-Fletcher-Goldfarb-Shanno) algorithm^{53} with maximum stress tolerance value of 0.001 eV/Å^{3} and force tolerance of 0.01 eV/Å. Keeping in mind the commensurability condition, the interfaces between these constituent materials were formed by 4 × 4 MoS_{2} supercell (lattice parameter = 12.77 Å), 5 × 5 hBN supercell (lattice parameter = 12.63 Å) and 5 × 5 graphene supercell (lattice parameter = 12.36 Å), leaving 0.75% and 1.88% mean absolute strain on hBN and graphene respectively, which are reasonably small. In order to model n and p-type doped MoS_{2} monolayers, we have exercised the method of electrostatic doping (using n and p-type atomic compensation charges^{54,55}) available in ATK^{30} instead of explicitly substituting the Mo atoms by elemental dopant atoms (e.g., Nb for p-type^{56} and Au, Re for n-type^{57}). This is because in order to achieve a practical n or p-type doping concentration in MoS_{2} (typically 1 × 10^{17} − 1 × 10^{19} cm^{−3})^{58} by substitutional doping, a very large supercell is needed, which demands very large computation cluster. Such electrostatic doping scheme is very effective and advantageous since it does not depend on exact detail of dopant atoms.^{54} Here, the doping concentration is set to 1 × 10^{19} cm^{−3} for both n and p-type doping.

### Development of energy dispersion relations

We start with the 2-band Hamiltonian of graphene that incorporates the effect of sublattice symmetry breaking.^{42,59,60} In nearest-neighbor *π*– electron tight-binding parlance, where sublattice symmetry breaking can be parameterized by a mass term, the Hamiltonian describing electronic properties of graphene near the Fermi level can be approximated as^{59}:

where, *k* is wave vector relative to Dirac (K or K′) point, *ħ* is modified Planck’s constant and Δ is the onsite energy difference between two sublattices A and B, which in turn equals to \(m^ \ast v_{\mathrm{F}}^2\) (\(m^ \ast\) = \(m_{{\mathrm{eG}}}^ \ast\) or \(m_{{\mathrm{hG}}}^ \ast\)). This Hamiltonian operates on spinors \(\Psi = \left( {\begin{array}{*{20}{c}} {\Phi _{\mathrm{A}}} \\ {\Phi _{\mathrm{B}}} \end{array}} \right)\) (where Φ_{A} and Φ_{B} are the amplitudes of the wavefunctions of two sublattices), to produce the energy eigenvalues of the form: \(E = \pm \sqrt {\Delta ^2 + \left( {\hbar v_{\mathrm{F}}k} \right)^2}\). For graphene on top of hBN, Δ ≠ 0 and the energy dispersions near the Dirac points can be approximated to be parabolic having the form^{28}:

Here, ‘±’ sign corresponds to the conduction band (CB) with Δ = Δ_{GC} and valence band (VB) with Δ = Δ_{GV} respectively, defining the non-zero bandgap introduced at Dirac point as: *E*_{gG} = Δ_{GC} + Δ_{GV}. Although for ±0.2 Å variation of *d*_{1}, the bandgap opening is symmetric (i.e., Δ_{GC} = Δ_{GV}) about *E*_{F}, in general Δ_{GC} may not be equal to Δ_{GV} for further reduction of *d*_{1}. On the other hand, the band structure of MoS_{2} can also be approximated to be simple parabolic in nature, written as^{23,25}:

for CB (VB) (where ‘+’: CB and ‘–’: VB), featuring a bandgap of *E*_{gM} = Δ_{MC} + Δ_{MV}.

Thereafter, we obtain the expressions for density of states (DOS) of conduction and valence bands of graphene and MoS_{2} as: \(g_{{\mathrm{Gn}}} = \frac{{g_{{\mathrm{sG}}}g_{{\mathrm{vG}}}\Delta _{{\mathrm{GC}}}}}{{2\pi \left( {\hbar v_{\mathrm{F}}} \right)^2}}\) (for graphene CB), \(g_{{\mathrm{Gp}}} = \frac{{g_{{\mathrm{sG}}}g_{{\mathrm{vG}}}\Delta _{{\mathrm{GV}}}}}{{2\pi \left( {\hbar v_{\mathrm{F}}} \right)^2}}\) (for graphene VB), \(g_{{\mathrm{Mn}}} = \frac{{g_{{\mathrm{sM}}}g_{{\mathrm{vM}}}m_{{\mathrm{eM}}}^ \ast }}{{2\pi \hbar ^2}}\) (for MoS_{2} CB) and \(g_{{\mathrm{Mp}}} = \frac{{g_{{\mathrm{sM}}}g_{{\mathrm{vM}}}m_{{\mathrm{hM}}}^ \ast }}{{2\pi \hbar ^2}}\) (for MoS_{2} VB). Here, *g*_{sG}, *g*_{sM} are spin degeneracies (both taken as 2) and *g*_{vG}, *g*_{vM} are valley degeneracies (both taken as 2) of graphene and MoS_{2} respectively.

### MIS capacitor modeling

Employing Fermi-Dirac statistics, we first calculate the intrinsic carrier concentrations in graphene (MoS_{2}) as:

where, *n*_{G} (*n*_{M}) and *p*_{G} (*p*_{M}) stands for electron and hole concentrations in graphene and MoS_{2} respectively, *K* is the Boltzman constant and *T* is temperature (taken as 300 K). Now, if we symbolize net electron and hole concentrations in graphene and MoS_{2} (upon application of *V*_{G}) by *n*_{netG}, *p*_{netG}, *n*_{netM} and *p*_{netM} respectively, then the total charge densities in these two layers can be written as \(Q_{\mathrm{G}}^\prime = q\left( {p_{{\mathrm{netG}}} - n_{{\mathrm{netG}}}} \right)\) for graphene and \(Q_I^\prime = q\left( {p_{{\mathrm{netM}}} - n_{{\mathrm{netM}}}} \right)\) for MoS_{2}, where

Here, we consider the charge distribution inside MoS_{2} to be an ideal 2D sheet having no spatial variation, which removes the burden of solving Poisson’s equation beforehand. On the other side, *Ψ*_{G}, *Ψ*_{I} and *Ψ*_{S} sum up to satisfy the potential balance equation, which is:

where *Ψ*_{I} can be calculated as:

Here, we neglect any leakage current through the hBN layers. Now using Eqns (5)–(7), the charge balance equation can be solved numerically for *Ψ*_{S}, which can be written as:

that ultimately takes the form of Eqn. (F1) of Fig. 5 with *V*_{CB} set to zero.

Once we get the numeric values of *Ψ*_{S}, the other two potentials *Ψ*_{G} and *Ψ*_{I} can be easily computed, thereby facilitating the computation of quantum capacitances viz. *C*_{qG} and *C*_{qM} using the following expressions:

For a similar device with more than two hBN layers, the model equations will remain all the same, however, the parameters viz. Δ_{GC}, Δ_{GV}, Δ_{MC}, Δ_{MV}, *v*_{F}, \(m_{{\mathrm{eM}}}^ \ast\), \(m_{{\mathrm{hM}}}^ \ast\) and *ε* need to be recalculated using DFT. Similarly, for the heterostructures with n or p-type MoS_{2} monolayers, the whole set of equations will essentially remain same, provided the aforesaid parameters are obtained from DFT calculations of that particular heterostructure. This is because the effect of doping has been effectively captured here through the positions of the band extrema in the energy scale and corresponding effective masses and that basically rules out the necessity of introducing a doping term explicitly in the charge neutrality equation. It is noteworthy that the band structure obtained from DFT calculation is qualitatively similar to the previously reported work,^{18} which uses different simulation toolkit and deals with single hBN layer. In this aspect, the proposed model equations are independent of the exchange-correlation functionals or pseudopotentials; only the relevant model parameters need to be calculated accordingly.

### MISFET modeling

To formulate the drain current and terminal charges, we adopt the semiclassical DD formalism,^{26,61} which has been practiced in industrial top–down compact modeling methodology over the years. We can take the benefits arising from well-established techniques available to add different small geometry effects to the core model as future work. It also allows us to develop the model without using any unphysical model parameters or interpolating function. Since the proposed model involves only material parameters (CBMs, VBMs, effective masses, dielectric constant, and mobility), which could be calculated by first principles-based methods, it can predict the device and circuit characteristics just from the crystallographic information of the constituent materials.

In DD formalism, the dc drain current equation reads^{61}:

where, *Ψ*_{S0}, *Ψ*_{SL} and \(Q_{I0}^\prime\), \(Q_{IL}^\prime\) are the values of *Ψ*_{S} and \(Q_I^\prime\) at source (*x* = 0) and drain (*x* = *L*) end of the transistor respectively, with *x* being considered as the direction of transport. Since we explicitly use FD statistics to describe carrier occupation probability, instead of using typical Einstein relation, we treat the diffusivity coefficient *D* to be bias dependent.^{62} We express *D* as^{63} \(\left. {D = \mu Q_I^\prime \left( {d\it\Psi _{\mathrm{S}}/dQ_I^\prime } \right)} \right|_{V_{{\mathrm{DS}}} = 0}\) to ensure zero drain current at *V*_{DS} = 0. Due to complex nature of *ζ*, an analytical solution of Eq. (9) is not possible. Hence, we apply charge linearization technique^{27} to obtain a closed form expression of the drain current. In case of conventional Si-MOSFET, for a given bias condition, \(Q_I^\prime\) changes quasi-linearly with *Ψ*_{S} along the channel and hence \(Q_I^\prime\) is approximated as a linear function of *Ψ*_{S} in Eqn. (10), which results in a quadratic relationship between *I*_{DC} and *Ψ*_{S}. Such relationship is very useful to obtain closed form expression of terminal charges under Ward-Dutton (WD)^{64} charge partitioning scheme. However, as shown in Fig. 3(e), due to the band-gap opening in graphene, \(Q_I^\prime\) does not always maintain a linear relationship with *Ψ*_{S} in case of vdWH MISFET. Thus, in this work we adopt PWCL technique^{27} (see Supplementary Information). Using the expression of drain current, the terminal charges could be computed under WD charge partitioning^{64} scheme as: \(Q_{\mathrm{G}} = - W\mathop {\int}\limits_0^L {Q_{Ix}^\prime \left( x \right)dx}\), \(Q_{\mathrm{D}} = W\mathop {\int}\limits_0^L {\frac{x}{L}Q_{Ix}^\prime \left( x \right)dx}\) and *Q*_{S} = −(*Q*_{G }+ *Q*_{D}), where \(Q_{Ix}^\prime\) is the value of \(Q_I^\prime\) at any position *x* in the channel. Similar to state-of-the-art surface potential-based Si-MOSFET models,^{65} Eqns. (F2)–(F5) are ‘single-piece-continuous’ equations, valid for all regimes of transistor operation.

### Data availability

The authors declare that the main data supporting the findings of this study are available within the paper and its Supplementary Information file. MATLAB and Verilog-AMS codes are freely available at osf.io/me236. Other relevant data are available from the corresponding author upon request.

## Additional information

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## Acknowledgements

This work was supported by Science and Engineering Research Board (SERB), Department of Science and Technology (DST), Government of India, under Grant SB/S3/EECE/0209/2015. We would like to thank G.N. Kadloor, DESE-IISc, for his help in preparing Fig. 6(d).

## Author information

### Affiliations

#### Department of Electronic Systems Engineering, Nano-Scale Device Research Laboratory, Indian Institute of Science (IISc) Bangalore, Bangalore, 560012, India

- Biswapriyo Das
- & Santanu Mahapatra

### Authors

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### Contributions

B.D. performed the DFT calculations, developed the compact device model, conducted SPICE simulations, and analyzed final results. S.M. conceived the problem statement and overall supervised the work. All authors contributed in the writing.

### Competing interests

The authors declare no competing interests.

### Corresponding author

Correspondence to Biswapriyo Das.

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