Error-corrected gates on an encoded qubit

Abstract

To reach their full potential, quantum computers need to be resilient to noise and decoherence. In such a fault-tolerant quantum computer, errors must be corrected in real time to prevent them from propagating between components1,2. This requirement is especially pertinent while applying quantum gates, where the interaction between components can cause errors to spread quickly throughout the system. However, the large overhead involved in most fault-tolerant architectures2,3 makes implementing these systems a daunting task, motivating the search for hardware-efficient alternatives4,5. Here, we present a gate enacted by an ancilla transmon on a cavity-encoded logical qubit that is fault-tolerant to ancilla decoherence and compatible with logical error correction. We maintain the purity of the encoded qubit by correcting ancilla-induced errors in real time, yielding a reduction of the logical gate error by a factor of two in the presence of naturally occurring decoherence. We also demonstrate a sixfold suppression of the gate error with increased ancilla relaxation errors and a fourfold suppression with increased ancilla dephasing errors. The results demonstrate that bosonic logical qubits can be controlled by error-prone ancilla qubits without inheriting the ancilla’s inferior performance. As such, error-corrected ancilla-enabled gates are an important step towards fault-tolerant processing of bosonic qubits.

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Fig. 1: Working principle of the error-corrected logical gate.
Fig. 2: Experimental protocol and tomography of logical states after gate application.
Fig. 3: Benchmarking of the logical gate.

Data availability

The data that support the findings of this study are available from the corresponding authors upon reasonable request.

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Acknowledgements

We thank N. Frattini and K. Sliwa for providing the Josephson parametric converter and N. Ofek for providing the logic for the field programmable gate array used for the control of this experiment. We thank M. Zhang and Y. Wong for helpful discussions. S.R., L.F. and R.J.S. acknowledge funding support from the US Army Research Office (W911NF-18-1-0212). P.R. and S.R. were supported by the Air Force Office of Scientific Research (FA9550-15-1-0015 and FA9550-14-1-0052).

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P.R. and S.R. fabricated the transmon qubits, assembled the experimental apparatus, performed the experiments and analysed the data under the supervision of L.F. and R.J.S. W.-L.M. and L.J. provided theoretical support. P.R., S.R. and R.J.S. wrote the manuscript with feedback from all authors.

Corresponding authors

Correspondence to Philip Reinhold or Serge Rosenblum.

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Competing interests

L.F. and R.J.S. are co-founders of, and equity shareholders in, Quantum Circuits, Inc. S.R., P.R., L.J., L.F. and R.J.S. are inventors on patent application no. 62/613,974 submitted by Yale University, which covers hardware-efficient fault-tolerant operations with superconducting circuits.

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Peer review information Nature Physics thanks Tanay Roy and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Supplementary Information

Supplementary Figs. 1–5, Table 1 and Discussion.

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Reinhold, P., Rosenblum, S., Ma, W. et al. Error-corrected gates on an encoded qubit. Nat. Phys. 16, 822–826 (2020). https://doi.org/10.1038/s41567-020-0931-8

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