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# Nanonet: Low-temperature-processed tellurium nanowire network for scalable p-type field-effect transistors and a highly sensitive phototransistor array

## Abstract

Low-temperature-processed semiconductors are an emerging need for next-generation scalable electronics, and these semiconductors need to feature large-area fabrication, solution processability, high electrical performance, and wide spectral optical absorption properties. Although various strategies of low-temperature-processed n-type semiconductors have been achieved, the development of high-performance p-type semiconductors at low temperature is still limited. Here, we report a unique low-temperature-processed method to synthesize tellurium nanowire networks (Te-nanonets) over a scalable area for the fabrication of high-performance large-area p-type field-effect transistors (FETs) with uniform and stable electrical and optical properties. Maximum mobility of 4.7 cm2/Vs, an on/off current ratio of 1 × 104, and a maximum transconductance of 2.18 µS are achieved. To further demonstrate the applicability of the proposed semiconductor, the electrical performance of a Te-nanonet-based transistor array of 42 devices is also measured, revealing stable and uniform results. Finally, to broaden the applicability of p-type Te-nanonet-based FETs, optical measurements are demonstrated over a wide spectral range, revealing an exceptionally uniform optical performance.

## Introduction

The development of large-area thin-film semiconductors at low temperature (≤200 °C) with stable device performance is of great interest for various applications, including flexible electronics, display-panel systems, and logic circuit devices.1,2,3,4 Specifically, the reported processing techniques for fabricating high-performance devices require a dependable vacuum environment, high-temperature annealing process, and a long processing time; thus, these techniques have limited applicability and are not cost-effective.5,6 In this regard, existing low-temperature-processed n-type semiconductor material systems with respectable good device performance, such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxide (ZnO), indium oxide (In2O3), and cadmium sulfide (CdS), have been investigated; however, these systems have limitations in terms of high-temperature annealing (to improve the crystallinity and stoichiometry), additional doping interactions, and the high cost for scalable additive fabrication.5,6,7,8 Based on the desire for the low-temperature processing of thin-film semiconductors, there are many studies on various p-type semiconductor materials, including organic compounds, metal oxides, and amorphous silicon with extremely low mobility of <1 cm2/Vs,9,10,11 presenting challenges to their wide applicability and requiring an improvement in device performance to reach an acceptable level. On the other hand, among p-type materials, polycrystalline germanium (p-Ge) exhibits high carrier mobility (~ 80 cm2/Vs) but has limited wide-scale application due to requiring a higher temperature (>400 °C) annealing process and the crystallization of its doped metals.12 Additionally, an extensively explored p-type semiconductor material, carbon nanotubes (CNTs), exhibits high device performance and has been reported in various applications, including complementary metal-oxide-semiconductor (CMOS) architectures, storage devices, and biosensors,13,14,15,16,17 but nanoscale processing over scalable additive fabrication remains a significant concern.

Recently, a promising p-type semiconductor material, namely, tellurium, has been increasingly studied in the field of electronic and optoelectronic devices based on its tunable bandgap (an indirect bandgap of approximately 0.35 eV and a direct bandgap of approximately 1.04 eV in bulk and monolayer samples, respectively) and excellent carrier transport properties.18,19,20,21,22 Te typically exhibits a trigonal atomic structure in which atoms form helical chains with strong bonding between neighboring atoms based on van der Waals interactions.23,24,25,26 In previous reports, large-scale polycrystalline Te films have also been prepared and studied using thermal evaporation processes.4,27,28 The material properties of Te films are dependent on the deposition temperature and rate, making it difficult to obtain highly crystalline Te in a scalable area.28,29 Alternatively, another approach using tellurium nanowires (TeNWs) has been widely studied, and various methods for synthesizing TeNW films, which differ significantly from bulk Te films, have been investigated.30,31,32,33,34 Atomic chains of one-dimensional (1D) Te have been observed in curled shapes over large surface areas, which makes such surfaces very sensitive as field-effect transistors (FETs).35,36,37,38,39 The stabilization of 1D nanowires has been successfully demonstrated by introducing CNT and boron nitride nanotube (BNNT) encapsulation methods that provide high-performance structural characteristics and active shielding for filling materials,35,36,37,38,39 but limits the applicability of this material.

Herein, we report a unique low-temperature-processed (≤100 °C) method for the scalable deposition of a tellurium nanowire network (Te-nanonet) to fabricate high-performance FETs with stable electrical and optical properties. The presented Te-nanonet is patterned by a dry etching process based on a conventional photolithography process, and FET devices based on the patterned Te-nanonet are fabricated through a lift-off process. Additionally, a transistor array of 42 devices based on the Te-nanonet is fabricated, revealing strong electrical properties with excellent uniformity and stability. The proposed Te-nanonet-based phototransistor is also analyzed at different wavelengths of visible light (405 nm, 538 nm, and 632 nm), and the optical results reveal a stable Vth shift, reliable photocurrent (Iphoto), excellent photoresponsivity (95.64 AW−1), high detectivity (87.34 × 1010), linear sensitivity, and desirable rise/fall time responses (5 and 7 s, respectively. Additionally, the photoresponse of the proposed transistor array exhibits high stability in terms of photocurrent (Iphoto) and photoresponsivity (R) when exposed to blue light (405 nm) at a power intensity of 1.2 mW. Thus, this study proposes a unique platform for low-temperature-processed next-generation electronic applications.

## Materials and methods

### Synthesis of Te-nanonet

Te-nanonets were grown using a hydrothermal method in the presence of polyvinylpyrrolidone (PVP) as a capping agent. First, 2 mmol of Na2TeO3 (99%, Sigma Aldrich, USA) and 2.4 g of PVP (average M.W. 58,000, Alfa Aesar, USA) were dissolved in 84 mL of deionized water to form a clear solution. Next, 4 mL of hydrazine monohydrate (80%, DAEJUNG, Korea) and 8 mL of an aqueous ammonia solution (28%, JUNSEI, Japan) were added. Then, the solution was sealed in a Teflon-lined stainless steel autoclave. The solution was reacted at 160 °C for 4 h and rapidly cooled to room temperature with running water. The products were precipitated by adding 160 mL of acetone and then washed with deionized water and ethanol repeatedly. Finally, the washed samples were dispersed in 20 mL of ethanol and centrifuged at 10,000 rpm for 10 min to remove any unintended Te flakes and obtain a Te-nanonet solution for further experiments.

### Material characterization

Field-emission scanning electron microscopy (SEM) (Hitachi, S-4300SE) was used for the morphological analysis of the Te-nanonet. Powder x-ray diffraction (XRD) (Rigaku, Ultima IV) was performed using a Cu Kα radiation source (λ = 0.154 nm) on a dried Te-nanonet sample to measure diffraction patterns. Atomic force microscopy (AFM) (Park systems, NX10) was used in tapping mode for the topographic analysis of the bar-coated Te-nanonet. Raman spectroscopy (Witec, Alpha 300 M + ) was conducted using a 532 nm excitation laser to measure the Raman phonon modes of the Te-nanonet. Ultraviolet-visible (UV–vis) spectrophotometry (Agilent, Cary5000) was used to measure the UV absorption of the Te-nanonet solution. A spectrophotofluorometer (Horiba Scientific, Fluorolog3 with TCSPC) was employed to measure the photoluminescence (PL) spectrum of the Te-nanonet. Thermogravimetric and differential scanning calorimetry (TG-DSC) (TA Instruments, SDT Q600) measurements were performed in air and N2 atmospheres at a heating rate of 20 °C min−1 for thermal stability analysis. The concentration of the Te-nanonet solution and substrate loading level was confirmed by inductively coupled plasma-optical emission spectroscopy (ICP-OES) (Agilent 7500, Agilent Technologies Inc.).

### Preparation of the Te-nanonet thin film

Te-nanonets were uniformly and densely coated onto 300 nm SiO2/Si substrates using a bar-coating method with a doctor blade. Prior to coating, the substrates were treated with UV/ozone and 3-aminopropyltrimethoxysilane to remove any contaminants from their surfaces and functionalize their surfaces to enhance coating efficiency. Then, the Te-nanonet solution was dropped onto the 1.5 × 1.5 cm substrates and bar coated three to five times, forming homogeneous Te-nanonet thin films across the entire surfaces. Finally, the Te-nanonet-coated substrates were dried in a vacuum oven at 50 °C prior to their use for device fabrication.

### Fabrication of the Te-nanonet-based phototransistor

After coating the Te-nanonet onto Si wafer substrates, the Te-nanonet was patterned using a dry etching process. To pattern the Te-nanonet, photoresist (PR) (AZGXR-601, MERCK, USA) was spin-coated onto the surface of the Te-nanonet at 3000 rpm for 20 s, exposed to UV light for 1 s with a patterned mask, and then developed in a developer solution (AZ-300MIF, MERCK, USA) for 20 s. After developing the patterns, the devices were annealed at 80 °C for 30 min, and the unwanted Te-nanonet was etched using O2 plasma treatment (reactive ion etching system) for 60 s at a power of 60 W and flow rate of 50 sccm. After cleaning the samples with acetone, the source and drain electrodes were patterned using a liftoff process in which the lift-off resist (LOR) (LOR3B, Product # G3167070500L1GL, MicroChem, USA) was spin-coated for 45 s at 2000 rpm and annealed at 100 °C for 20 min. The regular PR was then spin-coated for 20 s at 3000 rpm and annealed at 90 °C for 90 s. Next, the substrates were exposed to UV light for 1 s with a patterned mask and developed in a developer solution for 20 s. Metals (Ti/Au) with thicknesses of 20 and 100 nm were then deposited using an e-beam evaporator, and the unwanted metal areas were removed using a remover solution (mr-Rem 700, Micro-Resist Technology, Germany). The samples were then cleaned in deionized water. After drying the samples, an encapsulation layer of Al2O3 (20 nm) was deposited using the atomic layer deposition (ALD) method at 100 °C. Finally, the source and drain were patterned using a simple wet etching process in which PR was spin-coated at 3000 rpm for 20 s, followed by development in a developer solution for 20 s, which in turn was followed by exposure to UV light under a patterned mask. After patterning the source and drain, the samples were etched in a diluted buffer oxide etchant for 30 s.

### Electrical and optical characterizations

Electrical characteristics were measured using a semiconductor characterization system (Keithley, 4200 SCS). Optical characteristics were measured under visible light illumination at wavelengths of 405 nm, 638 nm (Thorlabs, S405-HP for 405 nm and SM600 for 638 nm), and 532 nm (Changchun New Industries Optoelectronics Technology Co., MGL-FN-532) at room temperature.

## Results and discussion

### Fabrication and electrical characteristics of the Te-nanonet-based transistor

Phototransistors based on nanowires have not been extensively studied to obtain good electrical and optical properties for scalable processing. Herein, we propose a combination of dry etching and lift-off processes to fabricate scalable phototransistors based on a uniformly dispersed Te-nanonet. First, a solution-type Te-nanonet was deposited onto a Si wafer using a bar-coating process, as discussed above. To ensure smoothness and uniformity, the bar-coated Te-nanonet was annealed at 80 °C for 1 h, followed by a dry etching process for patterning the Te-nanonet using a PR coating. The dry etching process was performed using O2 plasma treatment at 50 sccm and with a power of 60 W to remove unwanted areas of the Te-nanonet, followed by cleaning with acetone to remove any remaining residues of PR. Clear pattering of the Te-nanonet on the Si wafer is confirmed through AFM measurements, which reveal a thickness of approximately 20 nm, as shown in Fig. S3b. The lift-off process was used to pattern the source and drain electrodes with LOR and PR coatings, respectively. Then, the electron beam (e-beam) method was used to deposit Ti/Au with thicknesses of 20/100 nm, respectively. The unwanted electrode area was then removed using a chemical remover (mr-Rem 700) and dried for 30 min. The ALD method was used to deposit an encapsulated layer of Al2O3 with a thickness of 10 nm. To contact the electrodes for electrical measurements, the source and drain electrodes were patterned using a wet etching process consisting of a lithography process and cleaned with acetone. The sequential fabrication process for the proposed Te-nanonet-based phototransistor is presented schematically and photographically in Fig. 2a and b, respectively. Following the fabrication of the Te-nanonet-based phototransistor, its transistor characteristics were measured. The transfer (IDVG) curve exhibits clear p-type behavior with an on/off ratio on the order of 1 × 104 at a VD of −10 V and a threshold voltage of 32.5 V, as shown in Fig. 2c. Additionally, the effective mobility is calculated as $$\mu _{eff} = Lg_m/WC_{ox}V_D$$, resulting in a maximum value of 4.7 cm2/Vs with a channel length and width of 7 and 20 µm, respectively. Linear behavior at high VD levels and high current saturation at low VD levels can be observed in the output curve with an applied gate-bias voltage in the range of 10 V < VG < − 50 V and an interval of −10 V, as shown in Fig. 2d. As a result, the electrical characteristics, specifically, the output curve, depict pronounced linear behavior at high levels of VD, realizing ohmic Te-nanonet-electrode contacts.27,43

### Scalable electrical performance of the Te-nanonet transistors

To analyze the uniformity of the electrical characteristics of the proposed Te-nanonet transistors, a transistor array containing 42 devices was fabricated (Fig. 3a). The transfer curve of this transistor array exhibits 100% yield and high uniformity, demonstrating clear p-type behavior (Fig. 3b). Additionally, the transfer curve (linear scale) of the transistor array is presented in the inset in Fig. 3b. To analyze the proposed Te-nanonet-based transistor array characteristics further, the transistor properties were examined in terms of the threshold voltage (Vth), ION/IOFF ratio, mobility (μ), and transconductance (gm), as shown in Fig. 3c–f. The threshold voltage of the Te-nanonet transistors lies in the range of 31–40 V, as shown in Fig. 3c. The transistors exhibit a highly stable on/off ratio on the order of approximately 103–104, as shown in Fig. 3d. A uniform mobility (μ) is achieved for all transistors in the range of 2.3–4.7 cm2/Vs, as shown in Fig. 3e. The maximum transconductance (gm) value of the transistor array is also calculated in a small range of approximately 2.18–0.71 µS, as shown in Fig. 3f. These results indicate that the proposed Te-nanonet-based transistor array exhibits highly uniform transistor characteristics under ambient conditions, thereby providing an advanced platform for future electronic and optoelectronic applications.

### Optical measurements of the scalable Te-nanonet-based phototransistors

The optical properties of the proposed Te-nanonet-based phototransistor were analyzed at three different wavelengths of visible light (405 nm, 538 nm, and 632 nm, power intensity of 1.2 mW) and in the dark at room temperature, as indicated by the 3D section view in Fig. 4a. Additionally, a gradual increase in current was applied relative to the dark conditions (Fig. 4b). Exposure to blue light (405 nm) yields a higher photogeneration current than exposure to green (538 nm) or red (632 nm) light, owing to the greater photon energy of blue light (405 nm).44 The photoresponsivity (R) and detectivity (D*) of the proposed Te-nanonet-based phototransistor were also calculated as key figures of merit for photodetection, as shown in Fig. 4c, d, respectively. Photoresponsivity represents a measurement of photodetection gain, which can be calculated as R = Iph/Pinc(AW−1), where Iph denotes the photocurrent and Pinc denotes the incident light power. Here, the photocurrent is calculated as Iph = Itotal − Idark, where Itotal denotes the total measured current at a specific incident power, and Idark denotes the current obtained in the dark. Photodetectivity is calculated as D* = RA1/2(2eIdark)1/2, where R denotes the photoresponsivity, A denotes the illuminated area, e denotes the elementary charge, and Idark denotes the measured current in the dark. The responsivity of the Te-nanonet-based phototransistor exhibits linear behavior and clear distinctions between different light illumination wavelengths, as shown in Fig. 4c. The maximum responsivity can be observed with clear linear trends in the range of approximately 95.64–60.09 AW−1 at wavelengths ranging from 405 to 638 nm at the same power of 1.2 mW. High detectivity in the range of approximately 87.33–46.43 (×1010 Jones) is measured at different wavelengths ranging from 405 to 638 nm at the same power of 1.2 mW, indicating highly linear photodetection properties (Fig. 4d). To verify the photodetection uniformity and stability of the Te-nanonet-based transistor array, all 42 devices were examined under blue light (405 nm) illumination at the same power intensity of 1.2 mW to calculate their photodetection abilities, namely, the photocurrent (Iph) and responsivity (R), which are presented in Fig. 4e, f, respectively. The measured photocurrent (Iph) values of all transistors exhibit high stability and uniformity in the range of approximately 4 × 10−6 to 2 × 10−5 A, as shown in Fig. 4e. The responsivity (R) of the proposed Te-nanonet-based transistor array exhibits a uniform response in terms of light detection in the range of approximately 50–90 AW−1, as shown in Fig. 4f. These results demonstrate that the proposed Te-nanonet-based phototransistor exhibits excellent scalable photoresponsive performance with high uniformity and stability.

### Photodetection key figure analysis of the Te-nanonet-based phototransistor

To further evaluate the photoresponsive behavior of the Te-nanonet-based transistors, several key figures of merit for photodetection, namely, the threshold voltage difference (ΔVth), photocurrent (Iph), responsivity (R), specific detectivity (*D), sensitivity (S), and time-domain behavior, were analyzed. The threshold voltage difference (ΔVth) is calculated as ΔVth= Vth_light − Vth_dark, where Vth_light denotes the threshold voltage at a specific light power intensity, and Vth_dark denotes the threshold voltage in the dark. Photosensitivity (S) is calculated as S = Iph / Idark, where Iph denotes the photocurrent and Idark denotes the current in the dark. Figure 5a presents the variations in the threshold voltage difference (ΔVth) of the Te-nanonet-based phototransistors at different wavelengths of 405 nm, 538 nm, and 632 nm with various power intensities in the range of 0.2–1.2 mW. The results reveal that ΔVth varies in the ranges of 4.4–25.8 V, 3.9–19.7 V, and 3.3–17.6 V at 405 nm, 538 nm, and 632 nm, respectively, when at different power intensities, indicating the high linearity and clear distinction of photodetection. The photocurrent (Iph) variations of the proposed Te-nanonet-based phototransistor exhibit excellent linear behavior at different power intensities of visible light illumination. The photocurrent and light power are fitted by a functional relationship based on the simple power law, namely, Iph ~ Pincα, where Pinc defines the incident power and α defines the fitting parameter. After fitting the simple power-law equation to the experimental data, the fitting parameter (α) is determined to be 0.91, 0.63, and 0.83 at 405 nm, 538 nm, and 632 nm, respectively, thus demonstrating the clear linear distinction of the device (Fig. 5b). Figure 5c presents the responsivity of the device in the ranges of 95.64–78.86 AW−1, 73.04–36.14 AW−1, and 60.09–15.06 AW−1 at visible spectral wavelengths of 405 nm, 538 nm, and 632 nm, respectively, when at different power intensities (0.2–1.2 mW). Additionally, the responsivity and incident light power (Pinc) exhibit a power relationship of R ~ Pincβ−1, where β denotes the fitting parameter. After fitting the experimental data based on power-law behavior, the fitting parameter (β) is determined to be −1.50, −0.40, and −0.62 at 405 nm, 538 nm, and 632 nm, respectively, thus demonstrating excellent photodetection responses. The specific detectivity of the proposed Te-nanonet-based phototransistor was also measured at the aforementioned wavelengths while at different power intensities ranging from 0.2 to 1.2 mW, as shown in Fig. 5d. The results contain detectivity variations in the ranges of 87.34–72.01, 50.43–24.9, and 46.43–13.23 (*1010 Jones) at the different visible light wavelengths of 405 nm, 538 nm, and 632 nm, respectively. In addition to the key figures of merit for photodetection, sensitivity was also measured. Distinct linearity can be observed in the ranges of 1.17–31.62 (405 nm), 0.44–12.16 (538 nm), and 0.27–7.02 (632 nm), as shown in Fig. 5e. In addition, to understand the advantages of the proposed Te-nanonet-based phototransistor, an electrical and optical comparison of the proposed phototransistor with previously reported phototransistors based on nanowires is provided in Table S1, which is broken down by synthesis method, device scaling, material type, mobility, photodetection range, responsivity, and detectivity. Then, the time response behavior of the device was characterized under pulses of visible light at a wavelength of 405 nm and a power intensity of 0.2 mW. A gradual increase in current with a rise time of 5 s and fall time of 7 s can be observed in Fig. 5f. The time-domain behavior of the proposed Te-nanonet-based phototransistor is stable throughout the measurement process, demonstrating the robustness of our photodevice. Although the present contribution is initially intended to obtain the low-temperature uniform synthesis of Te-nanonet on a scalable level with high electrical and optical properties, it can be further enhanced for utilization not only in high-performance rigid devices such as imaging sensors, touch panels, display systems, and large-scale photodetectors but also in a flexible platform for next-generation electronic and optoelectronic devices.

## Conclusions

In conclusion, we introduced a low-temperature processing method to fabricate a highly uniform and stable scalable phototransistor array using a Te-nanonet semiconductor material. A Te-nanonet solution was synthesized using the hydrothermal method and dispersed uniformly on a scalable Si wafer using the bar-coating method. A phototransistor array was fabricated using simple processing techniques at a consistently low temperature (100 °C). A maximum mobility of 4.7 cm2/Vs and Ion/Ioff ratio of 1 × 104 were obtained, and 42 transistor devices were used to determine the stability and uniformity of device performance. The optoelectronic performance of the proposed device was characterized at different wavelengths of visible light (405 nm, 538 nm, and 632 nm) and at various power levels ranging from 0.2 to 1.2 mW. Additionally, the photodetection of the Te-nanonet-based transistor array was characterized in terms of photocurrent (Iphoto) and responsivity when exposed to visible light at a wavelength of 405 nm and a power level of 1.2 mW. The results revealed that the proposed device was capable of linear variations in its threshold voltage difference (ΔVth) and photocurrent (Iphoto) and exhibited photosensitivity with high responsivity (95.64 AW−1) and excellent detectivity (87.34 × 1010 Jones). In this regard, the proposed scalable Te nanonet can potentially be used in next-generation nanoelectronic and optoelectronic applications.

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## Acknowledgements

This research was supported in part by the National Research Foundation of Korea (2021R1A2B5B02002167, 2021M3H4A1A02056037, and 2021M3F3A2A03017873) and the Basic Science Research Program through the National Research Foundation of Korea, funded by the Ministry of Science, ICT & Future Planning (2020R1A2C2010984).

## Author information

Authors

### Contributions

M.N. and K.H.C. mainly performed the experiments and wrote the paper. H.Y., S.C., B.J.K., S.O., J.J., C.W., N.L., S.K., and J.Y.C. supported the experiment and performed electrical measurements. S.K. and J.Y.C. managed and advised this research.

### Corresponding authors

Correspondence to Sunkook Kim or Jae-Young Choi.

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The authors declare no competing interests.

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Naqi, M., Choi, K.H., Yoo, H. et al. Nanonet: Low-temperature-processed tellurium nanowire network for scalable p-type field-effect transistors and a highly sensitive phototransistor array. NPG Asia Mater 13, 46 (2021). https://doi.org/10.1038/s41427-021-00314-y