Abstract

The operation of electronic devices relies on the density of free charge carriers available in the semiconductor; in most semiconductor devices this density is controlled by the addition of doping atoms. As dimensions are scaled down to achieve economic and performance benefits, the presence of interfaces and materials adjacent to the semiconductor will become more important and will eventually completely determine the electronic properties of the device. To sustain further improvements in performance, novel field-effect transistor architectures, such as FinFETs^{1, 2} and nanowire field-effect transistors^{3, 4, 5, 6, 7}, have been proposed as replacements for the planar devices used today, and also for applications in biosensing^{8, 9, 10} and power generation¹¹. The successful operation of such devices will depend on our ability to precisely control the location and number of active impurity atoms in the host semiconductor during the fabrication process. Here, we demonstrate that the free carrier density in semiconductor nanowires is dependent on the size of the nanowires. By measuring the electrical conduction of doped silicon nanowires as a function of nanowire radius, temperature and dielectric surrounding, we show that the donor ionization energy increases with decreasing nanowire radius, and that it profoundly modifies the attainable free carrier density at values of the radius much larger than those at which quantum^{12, 13} and dopant surface segregation¹⁴ effects set in. At a nanowire radius of 15 nm the carrier density is already 50% lower than in bulk silicon due to the dielectric mismatch¹⁵ between the conducting channel and its surroundings.

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