Article abstract
Nature Nanotechnology 2, 784 - 789 (2007)
Published online: 18 November 2007 | doi:10.1038/nnano.2007.365
There is a Corrigendum (January 2008) associated with this Article.
Subject Categories: Electronic properties and devices | Synthesis and processing
Downscaling of self-aligned, all-printed polymer thin-film transistors
Yong-Young Noh1, Ni Zhao1, Mario Caironi1 & Henning Sirringhaus1
Abstract
Printing is an emerging approach for low-cost, large-area manufacturing of electronic circuits, but it has the disadvantages of poor resolution, large overlap capacitances, and film thickness limitations, resulting in slow circuit speeds and high operating voltages. Here, we demonstrate a self-aligned printing approach that allows downscaling of printed organic thin-film transistors to channel lengths of 100–400 nm. The use of a crosslinkable polymer gate dielectric with 30–50 nm thickness ensures that basic scaling requirements are fulfilled and that operating voltages are below 5 V. The device architecture minimizes contact resistance effects, enabling clean scaling of transistor current with channel length. A self-aligned gate configuration minimizes parasitic overlap capacitance to values as low as 0.2–0.6 pF mm-1, and allows transition frequencies of fT = 1.6 MHz to be reached. Our self-aligned process provides a way to improve the performance of printed organic transistor circuits by downscaling, while remaining compatible with the requirements of large-area, flexible electronics manufacturing.
- Cavendish Laboratory, University of Cambridge, JJ Thomson Avenue, Cambridge CB3 0HE, UK
Correspondence to: Henning Sirringhaus1 e-mail: hs220@cam.ac.uk
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