Monocrystalline CdTe solar cells with open-circuit voltage over 1 V and efficiency of 17%

  • Nature Energy 1, Article number: 16067 (2016)
  • doi:10.1038/nenergy.2016.67
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The open-circuit voltages of mature single-junction photovoltaic devices are lower than the bandgap energy of the absorber, typically by a gap of 400 mV. For CdTe, which has a bandgap of 1.5 eV, the gap is larger; for polycrystalline samples, the open-circuit voltage of solar cells with the record efficiency is below 900 mV, whereas for monocrystalline samples it has only recently achieved values barely above 1 V. Here, we report a monocrystalline CdTe/MgCdTe double-heterostructure solar cell with open-circuit voltages of up to 1.096 V. The latticed-matched MgCdTe barrier layers provide excellent passivation to the CdTe absorber, resulting in a carrier lifetime of 3.6 μs. The solar cells are made of 1- to 1.5-μm-thick n-type CdTe absorbers, and passivated hole-selective p-type a-SiCy:H contacts. This design allows CdTe solar cells to be made thinner and more efficient. The best power conversion efficiency achieved in a device with this structure is 17.0%.

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We would like to thank all those among the ASU MBE group members who, although not directly associated with this work, contributed to its success through experimental preparation and discussion, principally Z. He for his efforts in materials and device characterization experimental design. We would also like to thank T. Moriarty, a Senior Scientist at the National Renewable Energy Laboratory, for certification measurements carried out in the PV Cell Performance Laboratory. This work is partially supported by the Department of Energy BAPVC Program under Award Number DE-EE0004946, NSF/DOE QESST ERC under Award Number DE-EE0006335, and the AFOSR Grant FA9550-15-1-0196.

Author information


  1. Center for Photonics Innovation, Arizona State University, Tempe, Arizona 85287, USA

    • Yuan Zhao
    • , Shi Liu
    • , Jacob Becker
    • , Xin-Hao Zhao
    • , Calli M. Campbell
    • , Ernesto Suarez
    • , Maxwell B. Lassise
    •  & Yong-Hang Zhang
  2. School of Electrical, Computer and Energy Engineering, Arizona State University, Tempe, Arizona 85287, USA

    • Yuan Zhao
    • , Mathieu Boccard
    • , Shi Liu
    • , Jacob Becker
    • , Ernesto Suarez
    • , Maxwell B. Lassise
    • , Zachary Holman
    •  & Yong-Hang Zhang
  3. School for Engineering of Matter, Transport and Energy, Arizona State University, Tempe, Arizona 85287, USA

    • Xin-Hao Zhao
    •  & Calli M. Campbell


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Y.-H.Z. proposed the ideas to use InSb substrate and DH structure; Y.Z. modelled the device and first proposed the use of a-Si:H as a hole-contact layer on the front MgCdTe barrier; M.B. and Y.Z. then extended the idea to the a-SiCy:H hole-contact layer; S.L. designed and grew DH PL samples; C.M.C., M.L. and E.S. grew the device wafers and participated in editing of the manuscript; X.-H.Z. did XRD measurements and analysis, and together with S.L. analysed the TRPL results and built the theoretical model, M.B. deposited the ITO and hole-contact layers, and processed all the devices; Y.Z., J.B. and M.B. characterized and modelled the device and analysed the results; the manuscript was mainly written by Y.Z., J.B., M.B., X.-H.Z., Z.H., Y.-H.Z., with Y.-H.Z. leading the entire project.

Competing interests

The authors declare no competing financial interests.

Corresponding author

Correspondence to Yong-Hang Zhang.