A three dimensional computer memory device composed of layers of gold nanoparticles has been developed by a team of Korean and Australian scientists.

The device can store higher densities of data than conventional flash memory, and could boost the capacity of non-volatile portable media players and digital cameras.

Flash memory is increasingly used in these gadgets because it does not require a power supply to sustain information. Instead, the ones and zeros of binary computer data are stored in a flat, two dimensional array of transistors, which can be set into charged (‘1’) or uncharged (‘0’) states.

Now, Jang-Sik Lee, Jinhan Cho and colleagues from Kookmin University in Seoul, along with Frank Caruso of the University of Melbourne, have constructed three dimensional structures to increase the memory capacity of a single chip.

Their device is built on a base of silicon that is coated with hafnium oxide. Then, alternating layers of 16nm-sized gold nanoparticles and insulating polymers are formed on top.

“The most important thing in our work is that the commercial charge trap memory devices can be prepared from multilayers using this simple, chemically based, layer-by-layer assembly method,” says Cho. “I am currently systematically investigating the relation between electrical properties and chemical variables.

Fig. 1: Scanning nonlinear dielectric microscopy revealed programmed (light) and erased (dark) areas of the tiny memory device.© 2008 Nature Nanotechnology.

The scientists scanned an area of the device just three micrometres wide, using a technique called scanning nonlinear dielectric microscopy which measures the electrical polarisation of the material with a very fine tip. This revealed the ‘programmed’ and ‘erased’ areas of the device (Fig.1), and proved that the nanoparticles can easily trap or release charge in order to switch between different memory states.

The nanoparticles lost very little of their charge over a seven-day test period, showing that the data was preserved, and they could be switched between the two states over tens of cycles—comparable with competing devices at the development stage.

“Existing flash memory technology is advancing at flash speeds,” says Lee. “But there is a big obstacle to continue device scaling in two dimensions, due to the difficulties in lithography. Our method has the potential to be adopted in next generation high-density memory devices, without reducing cell size, by using three dimensional cell stacking.”