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Ferroelectric hafnium zirconium oxide films that are only 10 nm thick can be used to create integrated nanoelectromechanical transducers. The cover shows a scanning electron microscopy image of a nanomechanical resonator built by integrating the transducer (highlighted in pink) into an aluminium nitride (highlighted in green) on silicon membrane.
Quantum computing requires time and sustained investment to deliver practical applications — a lesson the development of carbon nanotube electronics illustrates.
Neural networks could learn new concepts quickly and from only a few examples by using a ferroelectric ternary content-addressable memory as an augmented memory.
Arrays of carbon nanotubes can be used to build radio-frequency transistors with a higher operating frequency and better linearity than silicon technology.
Silicon circuits with increased functionality and device density can be created by directly integrating amorphous oxide semiconductor devices on top of them.
This Perspective explores the potential of carbon nanotube electronics, examining the development of nanotube-based field-effect transistors and integrated circuits, and the challenges that exist in delivering large-scale systems.
Nanomechanical resonators with frequencies from 340 kHz to 13 GHz can be created using an integrated 10-nm-thick transducer layer of hafnium zirconium oxide.
Flexible transparent electrodes made from silver nanowires that form grid-like structures due to ionic electrostatic charge repulsion can be used to create flexible single-junction and tandem organic photovoltaic devices with power conversion efficiencies of 13.1% and 16.5%, respectively.
A compact ternary content-addressable memory cell, which is based on two ferroelectric field-effect transistors, can provide memory augmented neural networks with improved energy and latency performance compared with traditional approaches based on graphics processing units.
High-voltage amorphous oxide semiconductor thin-film transistors can be integrated on top of a silicon integrated circuit containing 100-nm-node fin field-effect transistors using an in-air solution process.