2D semiconductors

We present a Focus issue on how the research community is continually pushing the device performance boundaries of 2D transistors and explore the pivotal role that these devices play in the future computing landscape.

This Review examines conventional epitaxial growth of 2D van der Waals materials, focusing on in-plane single-crystal monolayer growth and out-of-plane homostructure fabrication. It covers nucleation and orientation control, quality control measures, and homogeneous multilayer and twisted homostructure growth techniques, providing systematic insights for on-demand fabrication of 2D van der Waals materials and their industrial device manufacturing.

This Review provides a framework for processing multidimensional vision information at the sensory level and illustrates the working mechanisms as well as design principles of hardware implementations.

This Review explores adopting 2D semiconductors to overcome the scaling bottleneck of Si-based electronics. Recent trends and potential approaches for the development of 2D materials as a channel are discussed. Following this, the prerequisites, obstacles and feasible technologies for integrating contacts and gate dielectrics with 2D semiconductor-based channels are examined. The Review also provides an industrial perspective towards facilitating monolithic 3D integration.

Room-temperature wafer-scale thermal evaporation of 20 different polycrystalline rare-earth-metal fluoride films for their use in 2D transistors is demonstrated.

The issue of ohmic contact in WSe₂ has been effectively addressed through a significant charge transfer mechanism enabled by the RuCl₃/WSe₂ heterostructure.

A metallic line defect in a layer of molybdenum disulfide can serve as an atomically narrow gate electrode demonstrating how to further miniaturize two-dimensional field effect transistors.

Simulations show that two-dimensional-material-based static random-access memory (SRAM) circuits leverage their low parasitic capacitance, counteracting performance declines due to increased interconnect resistance and potentially surpassing Si-based SRAM in terms of both performance and energy efficiency at advanced technology nodes.

Superionic fluoride dielectrics with a low ion migration barrier are capable of excellent capacitive coupling and are highly compatible with scalable device manufacturing processes for integrated electronics.

By utilizing the van der Waals electron acceptor α-RuCl₃, this study establishes a p-type connection with WSe₂, facilitating a high hole mobility of 80,000 cm² V^–1 s^–1 for investigating quantum transport properties in a magnetic field of over 30 T.

Mirror twin boundaries in monolayer MoS₂—line defects with reflection-mirroring symmetry—are one-dimensionally metallic. In this work, the authors fabricate these mirror twin boundary networks by epitaxity and incorporate them into ultrascaled 2D transistor circuits as gate electrodes.

Selective and quasi-continuous ferroelectric switching has been successfully implemented in devices based on topological Chern insulators, enabling the realization of 1,280 ferroelectric states for a proof-of-concept demonstration in noise-immune neuromorphic computing.

Monolithic 3D integration of complementary WSe₂ FETs has been achieved, featuring n-type FETs in tier 1 and p-type FETs in tier 2. Dense vias are realized using a pitch of less than 1 µm, facilitating 3D inverters as well as NAND and NOR logic functionalities.