MgZnO High Voltage Thin Film Transistors on Glass for Inverters in Building Integrated Photovoltaics

Building integrated photovoltaics (BIPV) have attracted considerable interests because of its aesthetically attractive appearance and overall low cost. In BIPV, system integration on a glass substrate like windows is essential to cover a large area of a building with low cost. However, the conventional high voltage devices in inverters have to be built on the specially selected single crystal substrates, limiting its application for large area electronic systems, such as the BIPV. We demonstrate a Magnesium Zinc Oxide (MZO) based high voltage thin film transistor (HVTFT) built on a transparent glass substrate. The devices are designed with unique ring-type structures and use modulated Mg doping in the channel - gate dielectric interface, resulting in a blocking voltage of over 600 V. In addition to BIPV, the MZO HVTFT based inverter technology also creates new opportunities for emerging self-powered smart glass.


Statistical Data of Electrical Performance
The statistics of electrical performances of m-MZO HVTFTs are presented in Figure S1, including (a) on-current, (b) off-current, and (c) blocking voltage. The data show the trade-off between blocking voltage and on-current; furthermore, such trade-off is directly affected by the offset length. The dominate factor of the variation in data is attributed to the device processing issues, especially the mask misalignment in the photolithorgraphy process of the ring-structures.
Such variation could be suppressed by refining the photo-mask design and using a better alignment tool. It is noticed that the variation of the off-current ( Figure S1b) is larger than that of on-current ( Figure S1a). This is due to much smaller values of the off-current which are close to the measurment limit of the instrument system.

Simulation of Electrical Field Distribution (i) Comparison between ring and rectangular configurations
SILVACO software was used to simulate the electrical field distribution in TFT devices with the ring ( Figure S2a) and rectangular ( Figure S2b) configurations, respectively. For comparison, the m-MZO HVTFTs with both configurations that have the equivalent channel length and offset region length are used in the simulation. As shown in Figure S2d, at ON state of high voltage operation, the electrical field crowding occurs on the drain side around the corner of the rectangle where the maximum field reaches over 2,800 kV/cm. This becomes the weak point where the breakdown of TFT happens. On the contrary, the field distribution in the ring structure ( Figure   S2c) is uniform from drain to source, and the highest field is 1,420 kV/cm, which is approximately 50% less than in the rectangular counterpart. It shows that the symmetric design of a ring structure removes the severe electrical field crowding around the corners of a rectangular channel. Therefore, the HVTFT with the ring structure is able to work at a higher bias voltage and offers a higher blocking voltage over the regular rectangular counterpart.

(ii) Comparison between MZO HVTFT and m-MZO HVTFT
In the ring configuration, a contact pad is needed to connect the gate as shown in Figure S3a.
The electrical field in the gate connection area is different from the other area in the ring. In order to analyze the influence of the gate connection, the simulation was also conducted for the area with the gate connection. As shown in the Figure S3b, the "Path 1" is the majority of areas without the gate connection, and the "Path 2" is the area with the gate connection. The crosssection view of structures of the "Path 1" and "Path 2" are shown in Figure S3c. The electrical field distributions in "Path 1" and "Path 2" in MZO HVTFT and m-MZO HVTFT are simulated and the results are presented in Figure S4. In both "Path 1" ( Figure S4a) and "Path 2" ( Figure   S4b) regions, m-MZO HVTFTs show the lower maximum electric field than that of MZO HVTFTs. It indicates that the transition layer enables to reduce the peak electrical field in the devices with the gate connection.
The effects of the gate connection on the electrical field of HVTFTs along the cutlines are shown in the Figure 5. For both of m-MZO and MZO HVTFTs, the distribution and maximum value of electrical fields in the path 1 and 2 are almost the same. The major difference is the electrical field in the gate-source offset region. In the path 1, the electrical field drops quickly; on the contrary, in the path 2 the electrical field is constant in whole gate-source offset region.   3.3×10 -6 609 3.2×10 -5 (at VDS=200 V*) 15 5.8×10 -6 447 3.0×10 -5 (at VDS=110 V) 10 3.5×10 -5 305 1.3×10 -4 (at VDS=70 V) *instrument limit