On the Computational Power of Spiking Neural P Systems with Self-Organization

Neural-like computing models are versatile computing mechanisms in the field of artificial intelligence. Spiking neural P systems (SN P systems for short) are one of the recently developed spiking neural network models inspired by the way neurons communicate. The communications among neurons are essentially achieved by spikes, i. e. short electrical pulses. In terms of motivation, SN P systems fall into the third generation of neural network models. In this study, a novel variant of SN P systems, namely SN P systems with self-organization, is introduced, and the computational power of the system is investigated and evaluated. It is proved that SN P systems with self-organization are capable of computing and accept the family of sets of Turing computable natural numbers. Moreover, with 87 neurons the system can compute any Turing computable recursive function, thus achieves Turing universality. These results demonstrate promising initiatives to solve an open problem arisen by Gh Păun.

In the central nervous system, there are abundant amount of computational intelligence precipitated throughout millions of years of evolution. The computational intelligence has provided plenty of inspirations to construct powerful computing models and algorithms [1][2][3] . Neural-like computing models are a class of powerful models inspired by the way how neurons communicate. The communication among neurons is essentially achieved by spikes, i.e. short electrical pulses. The biological phenomenon has been intensively investigated in the field of neural computation 4 . Using different mathematic approaches to describe neural spiking behaviours, various neural-like computing models have been proposed, such as artificial neural networks 5 and spiking neural networks 6 . In the field of membrane computing, a kind of distributed and parallel neural-like computation model, named spiking neural P systems (SN P systems), were proposed in 2006 7 . SN P systems are widely considered as a promising variant of the third generation of neural network models 8 .
Generally, an SN P system can be represented by a directed graph, where neurons are placed in nodes and the synapses are denoted using arcs. Every neuron can contain a number of spikes and a set of firing (or spiking) rules. Following the firing rules, a neuron can send information encoded in spikes to other neurons. Input neurons read spikes from the environment, and output neurons emit spikes into the environment. The computation result can be embodied in various ways. One of the common approaches is the time elapsed between the first two consecutive spikes sent into the environment 9,10 and the total number of spikes emitted into the environment [11][12][13] .
For the past decade, there have been quite a few research efforts put forward to SN P systems. Notably, SN P systems can generate and accept the sets of Turing computable natural numbers 14 , generate the recursively enumerable languages 15,16 and compute the sets of Turing computable functions 17 . Inspired by different biological phenomena and mathematical motivations, lots of variants of SN P systems have been proposed, such as SN P systems with anti-spikes 18,19 , SN P systems with weight 20 , SN P systems with astrocyte 21 , homogenous SN P systems 22,23 , SN P systems with threshold 24 , fuzzy SN P systems 25,26 , sequential SN P systems 27 , SN P systems with rules on synapses 28 , SN P systems with structural plasticity 29 . For applications, SN P systems are used to design logic gates, logic circuites 30 and operating systems 31 , perform basic arithmetic operations 32,33 , solve combinatorial optimization problems 34 , diagnose fault of electric power systems 35 .
SN P systems are known as a class of neural-like computing models under the framework of membrane computing 36 . Spiking neural network (shortly named SNN) is a well known candidate of siking neural network

Results
In this research, a novel variant of SN P systems, namely SN P systems with self-organization, is proposed and developed. The system initially has no synapse, but the synapses can be dynamically formed during the computation, which exhibits the self-organization behaviour. In the system, creation and deletion rules are used to create and delete synapses. The applications of synapse creation and deletion rules are controlled by the states of the involved neurons, i.e., the number of spikes contained in the neurons. The computational power of the system is investigated as well. As a result, it demonstrates that SN P systems with self-organization can compute and accept any set of Turing computable natural numbers. Moreover, with 87 neurons, the system can compute any Turing computable recursive function, ergo achieves Turing universality.
Before stating the results in mathematical forms, some notations should be introduced. N m SPSO all (cre h , del g , rule r ) (resp. N m SPSO acc (cre h′ , del g′ , rule r′ )) denotes the family of sets of numbers computed (resp. accepted) by SN P systems with self-organization of degree m, where h (resp. h′) indicates the maximal number of synapses that can be created using a synapse creation rule, g (resp. g′) is the maximal number of synapses that can be deleted by using a synapse deletion rule, r (resp. r′) is the maximal number of rules in each neuron, and the subscript all indicates the computation result is encoded by the number of spikes emitted into the environment (resp. the subscript acc indicates the system works in the accepting mode). If the parameters are not bounded, i.e., there is no limit imposed on them, then they are replaced with *. NRE denotes the family of Turing computable sets of numbers 44 .
The main results of this work can be mathematically depicted by the following theorems.
There is a universal SN P system with self-organization having 87 neurons for computing functions.
These results show that SN P systems with self-organization are powerful computing models, i.e., they are capable of doing what Turing machine can do. Also, they provide potential and theoretical feasibility of using SN P systems to solve real-life problems, such as pattern recognition and classification. In SN P system with self-organization, it has no initially designed synapses. The synapses can be created or deleted according to the information contained in involved neurons during the computation. In previous work, it was found that the information diversing ability of synapses had some programable feature for SN P systems, but the computation power of SN P systems without initial synapses is an open problem. Although this is not the first time the feature of creating or deleting synapses investigated in SN P systems, see e.g. SN P systems with structural plasticity, it is quite the first attempt to construct SN P systems has no initial synapses.

Methods
In this section, it starts by the mathematical definition of SN P system with self-organization, and then the computation power of SN P systems with self-organization is investigated as number generator, acceptor and function computing devices. It is proved in constructive ways that SN P systems with self-organization can compute and accept the family of sets of Turing computable natural numbers. With 87 neurons, such system can compute any Turing computable recursive function.
Spiking Neural P Systems with Self-Organization. Before introducing the definition of SN P system with self-organization, some prerequisites of basic concepts of formal language theory 45 are recalled.
For an alphabet V, V* denotes the set of all finite strings of symbols from V, the empty string is denoted by λ, and the set of all nonempty strings over V is denoted by V + . When V = {a} is a singleton, then we write simply a* and a + instead of {a}*, {a} + . A regular expression over an alphabet V is defined as follows: (1) λ and each a ∈ V is Scientific RepoRts | 6:27624 | DOI: 10.1038/srep27624 a regular expression; (2) if E 1 and E 2 are regular expressions over V, then (E 1 )(E 2 ), (E 1 ) ∪ (E 2 ), and (E 1 ) + are regular expressions over V; (3) nothing else is a regular expression over V.
For each regular expression E, a language L(E) is associated, defined in the following way: (1) L(λ) = {λ} and L(a) = {a}, for all a ∈ V, (2) L((E 1 )∪(E 2 )) = L(E 1 ) ∪ L(E 2 ), L((E 1 )(E 2 )) = L(E 1 )L(E 2 ) and L((E 1 ) + ) = (L(E 1 )) + for all regular expressions E 1 , E 2 over V. Unnecessary parentheses can be omitted when writing a regular expression, and (E) + ∪ {λ} can also be written as E*. By NRE we denote the family of Turing computable sets of numbers. (NRE is the family of length sets of recursively enumerable languages-those recognized by Turing machines). An SN P system with self-organization of degree m ≥ 1 is a construct of the form is the initial number of spikes contained in neuron σ i ; -R i is a finite set of rules in neuron σ i of the following three forms: • syn 0 = 0 / is the initial set of synapses, which means no synapse is initially set; at any moment t, the set of synapses is denoted by syn t ⊆ {1, 2, …, m} × {1, 2, …, m}. • in, out ∈ {1, 2, …, m} indicates the input and output neuron, respectively.
A spiking rule of the form E/a c → a p ; d is applied as follows. If neuron σ i contains k spikes, and a k ∈ L(E), k ≥ c, then rule E/a c → a p ; d ∈ R i can be applied. It means that c spikes are consumed and removed from neuron σ i , i.e., k − c spikes are remained, while the neuron emits p spikes to its neighboring neurons after d steps. (It is a common practice in membrane computing to have a global clock defined. The clock is used to mark the time of the whole system and ensure the system synchronization.) If d = 0, then the p spikes are emitted out immediately, if d = 1, then the p spikes are emitted in the next step, etc. If the rule is used in step t and d ≥ 1, then in steps t, t + 1, ..., t + d − 1 the neuron is closed (this corresponds to the refractory period from neurobiology), so that it cannot receive new spikes (if a neuron tries to send spikes to a neuron in close status, then these particular spikes will be lost). In the step t + d, the neuron fires and regains open status, so it can receive spikes (which can be used starting with the step t + d + 1, when the neuron can again apply rules). It is possible that p is associated with value 0. In this case, neuron σ i consumes c spikes without emitting any spike. Spiking rule with p = 0 is also called forgetting rule, by which a pre-defined number of spikes can be removed out of the neuron. If E = a c , then the rule can be written in the simplified form a c → a p ; d, and if d = 0, then the rule can be simply written as E/a c → a p .
Synapse creation and deletion rules are used to create and delete synapses during the computation. Synapse creation rule E′/a c′ → +(a p′ , cre(i)) is applied as follows. If neuron σ i has k′ spikes such that a k′ ∈ L(E′), k′ ≥ c′, then the synapse creation rule is applied with consuming c′ spikes, creating synapses to connect neuron σ i to each neuron in cre(i) and emitting p′ spikes to each neuron in cre(i). If neuron σ i has k″ spikes such that a k″ ∈ L(E″) and k″ ≥ c″, then synapse deletion rule E″/a c″ → −(λ, del(i)) is applied, removing c″ spikes from neuron σ i and deleting all the synapses connecting neuron σ i to the neurons from del(i). With the synapse creation and deletion rules, E′ and E″ are regular expressions over O = {a}, which regulate the application of synapse creation and deletion rules. This means that synapse creation and deletion rules can be used if and only if the neuron contain some particular numbers of spikes, i.e., the neuron is in some specific states. With the applications of synapse creation and deletion rules the system can dynamically rebuild its topological structure during the computation, which is herein defined as self-organization.
One neuron is specified as the input neuron, through which the system can read spikes from the environment. The output neuron has a synapse creation rule of the form E′/a c′ → +(a p′ , {0}), where the environment is labelled by 0. By using the rule, the output neuron creates a synapse pointing to the environment, and then it can emit spikes into the environment along the created synapse.
For each time step, as long as there is one available rule in R i , neuron σ i must apply the rule. It is possible that there are more than one rule that can be used in a neuron at some moment, since spiking rules, synapse creation rules and synapse deletion rules may be associated with regular languages (according to their regular expressions). In this case, the neuron will non-deterministically uses one of the enabled rules. The system works sequentially in each neuron (at most one rule from each R i can be used), and if parallelism is designed for the system, all the neurons at the same system level have at least one enabled rule activated.
The configuration of the system at certain moment is defined by three major factors which are the number of spikes contained in each neuron, the number of steps to wait until it becomes open and the current set of synapses. With the notion, the initial configuration of the system is 〈n 1 /0, n 2 /0, …, n m /0, 0 /〉. Using the spiking, forgetting, synapse creation and deletion rules as described above, we can define transitions among configurations. Any sequence of transitions starting from the initial configuration is called a computation. A computation halts, also called successful, if it reaches a configuration where no rule can be applied in any neuron in the system. For each successful computation of the system, a computation result is generated, which is total the number of spikes sent to the environment by the output neuron.
System Π generates a number n as follows. The computation of the system starts from the initial configuration and finally halts, emitting totally n spikes to the environment. The set of all numbers computed in this way by Π is denoted by N all (Π) (the subscript all indicates that the computation result is the total number of spikes emitted into the environment by the system). System Π can also work in the accepting mode. A number n is read through input neurons from the environment in form of spike train 10 n−1 1, which will be stored in a specified neuron σ 1 in the form of f(n) spikes. If the computation eventually halts, then number n is said to be accepted by Π. The set of numbers accepted by Π is denoted by N acc (Π).
It is denoted by N m SPSO all (cre h , del g , rule r ) (resp. N m SPSO acc (cre h′ , del g′ , rule r′ )) the family of sets of numbers computed (resp. accepted) by SN P systems with self-organization of degree m, where h (resp. h′) indicates the maximal number of synapses that can be created with using a synapse creation rule, g (resp. g′) is the maximal number of synapses that can be deleted with using a synapse deletion rule, r (resp. r′) is the maximal number of rules in each neuron, and the subscript all indicates the computation result is encoded by the number of spikes emitted into the environment (resp. the subscript acc indicates the system works in a accepting mode). If the parameters are not bounded, i.e., there is no limit imposed on them, then they are replaced with *.
In order to compute a function f : N k → N by SN P systems with self-organization, k natural numbers n 1 , n 2 , …, n k are introduced in the system by reading from the environment a spike train (which is a binary sequence) = … − − − z 10 10 1 10 1 The input neuron has a synapse pointing from the environment, by which the spikes can enter it. The input neuron reads a spike in each step corresponding to a digit 1 from the string z; otherwise, no spike is received. Note that exactly k + 1 spikes are introduced into the system through the input neuron, i.e., after the last spike, it is assumed that no further spike is coming to the input neuron. The output neuron has a synapse pointing to the environment from it, by which the spikes can be emitted to the environment. The result of the computation is the total number of spikes emitted into the environment by the output neuron, hence producing r spikes with r = f(n 1 , n 2 , …, n k ).
SN P systems with self-organization can be represented graphically, which is easier to understand than that in a symbolic way. A rounded rectangle with the initial number of spikes and rules is used to represent a neuron and a directed edge connecting two neurons represents a synapse.
In the following proofs, the notion of register machine is used. A register machine is a construct M = (m, H, l 0 , l h , I), where m is the number of registers, H is the set of instruction labels, l 0 is the start label, l h is the halt label (assigned to instruction HALT), and I is the set of instructions; each label from H labels only one instruction from I, thus precisele following forms: • l i : (ADD(r), l j , l k ) (add 1 to register r and then go to one of the instructions with labels l j , l k ), • l i : (SUB(r), l j , l k ) (if register r is non-zero, then subtract 1 from it, and go to the instruction with label l j ; otherwise, go to the instruction with label l k ), • l h : HALT (the halt instruction).

As number generator.
A register machine M computes a number n as follows. It starts by using initial instruction l 0 with all registers storing number 0. When it reaches halt instruction l h , the number stored in register 1 is called the number generated or computed by register machine M. The set of numbers generated or computed by register machine M is denoted by N(M). It is known that register machines compute all sets of numbers which are Turing computable, hence they characterize NRE, i.e., N(M) = NRE, where NRE is the family of Turing computable sets of numbers 44 .
Without loss of generality, it can be assumed that in the halting configuration, all registers different from the first one are empty, and that the first register is never decremented during the computation (i.e., its content is only added to). When the power of two number generating devices D 1 and D 2 are compared, number zero is ignored; (this corresponds to the usual practice of ignoring the empty string in language and automata theory).
Proof. It only has to prove NRE⊆N * SPSO all (cre * , del * , rule 5 ), since the converse inclusion is straightforward from the Turing-Church thesis (or it can be proved by the similar technical details in Section 8.1 in ref. 46, but is cumbersome). To achieve this, we use the characterization of NRE by means of register machines in the generative mode. Let us consider a register machine M = (m, H, l 0 , l h , I) defined above. It is assumed that register 1 of M is the output register, which is never decremented during the computation. For each register r of M, let s r be the number of instructions of the form l i : (SUB(r), l j , l k ), i.e., the number of SUB instructions acting on register r. If there is no such SUB instruction, then s r = 0, which is the case for the first register r = 1. In what follows, a specific SN P system with self-organization Π is constructed to simulate register machine M.
System Π consists of three modules-ADD, SUB and FIN modules. The ADD and SUB modules are used to simulate the operations of ADD and SUB instructions of M; and the FIN module is used to output a computation result.
In general, with any register r of M, a neuron σ r in system Π is associated; the number stored in register r is encoded by the number of spikes in neuron σ r . Specifically, if register r stores number n ≥ 0, then there are 5n spikes in neuron σ r . For each label l i of an instruction in M, a neuron σ l i is associated. During the simulation, when neuron σ l i receives 6 spikes, it becomes active and starts to simulate instruction l i : (OP(r), l j , l k ) of M: the Scientific RepoRts | 6:27624 | DOI: 10.1038/srep27624 process starts with neuron σ l i activated, operates on the number of spikes in neuron σ r as requested by OP, then sends 6 spikes into neuron σ l j or σ l k , which becomes active in this way. Since there is no initial synapse in system Π, some synapses are created to pass spikes to target neurons with synapse creation rules, after that the created synapses will be deleted when simulation completes by synapse deletion rules. When neuron σ l h (associated with the halting instruction l h of M) is activated, a computation in M is completely simulated by system Π.
The following describes the works of ADD, SUB, and FIN modules of the SN P systems with self-organization. Module ADD (shown in Fig. 1): Simulating the ADD instruction l i : (ADD(r), l j , l k ). Initially, there is no synapse in system Π, and all the neurons have no spike with exception that neuron σ l 0 has 6 spikes. This means system Π starts by simulating initial instruction l 0 . Let us assume that at step t, an instruction l i : (ADD(r), l j , l k ) has to be simulated, with 6 spikes present in neuron σ l i (like σ l 0 in the initial configuration) and no spike in any other neurons, except in those neurons associated with registers.
At step t, neuron σ l i has 6 spikes, and synapse creation rule → + a a a l l r / ( , { , , }) is applied in σ l i , it generates three synapses connecting neuron σ l i to neurons σ l i (1), σ l i (2) and σ r . Meanwhile, it consumes 5 spikes (one spike remaining) and sends 5 spikes to each of neurons σ l i (1), σ l i (2) and σ r . The number of spikes in neuron σ r is increased by 5, which simulates adding 1 to register r of M. At step t + 1, neuron σ l i deletes the three synapses created at step t by using rule . At the same moment, neuron σ l i (2) uses synapse creation rule a 5 /a 4 → + (a 3 , {l j , l k }), and creates two synapses to neurons σ l j and σ l k , as well as sends 3 spikes to each of the two neurons. At step t + 2, neuron σ l i (2) deletes the two synapses by using synapse deletion rule a → − (λ, {l j , l k }). In neuron σ l i (1) , there are 5 spikes at step t + 1 such that both of synapse creation rules a 5 /a 4 → + (a 3 , {l j }) and a 5 /a 4 → + (a 3 , {l k }) are enabled, but only one of them is non-deterministically used.
-If rule a 5 /a 4 → + (a 3 , {l j }) is chosen to use, neuron σ l i (1) creates a synapse and sends 3 spikes to neuron σ l j . In this case, neuron σ l j accumulates 6 spikes, which means system Π starts to simulate instruction l j of M. One step later, with one spike inside neuron σ l i (1) uses rule a → − (λ, {l j , l k }) to delete the synapse to neuron σ l j , and neuron σ l k removes the 3 spikes (from neuron σ l i (2)) by the forgetting rule a 3 → λ. -If rule a 5 /a 4 → + (a 3 , {l k }) is selected to apply, neuron σ l i (1) creates a synapse and sends 3 spikes to neuron σ l k . Neuron σ l k accumulates 6 spikes, which indicates system Π goes to simulate instruction l k of M. One step later, neuron σ l j removes the 3 spikes by using forgetting rule a 3 → λ, and the synapse from neuron σ l i (1) to σ l k is deleted by using rule a → − (λ, {l j , l k }) in neuron σ l i (1). Therefore, from firing neuron σ l i , system Π adds 5 spikes to neuron σ r and non-deterministically activates one of the neurons σ l j and σ l k , which correctly simulates the ADD instruction l i : (ADD(r), l j , l k ). When the simulation of ADD instruction is completed, the ADD module returns to its initial topological structure, i.e., there is no synapse in the module. The dynamic transformation of topological structure and the numbers of spikes in neurons of ADD module during the ADD instruction simulation with neuron σ l j or σ l k finally activated is shown in Figs 2 and 3. In the figures, the spiking rules are omitted for clear illustration, neurons are represented by circles with the number of spikes and directed edges is used to represent the synapses.
Module SUB (shown in Fig. 4): Simulating the SUB instruction l i : (SUB(r), l j , l k ). Given starting time stamp t, system Π simulates a SUB instruction l i : (SUB(r), l j , l k ). Let s r be the number of SUB instructions acting on register r and the set of labels of instructions acting on register r be    At step t, neuron σ l i has 6 spikes, and becomes active by using synapse creation rule → + a a a l l r / ( , { , , }) , creating synapses and sending 4 spikes to each of neurons σ l i (1), σ l i (2) and σ r . With 4 spikes inside, neurons σ l i (1) and σ l i (2) keep inactive at step t + 1 because no rule can be used. In neuron σ r , it has the following two cases.
-If neuron σ r has 5n (n > 0) spikes (corresponding to the fact that the number stored in register r is n, and n > 0), then by receiving 4 spikes from neuron σ l i , it accumulates 5n + 4 spikes and becomes active by using rule ( 1) (2) 1 2 r is enabled and applied at step t + 2. With application of the rule, neuron σ r removes the synapses from neuron σ r to neurons σ l s (1) and σ l s r . Meanwhile, neurons σ l s (1) and σ l s (2) with s ≠ i remove the 6 spikes by using forgetting rule a 6 → λ, and neuron σ l i (2) removes the 10 spikes by forgetting rule a 10 → λ. Neuron σ l i (1) accumulates 10 spikes (4 spikes from neuron σ l i and 6 spikes from neuron σ r ), and rule a 10 /a 9 → + (a 6 , {l j }) is applied at step t + 2, creating a synapse and sending 6 spikes to neuron σ l j . In this case, neuron σ l j receives 6 spikes, which means system Π starts to simulate instruction l j of M. One step later, the synapse from neuron σ l i (1) to neuron σ l j is deleted by using synapse deletion rule a → − (λ, {l j }).
-If neuron σ r has no spike (corresponding to the fact that the number stored in register r is 0), then after receiving 4 spikes from neuron σ l i , it has 4 spikes and rule ( 1) (2) 1 2 r is applied at step t + 2, removing the synapses from neuron σ r to neurons σ l s (1) and σ l s r . At the same moment, neurons σ l s (1) and σ l s (2) with s ≠ i remove the 3 spikes by using forgetting rule a 3 → λ, and neuron σ l i (1) removes 7 spikes using spiking rule a 7 → λ. Having 7 spikes, Neuron σ l i (2) becomes active by using rule a 7 /a 6 → + (a 6 , {l k }) at step t + 2, creating a synapse to neuron σ l k and sending 6 spikes to neuron σ l k . In this case, neuron σ l k receives 6 spikes, which means system Π starts to simulate instruction l k of M. At step t + 3, neuron σ l i (2) uses rule a → − (λ, {l k }) to remove the synapse to neuron σ l k .
The simulation of SUB instruction performs correctly: System Π starts from σ l i having 6 spikes and becoming active, and ends in neuron σ l j receiving 6 spikes (if the number stored in register r is great than 0 and decreased by one), or in neuron σ l k receiving 6 spikes (if the number stored in register r is 0).
When the simulation of SUB instruction is completed, the SUB module returns to its initial topological structure, i.e., there is no synapse in the module. The dynamic transformation of topological structure and the numbers of spikes in involved neurons in the SUB instruction simulation with neuron σ l j (resp. neuron σ l k ) finally activated is shown in Fig. 5 (resp. Fig. 6).
Module FIN (shown in Fig. 7) -outputting the result of computation. Assume that at step t the computation in M halts, i.e., the halting instruction is reached. In this case, neuron σ l h in Π receives 6 spikes. At that moment, neuron σ 1 contains 5n spikes, for the number n ≥ 1 stored in register 1 of M. With 6 spikes inside, neuron σ l h becomes active by using rule a 6 /a 5 → +(a 2 , {1}), creating a synapse to neuron σ 1 and sending 2 spikes to neuron σ 1 . Neuron σ l h ends with one spike, and rule a → −(λ, {1}) is used, removing the synapse to neuron σ 1 one step later.
After neuron σ 1 receives the 2 spikes from neuron σ l h , the number of spikes in neuron σ 1 becomes 5n + 2 and rule a 2 (a 5 ) + /a → +(λ, {0}) is enabled and applied at step t + 2. By using the rule, neuron σ 1 consumes one spike and creates a synapse to the environment. Neuron σ 1 contains 5n + 1 spikes such that spiking rule a(a 5 ) + /a 5 → a is used, consuming 5 spikes and emitting one spike to the environment at step t + 3. Note that the number of spikes in neuron σ 1 becomes 5(n − 1) + 1. So, if the number of spikes in neuron σ 1 is not one, then neuron σ 1 will fire again in the next step sending one spike into the environment. In this way, neuron σ 1 can fire for n times, i.e., until the number of spikes in neuron σ 1 reaches one. For each time when neuron σ 1 fires, it sends one spike into the environment. So, in total, neuron σ 1 sends n spikes into the environment, which is exactly the number stored in register 1 of M at the moment when the computation of M halts. When neuron σ 1 has one spike, rule a → −(λ, {0}) is used to remove the synapse from neuron σ 1 to the environment, and system Π eventually halts.
The dynamic transformation of topological structure of the FIN module and the numbers of spikes in the neurons of FIN module and in the environment are shown in Fig. 8.
Based on the description of the work of system Π above, the register machine M is correctly simulated by system Π, i.e., N(M) = N all (Π). We can check that each neuron in system Π has at most three rules, and no limit is imposed on the numbers of neurons and the synapses that can be created (or deleted) by using one synapse creation (or deletion) rule. Therefore, it concludes N * SPSO all (cre * , del * , rule 5 ) = NRE. This concludes the proof. Proof. It only has to prove NRE ⊆ N * SPSO acc (cre * , del * , rule 5 ), since the converse inclusion is straightforward from the Turing-Church thesis. In what follows, an SN P system Π′ with self-organization working in accepting mode is constructed to simulate a deterministic register machine M′ = (m, H, l 0 , l h , I) working in the acceptive mode. Actually, the proof is given by modifying the proof of Theorem 4. Each register r of M′ is associated with a neuron σ r in system Π′, and for each instruction l i of M′ a neuron σ l i is associated. A number n stored in register r is represented by 5n spikes in neuron σ r .

As number acceptor.
The system Π′ consists of an INPUT module, deterministic ADD and SUB modules. The INPUT module is shown in Fig. 9, where all neurons are initially empty with the exception that input neuron σ in has 8 spikes. Spike train 10 n−1 1 is introduced into the system through input neuron σ in , where the internal between the two spikes in the spike train is (n + 1) − 1 = n, which indicates that number n is going to be accepted by system Π′.
Assuming at step t neuron σ in receives the first spike. At step t + 1, neuron σ in contains 9 spikes, and rule a 9 /a 6 → +(a 6 , {I 1 , I 2 }) is used, creating a synapse from neuron σ in to neurons σ I 1 and σ I 2 . Meanwhile, neuron σ in sends 6 spikes to the two neurons. In neuron σ in , 6 spikes are consumed and 3 spikes remain. With 6 spikes inside, neurons σ I 1 and σ I 2 become active at step t + 2. Neuron σ I 1 uses rule a 6 /a → +(λ, {I 2 }) to create a synapse to neuron σ I 2 ; and neuron σ I 2 uses rule a 6 /a → +(λ, {I 1 , 1}) to create a synapse to each of neurons σ I 1 and σ 1 . Each of neurons σ I 1 and σ I 2 has 5 spikes left. From step t + 3 on, neurons σ I 1 and σ I 2 fire and begin to exchange 5 spikes between them. In this way, neuron σ 1 receives 5 spikes from neurons σ I 2 at each step.
At step t + n, neuron σ in receives the second spike from the environment, accumulating 4 spikes inside. At step t + n + 1, neuron σ in fires for the second time by using spiking rule a 4 /a 3 → a 3 , sending 3 spikes to neurons σ I 1 and σ I 2 . Each of neurons σ I 1 and σ I 2 accumulates 8 spikes. At step t + n + 2, neuron σ I 1 uses synapse creation rule a 8 /a 6 → +(a 6 , {l 0 }), creating a synapse to neuron σ l 0 and sending 6 spikes to neuron σ l 0 . This means that system Π′ starts to simulate the initial instruction l 0 of register machine M′. Meanwhile, neuron σ I 2 uses synapse deletion rule a 8 /a → −(λ, {I 1 }), removing the synapse from neuron .. to neuron σ I 1 . In the next step, neuron σ I 1 creates a synapse to neuron σ 1 and sends 5 spikes to neuron σ 1 by using rule a 7 → +(a 5 , {1}). From step t + 3 to t + n + 1, neuron σ 1 receives 5 spikes in each step from neuron σ I 2 , thus in total accumulating 5(n − 1) spikes. Neuron σ 1 receives no spike at step t + n + 2, and gets 5 spikes from neuron σ I 2 at step t + n + 3. After that, no more spikes are sent to neuron σ I 2 . Neuron σ 1 contains 5n spikes, which indicates the number to be accepted by register machine M′ is n. At step t + n + 4, neuron σ I 2 uses rule a 2 → −(λ, {1}), deleting the synapse to neuron σ 1 .
The dynamic transformation of topological structure of INPUT module and the numbers of spikes in the neurons of INPUT module are shown in Fig. 10. The deterministic ADD module is shown in Fig. 11, whose function is rather clear. By receiving 6 spikes, neuron σ l i becomes active, creating a synapse and sending 5 spikes to each of neurons σ r , σ l i (1) and σ l i (2). The number of spikes in neuron σ r is increased by 5, which simulates the number stored in register 1 is increased by one. In the next step, neuron σ l i uses rule , removing the synapses from neuron σ l i to neurons σ r , σ l i (1) and σ l i (2). In neurons σ l i (1) and σ l i (2), there are 5 spikes. The two neurons become active by using rule a 5 /a 4 → +(a 3 , {l j }). Each of them creates a synapse to neuron σ l j and emits 3 spikes to neuron σ l j . In this way, neuron σ l j accumulates 6 spikes inside, which means the system Π′ goes to simulate instruction l j of M′. The synapses from neuron σ l i (1) and σ l i (2) to neuron σ l j will be removed by using synapse deletion rule a → −(λ, {l j }) in neurons σ l i (1) and σ l i Module SUB remains unchanged, as shown in Fig. 4. Module FIN is removed, with neuron σ l h remaining in the system, but having no rule inside. When neuron σ l h receives 6 spikes, it means that the computation of register machine M′ reaches instruction l h and stops. Having 6 spikes inside, neuron σ l h cannot become active for no rule can be used. In this way, the work of system Π′ halts.  Based on the description of the implementation of system Π′ above, it is clear that the register machine M′ in acceptive mode is correctly simulated by the system Π′ working in acceptive mode, i.e., N acc (M′) = N acc (Π′).
We can check that each neuron in system Π′ has at most five rules, and no limit is imposed on the numbers of neurons and the synapses that can be created (or deleted) with using one synapse creation (or deletion) rule. Therefore, it concludes N * SPSO acc (cre * , del * , rule 5 ) = NRE.
As function computing device. A register machine M can compute a function f : N k → N as follows: the arguments are introduced in special registers r 1 , r 2 , …, r k (without loss of the generality, it is assumed that the first k registers are used). The computation starts with the initial instruction l 0 . if the register machine halts, i.e., reaches HALT instruction l h , the value of the function is placed in another specified register, labelled by r t , with all registers different from r t storing number 0. The partial function computed by a register machine M in this way is denoted by M(n 1 , n 2 , …, n k ). All Turing computable functions can be computed by register machine in this way.
Several universal register machines for computing functions were defined. Let (ϕ 0 , ϕ 1 ,…) be a fixed admissible enumeration of the unary partial recursive functions. A register machine M u is said to be universal if there is a recursive function g such that for all natural numbers x, y we have ϕ x (y) = M u (g (x) , y). As addressed by Minsky, universal register machine can compute any ϕ x (y) by inputting a couple of numbers g(x) and y in registers 1 and 2, and the result can be obtained in register 0 47 .
In the following proof of universality, a specific universal register machine M u from 47 is used, the machine M u = (8, H, l 0 , l h , I) presented in Fig. 12. In this universal register machine M u , there are 8 registers (numbered from 0 to 7) and 23 instructions, and the last instruction is the halting one. As described above, the input numbers  (the "code" of the partial recursive function to compute and the argument for this function) are introduced in registers 1 and 2, and the result is outputted in register 0 when the machine M u halts.
A modification is necessary to be made in M u , because the subtraction operation in the register where the result is placed is not allowed in the construction of the previous Theorems, but register 0 of M u is subject of such operations. That is why an extra register is needed -labeled with 8 -and the halt instruction l h of M u should be replaced by the following instructions:

SUB ADD HALT
Therefore, the modified universal register machine ′ M u has 9 registers, 24 ADD and SUB instructions, and 25 labels. The result of a computation of ′ M u is stored in register 8

Theorem 6
There is a universal SN P system with self-organization having 87 neurons for computing functions.
Proof. An SN P system with self-organization Π″ is constructed to simulate the computation of the universal register machine ′ M u . Specifically, the system Π″ consists of deterministic ADD modules, SUB modules, as well as an INPUT module and an OUTPUT module. The deterministic ADD module shown in Fig. 11 and SUB module shown in Fig. 4 can be used here to simulate the deterministic ADD instruction and SUB instruction of ′ M u . The INPUT module introduces the necessary spikes into the system by reading a spike train from the environment, and the OUTPUT module outputs the computation result.
With each register r of ′ M u , a neuron σ r in system Π″ is associated; the number stored in register r is encoded by the number of spikes in neuron σ r . If register r holds the number n ≥ 0, then neuron σ r contains 5n spikes. With each instruction l i in .., a neuron σ l i in system Π″ is associated. If neuron σ l i has 6 spikes inside, it becomes active and starts to simulate the instruction l i . When neuron σ ′ l h (associated with the label l′ h of the halting instruction of ′ M u ) receives 6 spikes, the computation in ′ M u is completely simulated by the system Π″; the number of spikes emitted into the environment from the output neuron, i.e., neuron σ 8 , corresponds to the result computed by ′ M u (stored in register 8). The tasks of loading 5g(x) spikes in neuron σ 1 and 5y spikes in neuron σ 2 by reading the spike train 10 g(x)−1 10 y−1 1 through input neuron σ in can be carried out by the INPUT module shown in Fig. 13.
Initially, all the neurons contain no spike inside, with the exception that neuron σ in has 15 spikes. It is assumed at step t neuron σ in reads the first spike from the environment. With 16 spikes inside, neuron σ in becomes active by using rule a 16 /a 6 → +(a 6 , {I 1 , I 2 }) at step t + 1. It creates a synapse and sends 6 spikes to each of neurons σ I 1 and σ I 2 . Subsequently, neuron σ in keeps inactive (for no rule can be used) until the second spike arrives at step t + g(x).  Neuron σ I 1 has 6 spikes and uses rule a 6 /a → +(λ, {I 2 , 1}) at step t + 2 it creates a synapse to neurons σ I 2 and σ 1 and sends 5 spikes to each of the two neurons. Meanwhile, neuron σ I 2 creates a synapse to neuron σ I 2 and sends 5 spikes to it. From step t + 3 on, neuron σ I 1 sends 5 spikes to neuron σ I 1 and exchanges 5 spikes with neuron σ I 2 in each step.
At step t + g(x), neuron σ in receives the second spike from the environment. By then it accumulates 11 spikes inside. At step t + g(x) + 1, neuron σ in fires by using spiking rule a 11 /a 3 → a 3 , and sends 3 spikes to neurons σ I 1 and σ I 2 . Each of neurons σ I 1 and .. contains 8 spike, which will be remained in σ in .
At step t + g(x) + 2, neuron σ I 1 applies synapse deletion rule a 8 /a → −(λ, {I 1 }) and removes the synapse to neuron σ I 0 , meanwhile neuron σ I 2 removes the synapse to neuron σ I 1 . The two neurons stop to exchange spikes with each other. At step t + g(x) + 3, neuron σ I 1 has 7 spikes and fires by using spiking rule a 7 /a 5 → a 5 , and sends 5 spikes to neuron σ 1 . In the next step, neuron σ I 1 removes the synapse to neuron σ 1 , and cannot send spikes to neuron σ 1 .
In general, in each step from step t + 3 to t + g(x) +1, neuron σ 1 receives 5 spikes from neuron σ I 1 , in total receiving 5(g(x) − 1) spikes; at step t + g(x) + 2, no spike arriving in neuron σ 1 , and at step t + g(x) + 3, 5 spikes reaching neuron σ 1 . In this way, neuron σ 1 accumulates 5g(x) spikes, which simulates number g(x) is stored in register 1 of ′ M u . At step t + g(x) + 2, neuron σ in contains 8 spikes such that rule a 8 /a 6 → + (a 6 , {I 3 , I 4 }) is used, creating a synapse and sends 6 spikes to each of neurons σ I 3 and σ I 4 . At step t + g(x) + 3, neurons σ I 3 and σ I 4 create synapses to each other, meanwhile neuron σ I 3 creates a synapse to neuron σ 2 . From step t + g(x) + 4 on, neuron σ I 3 begins to exchange 5 spikes with σ I 4 and send 5 spikes to neuron σ 2 in each step. At step t + g(x) + y, neuron σ in receives the third spike from the environment, accumulating 3 spikes inside. One step later, it fires by using spiking rule a 3 /a 2 → a 2 , sending 2 spikes to neurons σ I 1 , σ I 2 , σ I 3 and σ I 4 . With 2 spikes inside, neuron σ 1 removes its synapse to neuron σ 1 by rule a 2 → −(λ, {1}); while neuron σ I 2 forgets the two spikes by forgetting rule a 2 → λ. By receiving 2 spikes from neuron σ in , neurons σ I 3 and σ I 4 contain 7 spikes. At step t + g(x) + y + 2, neuron σ I 3 fires by using rule a 7 /a 3 → a 3 and sends 3 spikes to neurons σ 2 and σ I 4 . The number of spikes in neuron σ 2 is 5(y − 1) + 3. Neuron σ I 4 consumes 6 spikes, creates a synapse and sends 6 spikes to neuron σ l 0 . This means system Π'' starts to simulate the initial instruction l 0 of ′ M u . At step t + g(x) + y + 3, neuron σ I 3 has 4 spikes, and it becomes active by rule a 4 /a → −(λ, {I 4 }), and removes its synapse to neuron σ I 3 and ends with 3 spikes. In the next step, neuron σ I 3 fires by using spiking rule a 3 /a 2 → a 2 , emitting 2 spikes to neuron σ 2 . In this way, the number of spikes in neuron σ 2 becomes 5(y − 1) + 3 + 2 = 5y, which indicates number y is stored in register 2 of ′ M u . The deterministic ADD module shown in Fig. 11 and SUB module shown in Fig. 4 can be used to simulate ADD and SUB instructions of ′ M u . The FIN module shown in Fig. 7 can be used to output the computation result with changing neuron σ 1 into σ 8 .
Until now, we have used  which comes to a total of 87 neurons. This concludes the proof.

Discussion and Future Works
In this work, a novel variant of SN P systems, namely SN P systems with self-organization, is introduced. As results, it is proven that the systems are Turing universal, i.e., they can compute and accept the family of sets of Turing computable natural numbers. With 87 neurons, the system can compute any Turing computable recursive function, thus achieving Turing universality. There has been a research focus on the construction of small universal SN P with less computing resource, i.e. less number of neuron in use 17,[48][49][50][51][52] . It is of interest that whether we can reduce the number of neurons in universal SN P systems with self-organization as function computing devices. A possible way is to construct ADD-ADD, ADD-SUB and SUB-ADD modules to perform particular consecutive ADD-ADD, ADD-SUB, and SUB-ADD instructions of ′ M u . SN P systems with learning function/capabiliy is a promising direction. Learning strategies and feedback mechanism have been intensively studied and investigated in conventional artificial neural networks. It is worthy to look into these techniques and transplant these ideas into SN P systems with self-organization.
In research of using artificial neural networks to recognize digital English letters, database MNIST (Mixed National Institute of Standards and Technology database) is widely used for training various letter recognition systems 53 , and for training and testing in the field of machine learning 54 . For further research, SN P systems with self-organization may be used to recognize handwritten digits letters and other possible pattern recognition problems. Since the data structure of SN P systems is binary sequences, an extra task of transmitting letters or pictures into binary sequences should be addressed. A possible way is transmitting digital numbers of pixels of pictures to binary form. Also, local binary pattern method, can be used to transmit pictures to binary forms.
Bioinformatics is s an interdisciplinary field that develops methods and software tools for understanding biological data 55 . Artificial intelligence based methods and data mining strategy have been used in processing biological data, see e.g. [56][57][58][59][60][61][62] , it is worthy to processing biological data by SN P systems, such as DNA motif finding 63,64 , nuclear export signal identification 65,66 .