Conduction Threshold in Accumulation-Mode InGaZnO Thin Film Transistors

The onset of inversion in the metal-oxide-semiconductor field-effect transistor (MOSFET) takes place when the surface potential is approximately twice the bulk potential. In contrast, the conduction threshold in accumulation mode transistors, such as the oxide thin film transistor (TFT), has remained ambiguous in view of the complex density of states distribution in the mobility gap. This paper quantitatively describes the conduction threshold of accumulation-mode InGaZnO TFTs as the transition of the Fermi level from deep to tail states, which can be defined as the juxtaposition of linear and exponential dependencies of the accumulated carrier density on energy. Indeed, this permits direct extraction and visualization of the threshold voltage in terms of the second derivative of the drain current with respect to gate voltage.

Thin film transistors (TFTs) with disordered channel layers comprising say amorphous oxide or organic semiconductors, are becoming ubiquitous especially where low temperature processability and flexibility are essential [1][2][3] . To facilitate TFT systems design, a complete understanding on device physics and related device parameter extraction constitutes the first and inevitable step. In this vein, the work presented here on conduction threshold is a very fundamental device parameter. The work is applicable not only to thin film field effect transistor (FET) but also the pervasive silicon metal-oxide-semiconductor FET (MOSFET). Given its significance as a crucial indicator of carrier transport and instability in FETs 4-10 , the conduction threshold has to be determined physically rather than by empirical means 11 .
Silicon MOSFETs conduct in inversion mode and the physical reason underlying the conduction threshold is well understood 4,5 . It corresponds to the critical state in which the induced or (inverted) carrier density becomes the same as the substrate's majority carrier density 5 . For example, in an n-channel MOSFET, this transition point is when the electron density goes from linear to exponential dependence on energy in the solution of the Poisson-Boltzmann equation 5. This transition can be approximated empirically as the intercept made from a linear extrapolation on the drain current (I DS ) vs. gate voltage (V GS ) characteristic at very low drain voltage (V DS ) 5 .
In contrast to the silicon MOSFET, the TFT works in carrier accumulation mode regardless of the channel material [6][7][8][9] . This means that there is no polarity inversion of the induced carriers, so it is difficult to physically define the accumulation threshold. Moreover, because of the structural disorder of the semiconductor channel layer, there are localized deep and tail states distributed within the so-called band-gap, and depending on the position of the Fermi-level, free carriers or trapped carriers can be prevalent 12,13 . As a result, the conduction threshold is difficult to extract even empirically 6,[14][15][16] . The density of carriers trapped at these localized states can be greater than free carriers, and there is no physical criteria for which all the traps are filled. In this family of devices, it is the localized trap states that determine the behaviour of field-effect mobility as a function of gate bias.
In this letter, we present a systematic analysis of the conduction threshold leading to a physical definition of the threshold voltage in accumulation-mode InGaZnO TFTs. By solving the Poisson-Boltzmann equation coupled with measurements of the current-voltage characteristics, the total carrier density is captured as a function of the surface potential. Similar to the MOSFET, it turns out that there is a transition point in which the accumulated carrier concentration switches from a linear to an exponential dependence on energy, i.e. the free carrier density increases rapidly from this threshold level by virtue of trap-limited conduction. We find that this threshold can be directly extracted as the gate voltage in which the second derivative of I DS with respect to V GS peaks. This is visualized with the proposed grayscale image spectroscopy, allowing an ease of analysis on threshold voltage and related properties. The studies presented here show that the conduction threshold is independent of the band Scientific RepoRts | 6:22567 | DOI: 10.1038/srep22567 mobility and is largely determined by the sub-threshold characteristics associated with the deep states including interface states.

Results and Discussion
Microscopic conduction threshold. For the investigations reported here, we used a semiconducting oxide TFT test structure with a 50 nm thick InGaZnO channel layer, as seen in Fig. 1(a,b). The device is a typical bottom gate structure where Mo is used for electrodes. Here, the gate insulator is formed as a bilayer of SiO x and SiN x , and the total gate-insulator capacitance of this structure (C ox ) is ~10 nF/cm 2 . As a final step, a single layer of SiO x is used for passivation layer and etch-stop layer (ESL). The TFT has a 50 μm channel width (W) and 10 μm channel length (L). Its I DS vs. V GS measured for V DS fixed at 10 mV is shown in Fig. 1(c,d). Here, we retrieve an effective flat-band voltage (V FB ) of 0.3 V and a sub-threshold slope (SS) of 0.32 V/dec. Using the measured I DS − V GS characteristics, the microscopic picture in terms of free and trapped carrier densities can be captured as a function of V GS . The free charge density (Q free ) relates to the drain current as 12,13 ,

DS b free DS
where μ b is the band mobility. Equation (1) is valid for both sub-and above-threshold regimes as long as V DS < kT/q, where kT thermal energy and q the elementary charge (see Supplementary Information S1). In addition, we replace V DS with V DS − R C I DS , where R C is a contact resistance. The value of R C retrieved for the test structure considered here is 50 kΩ. The main-unknown in Equation (1) is μ b , which typically ranges from 10 to 30 cm 2 /V-s 7,9 . From Equation(1) and the measured I DS − V GS , Q free can be stated as a function of V GS , and related with the free carrier density (n free ) through Q free = q n free λ free . Here, λ free is an effective thickness of the induced free carrier sheet, and is expressed as an harmonic average between the free carrier Debye length (λ D ) and thickness of In-Ga-Zn-O channel layer (t S ), viz. λ free = (λ D −1 + t S −1 ) −1 , assuming that the penetration depth of the vertical electric field is limited within t S 17,18 . The λ D can be obtained using ε S kT/(qQ free ) 5,16 , where ε S is the permittivity of the In-Ga-Zn-O channel layer. The value of λ free is shown in Fig. 2(a). From this, we express n free as Q free /(qλ free ), which is still a function of V GS , i.e. n free (V GS ). To express it as a function of surface potential (ϕ S ), we relate this to Boltzmann's equation, i.e. n free = N C exp[(E F0 + qϕ S -E C )/kT] 5,12 . Here, N C is the effective density of free carriers, E F0 an equilibrium Fermi level, and E C the energy level of the conduction band minima. For the device considered here, N C is ~2 × 10 18 cm −3 . We now have a correspondence between V GS and ϕ S , Using Equation (2), ϕ S is computed for three different values of μ b , which is contained in n free (V GS ). This is shown in Fig. 2(b). Now, we solve the integral form of Poisson's equation, which yields the relationship between the surface electric field (E S ) and integral of total accumulated carrier density n tot for ϕ S as follows 12 ,  (2) and (3), n tot can be written as, in which n tot is n free + n deep + n tail . Here n deep and n tail are the densities of carriers trapped in deep and tail states, respectively. In the term, n deep , the effect of carriers trapped at the interface states is embedded since n deep consists of defect state carriers at the bulk (i.e. n bulk ) as well as interface (i.e. n int ), thus n deep = n bulk + n int 13,17 . Equation (4) can be considered as a differential form of the Poisson-Boltzmann equation, allowing examination of the behaviour of carrier densities n tot with ϕ S , as depicted in Fig. 2(c) in a semi-log plot. A transition is observed at ϕ S = 0.25 V, for a corresponding gate voltage of 1.74 V, whereby the carrier density n tot goes from linear to an exponential dependency on energy. Based on this observation, we can define the threshold voltage (V T ) of the device as 1.74 V, which corresponds to the transition surface potential (ϕ T ) of 0.25 V. The physical meaning underlying this transition is further discussed in the following.
From Fig. 2(c), we find that the trapped carriers are dominant for all energy levels, i.e. n free < n tail + n deep , thus trap-limited conduction (TLC) always prevails. Depending on the value of ϕ S , the one or the other can prevail. For example, below ϕ T , n deep prevails and the linear dependency of n tot can be explained as, where ζ d is a deep state density related to either n bulk or n int . From Fig. 2(c), the value of ζ d in the examined InGaZnO TFT is estimated as ~2.1 × 10 16 cm −3 eV −1 . Besides, ζ d can also be retrieved from the relation C deep / (q 2 t S ), where C deep is a deep state capacitance, which can be deduced independently from the sub-threshold slope (SS) through the relationship, C deep = C ox [SS/(kT/q·ln10) -1] 17 . For the channel thickness considered here (t S = 50 nm), C deep ~ 43.7 nF/cm 2 , yielding ζ d ~ 3 × 10 16 cm −3 eV −1 . It is consistent with the value empirically estimated using Fig. 2(c). Note that, along with the C deep and ϕ T , an analytical expression of threshold voltage (V T ) can be derived from the charge neutrality equation, C ox (V T − V FB − ϕ T ) = C deep ϕ T , yielding as, With Equation (6), V T is estimated as 1.64 V using C deep ~ 43.7 nF/cm 2 , C ox ~ 10 nF/cm 2 , ϕ T = 0.25 V and V FB = 0.3 V. Although it may be inaccurate due to its approximation to be analytical, Equation (6) can allow a quick estimation of V T . Also, it is useful to see its proportionality with deep states (i.e. bulk and interface states) through the term, C deep , for example.
After the transition (ϕ T = 0.25 V), n tail prevails. Indeed, the carrier density now increases exponentially, seen as linear on the semi-log plot Fig. 2(c). And it can be described by the following relation for kT t > kT 12,16,19 , where N tc is the tail state density at E C and kT t is the characteristic energy of tail states associated with the exponential profile of the energy of the band tail states 6,12,14,16,19 . As seen in Fig. 2(c), the transition is always maintained as an intersection point regardless of the assumed value of μ b .
To check the relationship between the transition point and electronic states for electrons, we deduce the density of states using the values of n tot and n free (see Fig. 2(c)), through 12 , Here, the Fermi level E F replaces ϕ S by virtue of the relation, E F − E F0 = qϕ S . Figure 3 shows the profile of the density of states as a function of energy while assuming μ b = 20 cm 2 /V-s. We identify a transition energy E T that demarcates the deep and tail states, confirming that all the deep states (N deep ) are filled when E F arrives at E T (see also the inset of Fig. 3). This demarcation defines the threshold voltage. Based on this observation of E T , it is expected that E T can move toward a higher energy when N deep is increased while maintaining the profile of tail states, resulting in a higher V T (see Supplementary Information S6). As seen in Fig. 3, at energies higher than E T , the tail state distribution is found to follow an exponential dependence, i.e. N tail (E) = N tc exp[(E − E C )/kT t ] 6,12,16 . Using the exponential dependence of the tail states, the retrieved values of N tc and kT t are ~10 20 cm −3 eV −1 and 27 meV, respectively, as seen in Fig. 3. Thus kT t > kT at T = 300 K. This confirms that the TLC is dominant at T = 300 K. Besides, the exponent (α ) in the power-law for the I DS − V GS curve above V T is defined as 2 kT t /kT -1 for kT t > kT 6,12,14,20 . The value of α at T = 300 K is about 1.07 for kT t = 27 meV, which consistent with the observed linear dependence of I DS on V GS as seen in Fig. 1(c). As implied here, the role of N tc and kT t is important in the TFT conduction, relating to the material composition. For example, with decreasing the ratio of In/Ga, field effect mobility of In-Ga-Zn-O TFTs can be reduced, suggesting a higher density of tail states (N tc ) 21,22 . In other words, if N tc is higher, E F can be pinned at a lower energy from the conduction band minima (see Supplementary  Information S6). This leads to a lower mobility reminiscent of the a-Si TFT whereas Fermi level in oxide TFT can even go into the conduction band due to its lower tail state density 23 .
Based on the characteristic behaviour of the carrier densities shown in Fig. 2(c), the significance of the free carrier density (n free ) relative to the total carrier density (n tot = n free + n deep + n tail ) can be defined as a ratio (χ TLC ) in accordance to the TLC theory 6,14,16 , Using Equation (8) together with the values shown in Fig. 2(c), the behaviour of χ TLC and its first derivative with respect to V GS (i.e. ∂ χ TLC /∂ V GS ) as a function of V GS is shown in Fig. 4(a,b), respectively. We see that ∂ χ TLC /∂ V GS peaks at V GS ~ 1.74 V regardless of the value of μ b . This is consistent with our earlier observation of the common intercept seen in Fig. 2(c). Indeed, χ TLC shows a similarity with the first derivative of the current-voltage characteristics, ∂ I DS /∂ V GS , as seen in Fig. 4(a,c). As it turns out, ∂ I DS /∂ V GS is the trans-conductance of the transistor, which in turn is proportional to the field effect mobility (μ FE ). Thus, μ FE is proportional to χ TLC . Indeed in accordance with the TLC theory, μ FE can be defined as μ b n free /n tot = μ b χ TLC 6,20,24 . At high V GS , the behaviour of ∂ I DS /∂ V GS without effect of R C looks similar to χ TLC for μ b = 20 cm 2 /V-s (see Supplementary  Information S4). This suggests that μ b of the examined device is ~20 cm 2 /V-s. The similarity between ∂ χ TLC /∂ V GS and the second derivative ∂ 2 I DS /∂ V GS 2 becomes even more striking in which the peak is at 1.74 V regardless of the band mobility (μ b ) values assumed for this analysis (see Fig. 4(b)). More importantly, the experimentally observed peak in ∂ 2 I DS /∂ V GS 2 vs. V GS appears at ~1.76 V which corroborates with theoretical prediction with a discrepancy less than 2%, as seen in Fig. 4(d). From the nature of the ∂ 2 I DS /∂ V GS 2 curve, we clearly identify the roles of deep and tail states, respectively, on either side of the peak where the threshold voltage lies. The deep states and corresponding sub-threshold slope determines the slope of the rising edge while the tail states and its exponent α are associated with that of the falling edge (see Fig. 4(d)).
Macroscopic observation of the threshold. The above analysis can be extended to measurements of device behaviour at different temperatures. Figure 5(a) shows I DS − V GS characteristics at T = 300 K, 200 K, 100 K, and the ∂ 2 I DS /∂ V GS 2 in each case is shown in Fig. 5(b). As the ambient temperature decreases, we observe that V T shifts to more positive V GS values. This is because of reduced thermal activation 12 . As temperature decreases, the current-voltage characteristic approaches a more power-law behaviour, as indicated in Fig. 5(a). Consequently, its second derivative converges to a non-zero value for V GS > V T , and which increases with decreasing temperature, as seen in Fig. 5(b). This is mainly associated with the tail state exponent (i.e. α = 2 kT t /kT-1), which increases with decreasing temperature. In contrast, the rising edge becomes increasingly steeper at lower temperatures, as indicated in Fig. 5(b). This is mainly due to the smaller sub-threshold slope (SS) at lower temperatures, which is typical of field effect transistors and can be intuitively explained with the relation, SS = ln(10)·kT/q(1 + C deep / C ox ) 17 , assuming C deep is independent of temperature. The observations of the current-voltage characteristics and its second derivative presented hitherto considerably simplify the interpretation of the shift in threshold voltage in bias stress experiments. More importantly, the shift in V T can be retrieved with minimizing an interruption to the stress measurement conditions. Figure 5(c) shows the measured I DS − V GS characteristics following positive bias stress (i.e. PBS at V GS = + 20 V while maintaining V DS = 0 V) for stress durations (t PBS ) of 500 sec and 1000 sec. As seen in Fig. 5(d), there is a positive V T -shift, which increases with stress duration. Since the value of ∂ 2 I DS /∂ V GS 2 in a well-above V T regime  remains zero for all cases, as seen in Fig. 5(d), it suggests that there is no significant degradation in band tail states (e.g. kT t ), thus unaffecting the tail state exponent α . This suggests electron trapping into the gate insulator as the significant and likely source of V T -shift. However, the ∂ 2 I DS /∂ V GS 2 curve appears to spread out more for longer t PBS . Indeed, the slope of the rising edge (at V GS < V T ) becomes less steep, suggesting creation of deep defects [25][26][27] . Since the slope of falling edge decreases, as seen in Fig. 5(d), it can be argued that tail states are newly created near E T (see Supplementary Information S5). So, it is obvious that the analysis presented here is especially useful under bias stress, as it is indicative of the nature of defects created in the sub-threshold and above-threshold regimes.
As another outcome of the presented analysis, we propose an image spectroscopy constructed from the second derivatives, as seen in Fig. 5. This method allows a visualization of V T position as well as a property change near V T . As an example, Fig. 5(a) shows I DS − V GS characteristics measured at different ambient temperatures (300 K, 200 K, 100 K), and the V T for each case is visualized in a grayscale image, as indicated in Fig. 6(a). Here, it is found that V T is shifted to more positive in V GS as decreasing temperature. Besides this, it is also observed that the grayscale image above V T is getting brighter as decreasing temperature. This confirms that I DS − V GS curvature in on state (i.e. above-threshold regime) becomes more nonlinear, as can be seen in Fig. 5(b). As another example, it can be applied to analyze the V T instability with respect to bias stresses. In Fig. 5(c), we show the measured I DS − V GS curves after applying a positive bias stress (V GS = + 20 V while V DS = 0 V) for 500 sec and 1000 sec, respectively. As clearly seen in the constructed grayscale image (see Fig. 6(b)), there is a positive V T shift and its increase towards more positive direction in V GS with a longer stress time (t PBS ). Since the on state image brightness for each case looks dark and similar each other, as seen in Fig. 6(b), we can say that there isn't a significant degradation in band tail states which represents above-threshold regime (i.e. on state) curvature. So, this can be explained with electron trapping into gate insulator. However, the bright parts near V T appear to spread out more after applying the PBS with a longer t PBS . This suggests that the sub-threshold slope has been slightly bigger, and tail states are newly created near E T . This is consistent with the results in Fig. 5(d).

Conclusions
The channel layer in amorphous thin film transistors in accumulation mode generally suffer from structural disorder resulting in localized deep and tail states in the energy gap. This makes the classical empirically-based extraction of the conduction threshold difficult, if not ambiguous, since depending on the Fermi level, conduction of free or trapped carriers can be prevalent determined by the shape of the localized tail states. This paper resolves the ambiguity in interpretation of the conduction threshold in accumulation-mode InGaZnO thin film transistors and provides a quantitative means of uniquely extracting the threshold voltage. The conduction threshold has been identified to take place at the transition of the Fermi level from deep to tail states, following which the carrier density goes from a linear to exponential dependence on energy. While the analysis presented here can be applied to study the relative changes in deep defects and tail states at pre-and post-transition caused by effects of ambient temperature and bias stress, a more precise analytical description is needed to quantitatively assess and subsequently predict the nature of the density of states when subject to environmental factors. Work along these lines is in progress. Nevertheless the results demonstrated here give physical and quantitative insight into the V T and related properties in accumulation-mode thin film transistors.