Self-assembled nanostructured resistive switching memory devices fabricated by templated bottom-up growth

Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition.

Scientific RepoRts | 6:18967 | DOI: 10.1038/srep18967 patterning masks by the deposited materials. Bottom-up approaches based on the self-assembled nano-templates have the potential to overcome these limits. The electrochemical deposition method is a representative bottom-up growth method. In this study, Ni bottom and top electrodes were deposited by the electrochemical deposition method. The electrodeposition of Ni from sulfamate electrolytes is an industrially important process. The sulfamate solutions are often preferred due to low deposited film stress, low sulfur content in the deposited metals, and the generally good mechanical properties of the Ni. Additionally, the high current efficiency of the bath typically allows for high deposition rates, permitting the rapid deposition of thick, low-stressed films 16,17 . The NiO layer formed by plasma oxidation on Ni substrate is employed to fabricate Ni/NiO/Ni ReRAM device, which shows a unipolar resistive switching property. Nanoscale non-volatile memory devices are demonstrated with simple fabrication processes for high-density device applications by bottom-up growth process at a low temperature.

Results
Ordered nanoporous AAO templates synthesized by two-step anodization method are widely used to synthesize nanostructures such as nanorods and nanotubes [18][19][20][21] . In this study, AAO nanotemplates were used as the patterning mask for nanodot arrays, and the electrodes were fabricated by the electrochemical deposition method. During the first anodization of AAO, pores were generated randomly, so a uniform pore array was not obtained. The pores then began to grow in a direction perpendicular to the surface because of pore volume expansion associated with oxide growth. Thus, the uniformity of the AAO pore array depends on the elapsed time of the first anodization step. In this study, the first anodization was performed for 24 h; the layer formed in the first anodization step was then removed chemically. After the second anodization step, we obtained the uniform hexagonal shape of the AAO nanotemplate. In order to use the AAO template as the mask for nano-patterning, the AAO was filled with polystyrene (PS) and detached from the Al sheet. The barrier layer was chemically etched with phosphoric acid solution. The PS layer prevented the AAO templates from breaking during the transferring process and an increase in the pore size during the barrier layer removal. The PS/AAO layer was transferred onto the substrate. The PS layer was then removed by immersion in the propylene glycol methyl ether acetate (PGMEA) solution. The AAO template was confirmed by observation with a field emission scanning electron microscope (FE-SEM; JSM 7401F, JEOL). Figure 1 shows the schematic procedure to fabricate the ReRAM using bottom up processes. Figure 1 shows a planar view of the AAO template. The pore array was very well aligned with the hexagonal structure; the pore size was about 75 nm, the distance from pore to pore was about 100 nm, and the pore density was around 1 × 10 10 cm −2 . As shown in Fig. 2 the AAO template had a depth of about 300 nm, and it grew in the direction perpendicular to the substrate. The depth of the AAO template can be easily controlled by controlling the second anodization time. With this technique, patterning at a scale of less than 100 nm can be easily achieved, and it can be applied to other processes that require nanosized structures. The pore size and density of AAO nanotemplates can be controlled by changing the electrolyte solution and anodization voltage 22,23 . Thus, it is a versatile method for making nanopatterns without using optical lithography techniques.
Electrochemical deposition is a conventional deposition method. By using this method metal deposition can be conveniently achieved with a simple solution process, but without a vacuum deposition process. In this study, electrochemical deposition was adopted to deposit Ni nanodots. Ni electrochemical deposition is similar to other electrochemical deposition processes; that is, direct current is applied to make flow between two electrodes immersed in aqueous solution of Ni salts. The flow of direct current causes the cathode to become covered with metallic Ni. The nickel is in the form of divalent, positively charged ions (Ni 2+ ) in solution. The positive Ni 2+ ions react with 2e − and are converted to metallic nickel (Ni 0 ) at the cathode surface. The nickel ions discharged at the cathode are thus replenished by those formed at the anode 24   the previously given conditions using the transferred AAO nanotemplate. As shown in Fig. 2(a,b), the Ni nanodots formed uniformly, and the pattern was well aligned with the hexagonal-packed structure as in the AAO templates. The thickness of the Ni layers that formed on the ITO layer by electrochemical deposition for 1 min was 40 nm (Fig. 2(b)). Another advantage of electrochemical deposition is that the materials grow through the AAO from the bottom of the template. Because of this advantage, the nanosized mask is not obstructed with materials during deposition. In contrast, PVD methods such as sputtering are limited because nanosized masks become clogged with deposited materials. Thus, there is a limit in fabricating nanoscale devices by the PVD method. After forming the Ni layer, O 2 plasma-supported thermal oxidation was performed to make the NiO resistive switching layer at low temperature. There are several techniques to prepare NiO layer, such as thermal oxidation 25,26 , anodic oxidation 27,28 , thermal spray 29 , and plasma oxidation. O 2 plasma-supported oxidation has several advantages over other oxidation techniques, e.g., fast oxidation capability, low temperature process, and ease of forming uniform and dense layer 30,31 . NiO layers are generally formed at high temperatures above 400 °C 32 , but such a high-temperature process cannot be applied to plastic substrate-based flexible devices. In order to overcome this limitation, we attempted O 2 plasma-supported oxidation at 180 °C.
After NiO formation, electrochemical deposition was again carried out to form the Ni layer as the top electrode. Once, the NiO layer is formed on the Ni surface, resistance of the surface is increased. So, this step was performed at a higher voltage condition than the previous electrochemical deposition step to apply same current density. The completed devices were examined with an FE-SEM and contact-mode atomic force microscope (AFM; SPA 400 microscope, SEIKO). MIM structured nanodot devices were fabricated with a high density of 1 × 10 10 cm −2 (Fig. 2(c)). Nanodot array devices having approximately 80 nm height formed uniformly on the substrate (Fig. 2(d)). The average size of the nanodot devices was 5.02 × 10 −11 cm 2 ; the device size can be controlled by controlling the pores sizes 12 . Figure 3 shows AFM images of the Ni/NiO/Ni structured nanodot array. The scan rate was 0.5 Hz, the scan configuration was 256 × 256 pixels, and the scan size was 1 × 1 μ m 2 . It is confirmed that the nanodot array was formed uniformly. The complex nanoscale structures were successfully synthesized without any lithography tools, and all procedures were performed at low temperatures.
To confirm that the nanopatterned ReRAM devices were working properly, the electrical characteristics of the ReRAM devices were measured with conductive atomic force microscopy (CAFM) (Fig. 4). The current-voltage responses were measured with an AFM probe that was directly attached to the bottom electrode (short circuit) and without contacting the top electrode (open circuit) to verify the proper act of AFM probe as the bias applying tip 12 . In the result, a current noise level of about 10 −12 A was measured at open circuit. In the case of short circuit, the current immediately increased up to the compliance level (10 mA). This verified that the CAFM probe can be used as an electrical conducting probe, and electrical properties that were measured with the CAFM probe occurred in the nanostructured ReRAM devices as well 12 .
In this study, the set voltage (V Set ) was defined as the critical voltage at which the devices transformed from the high-resistance state (HRS) to the low-resistance state (LRS); the reset voltage (V Reset ) was defined as the critical voltage for the opposite transformation. NiO is reported to show unipolar or bipolar switching behavior according to the electrodes, compositions, process conditions, etc 33,34 . In our case, unipolar resistive switching property was observed ( Fig. 4(b)). The voltage was swept from 0 V to 10 V, and the current compliance was fixed at 10 −8 A to prevent the devices from breakdown. The set voltage (V Set ) was nearly 9 V, and the reset voltage (V Reset ) was about 6 V. The LRS and HRS could be clearly discerned. The highest current level of LRS was about 10 −8 A, and the LRS/HRS current ratio was about 10 to 100. These results verified that nanopatterned devices were successfully fabricated. On/off ratio of the resistance state is directly related to the sensing margin of memory devices. High on/off ratio is required for multilevel data storage and reliable device operation. Our device shows on/off ratio of ~100. It is reported that operation of high-density resistive switching memory device with on/off ratio of ~10 was successfully demonstrated by optimization of read scheme to reduce the sneak current 35 . Therefore, it is thought that the memory device fabricated by bottom-up processes can be used as the memory element in real device applications. Anyway, it is very important to get high on/off ratio for integration strategy, so the optimization of device structure and materials will be done for high on/off ratio. The set and reset phenomena occurred repeatedly. In this work the set/reset voltages seem to be high compared to other resistive switching memory devices. The reason to have high set/reset voltages is thought to be due to the thickness of NiO formed through the oxidation of bottom Ni layer. Optimization of oxidation process to form NiO will improve the quality of NiO, resulting in improvement of electrical properties. We measured the endurance property of resistive switching memory device with a structure of Ni/NiO/Ni ( Supplementary Fig. S1(a)). Although there are some fluctuations in LRS and HRS current levels on/off ratio of higher than 10 is maintained. In our case, electrical properties such as V Set , V Reset , and resistances of LRS and HRS showed some variation, but the devices worked repeatedly. To confirm the device uniformity statistical cumulative probability of current levels (HRS and LRS) is determined ( Supplementary Fig. S1(b)). Some non-uniform property is observed, but considering the fact that all devices were fabricated using only bottom-up growth without any vacuum deposition and lithographic tools we believe the process developed in this study has a good potential to be used in real memory device fabrication with further refining the process developed in this study.
The electrical properties of ReRAM are mostly related to the resistive switching materials and electrodes. Some studies have reported that the electrical properties are also related with the thickness of the switching materials [36][37][38] . The investigation of resistive switching behaviour with different thicknesses of the switching materials and/or with different electrode materials will be very important. Further study is under the way to investigate the switching characteristics according to changes in the switching materials and electrodes. In our devices unipolar switching is observed (Fig. 4(b)), so the filament formation and rupture are thought to be the main cause of resistive switching 34,39 . In case of unipolar switching the filament formation is determined by stochastic processes, so fluctuation in set/reset processes reportedly happens 39 . Schematic illustration to explain the switching mechanism is shown in Supplementary Fig. S2. In this study, we showed that nanoscale resistive-switching-memory devices could be fabricated by a facile bottom-up process without using conventional lithography method. In addition, low temperature oxidation was achieved using O 2 plasma-supported oxidation.
Most electrical devices continue to require smaller sizes and more flexibility with a uniform array. Some researchers have examined the synthesis of well-ordered AAO templates by controlling the pore nucleation site. Experiments that apply AAO and flexible substrates are already ongoing. In the near future, well-ordered and flexible nanoscale electrical devices will be realized by the use of optimized AAO nanotemplates and low-temperature processes.

Discussion
We made AAO nanotemplates by using the two-step anodization method. Ni/NiO/Ni structured ReRAM devices that were less than 100 nm in size were fabricated through the AAO nanotemplate. Ni nanodots were synthesized by the electrochemical deposition method with a high density and uniformity. The NiO layer was formed at low temperature through O 2 -plasma-enhanced thermal oxidation. The structures of fabricated memory devices were analyzed with FE-SEM and AFM. The results confirmed that nanoscale memory devices were fabricated only utilizing bottom-up processes. Fabricated ReRAM devices had a density of 1 × 10 10 /cm 2 ; each cell was separated from each other. The electrical properties of the devices were measured by using CAFM. The results showed unipolar resistive switching characteristics, and the LRS and HRS were clearly distinct from each other. This nano-patterning technique can easily be applied to fabrication of functional nanoelectronic devices, and the low temperature oxidation method can be applied to flexible device fabrication. This study has a great potential to be applied to manufacturing nanoscale, high-density non-volatile memory devices in the future.

Methods
Fabrication of AAO masks. In this study, we adopted the two-step anodization method to produce anodic aluminum oxide (AAO) templates with uniform pores 40 . First, aluminum foil (99.999%, Goodfellow) was prepared to fabricate the AAO template. Prior to anodization, the Al foils were sequentially immersed in ethanol (C 2 H 5 OH), acetone (CH 3 COCH 3 ), and deionized water (DI water) to remove impurities such as organics that are attached to the surface, and they were then ultrasonicated for 15 min each. In order to produce the AAO template, water around the reaction vessel was circulated using a chiller to maintain a constant temperature. The aluminum foil was electropolished at 18 V and 7 °C in the mixed solution of perchloric acid (HClO 4 ) and ethanol (1:5 volume fraction) for 5 min to make a smooth surface and rinsed in DI water. We then performed the two-step anodization method. A solution of 0.3 M oxalic acid (C 2 H 2 O 4 ) was used as the electrolyte solution for the first and second anodization. Electropolished Al foil was anodized at 40 V and 15 °C for 24 h. In the first anodization, AAO was  Fabrication of Ni/NiO/Ni structured nanodot ReRAM. Figure 1 shows the fabrication of the Ni/NiO/ Ni structured nanodot array. Indium tin oxide (ITO) deposited on SiO 2 substrate was used as the working electrode for electrochemical deposition. In order to remove dirt on the surface, the SiO 2 substrate was immersed in 100 °C of piranha solution (4:1 = H 2 O 2 :H 2 SO 4 volume) for 10 min. It was then rinsed with DI water. After cleaning, a 100-nm-thick layer of ITO (In 2 O 3 :SnO 2 = 9:1) was deposited onto the SiO 2 substrate by radio frequency (RF) magnetron sputtering with 50 W power at room temperature; the base pressure was 3 × 10 −6 Torr, and the working pressure was 3 × 10 −3 Torr.