Fabrication of 3-nm-thick Si3N4 membranes for solid-state nanopores using the poly-Si sacrificial layer process

To improve the spatial resolution of solid-state nanopores, thinning the membrane is a very important issue. The most commonly used membrane material for solid-state nanopores is silicon nitride (Si3N4). However, until now, stable wafer-scale fabrication of Si3N4 membranes with a thickness of less than 5 nm has not been reported, although a further reduction in thickness is desired to improve spatial resolution. In the present study, to fabricate thinner Si3N4 membranes with a thickness of less than 5 nm in a wafer, a new fabrication process that employs a polycrystalline-Si (poly-Si) sacrificial layer was developed. This process enables the stable fabrication of Si3N4 membranes with thicknesses of 3 nm. Nanopores were fabricated in the membrane using a transmission electron microscope (TEM) beam. Based on the relationship between the ionic current through the nanopores and their diameter, the effective thickness of the nanopores was estimated to range from 0.6 to 2.2 nm. Moreover, DNA translocation through the nanopores was observed.

Regarding nanopore fabrication, several techniques have been developed since the first demonstration of the fabrication of nanopores by ion-beam sculpting 22 . Currently, focused-electron beam etching using a transmission electron microscope (TEM) is the method most widely used to fabricate small-diameter nanopores 18,19,27 . In addition, nanopores have been fabricated by utilizing a helium ion microscope [23][24][25] , and dielectric breakdown of membranes 17,20,21 was developed for high-throughput nanopore fabrication. These techniques enable fabrication of nanopores with diameters of less than 3 to 4 nm. Challenges remaining for the future include fabricating nanopores with low size variation in ultrathin membranes and reducing damage to the thin membranes during nanopore fabrication.
Regarding the formation of ultrathin membranes, two-dimensional materials have attracted attention. For example, graphene [30][31][32][33][34][35][36] , molybdenum disulfide 37,38 , and boron nitride 39 have been considered and studied. Although these atomically thin materials are quite attractive membrane materials, stable mass production and control over their surface conditions remain issues. Another approach is to thin a membrane with semiconductor-related materials such as Si 3 N 4 and hafnium oxide (HfO 2 ). Recently, Larkin et al. reported the fabrication of 3-to 8-nm-thick HfO 2 membranes using atomic layer deposition 14 . For Si 3 N 4 membranes, thinning the membrane using reactive ion etching 12,13 or helium ion beam etching [23][24][25] has been demonstrated, and the thickness of the fabricated membranes is equal to or less than 5 nm. In addition, a method for transferring Si 3 N 4 membranes to a quartz substrate (fishing method) has been proposed to fabricate 5-nm-thick Si 3 N 4 membranes 16 .
Si 3 N 4 is a traditional semiconductor-related material, and it is highly compatible with semiconductor processes. Therefore, it is highly desirable to use Si 3 N 4 as a membrane material for solid-state nanopores. However, until now, stable wafer-scale fabrication of Si 3 N 4 membranes with thicknesses less than 5 nm has not been reported, although a further reduction in thickness is desired. In this study, to fabricate thinner Si 3 N 4 membranes with thicknesses of less than 5 nm in a wafer, a new fabrication process that employs a polycrystalline-Si (poly-Si) sacrificial layer was proposed and evaluated. This fabrication process significantly minimizes damage to the membrane. Using this process, Si 3 N 4 membranes with thicknesses of 3 nm were stably fabricated with small thickness variation. After fabricating the membranes, nanopores were fabricated through focused-electron-beam etching using a TEM. The effective thicknesses of the fabricated nanopores were estimated based on the relationship between the ionic current through the nanopores and their diameter. Finally, long-term stability during measurement of DNA translocation through the nanopores and the characteristics of DNA translocation events were investigated.

Results
Membranes fabricated using the poly-Si sacrificial layer process. Si 3 N 4 membranes were fabricated using 8-inch Si wafers. The process flow for fabricating the membranes is shown in Fig. 1. This figure depicts two fabrication processes. The first method is the poly-Si sacrificial layer process (a). The second method is the SiO 2 sacrificial layer process (b), which was employed in our previous work and in other studies 17,26 . These processes have the advantage of enabling the fabrication of membranes with a small area of approximately 500 nmφ , which can reduce the probability of initial breakage of the membrane. The most important difference between these two processes is the different etchants used to remove the sacrificial layer. The Si 3 N 4 layer was formed via low-pressure chemical vapor deposition (LPCVD), and potassium hydroxide (KOH) aqueous solution will not etch this layer because of its strong chemical resistance against KOH aqueous solution 46,47 . However, buffered hydrofluoric acid (BHF) aqueous solution can etch the Si 3 N 4 layer, although its etching rate is slow 46,47 . Therefore, the poly-Si sacrificial layer process has the potential to stably fabricate thinner Si 3 N 4 membranes.
To determine whether the fabricated membranes contain initial defects or breakage, the ionic leakage current through the membranes was measured. Figure 2 shows the leakage current through the membranes fabricated using the above two processes. The setup for the measurement is shown in Fig. 2a. Two chambers (cis and trans chambers) were separated by the Si 3 N 4 membrane. Both chambers were filled with a 1 M KCl aqueous solution. Ag/AgCl electrodes were immersed in the aqueous solutions and connected to a voltage source and an ammeter. The voltage applied was 0.1 V. Figure 2b shows the dependence of the leakage current (I cis-trans ) through the membrane on the thickness of the deposited bottom Si 3 N 4 film. The green symbols represent the leakage current through the membranes fabricated using the SiO 2 sacrificial layer process (55 different membranes were measured), and the red symbols represent the leakage current through the membranes fabricated using the poly-Si sacrificial layer process (25 different membranes were measured). Each I cis-trans was measured 1 second after the voltage was applied. The threshold current used to determine whether a membrane contained initial defects or breakage was determined to be 10 pA. The thickness of each deposited Si 3 N 4 film was defined as the average thickness of 25 points on each wafer, which was measured by ellipsometry using a refractive index of 2.0 (the locations of the measurement points are shown in Fig. 3a). The measurement of these thicknesses was performed immediately after the deposition of the bottom Si 3 N 4 layer and before the deposition of the poly-Si or SiO 2 layer. As shown in Fig. 2a, for the membranes fabricated using the SiO 2 sacrificial layer process, high leakage current was observed when the thickness of the deposited Si 3 N 4 film was less than or equal to 7 to 9 nm. This result indicates that the SiO 2 sacrificial layer process cannot fabricate membranes with thicknesses of less than 7 nm. In contrast, the membranes fabricated using the poly-Si sacrificial layer process exhibited no significant leakage current, even when the thickness of the deposited Si 3 N 4 film was 3.18 nm. The remainder of the study focused on evaluating these 3.18-nm-thick membranes. Figure 3 presents detailed information on the thickness of the deposited Si 3 N 4 films measured using ellipsometry. The film thickness at each point on the wafer is shown in Fig. 3a, and the cumulative probability of the thicknesses is shown in Fig. 3b. The variation in the film thickness was quite small (3.10-3.35 nm), and the average thickness was 3.18 nm. Figure 4a presents cross-sectional scanning transmission electron microscope (STEM) images of the Si 3 N 4 films at three points on the wafer ((A), (B), and (C) in Fig. 4a). From these STEM images, the Si 3 N 4 film thickness was found to be approximately 2.7 nm, which is in fairly good agreement with the thickness measured using ellipsometry. Top-view TEM images of the membrane are shown in Fig. 4b. This figure confirms that the poly-Si sacrificial layer can be removed by etching with KOH aqueous solution and that clean Si 3 N 4 membranes can be fabricated. From the above results in Figs 3 and 4, it can be concluded that Si 3 N 4 membranes with thicknesses of approximately 3 nm can be fabricated using the poly-Si sacrificial layer process.
Electrical properties of membranes fabricated with nanopores. The dielectric breakdown voltage of the fabricated membranes was investigated and is shown in Fig. 5. The setup for the measurements was the same as that shown in Fig. 2. Each I cis-trans point was measured one second after each voltage was applied. Dielectric breakdown occurred when the applied voltage (V cis-trans ) reached 1 to 1.5 V. This dielectric breakdown voltage is markedly lower than that of 10-nm-thick Si 3 N 4 membranes, which is approximately 7 to 10 V 17,20 . The inset figure shows a long continuous measurement of I cis-trans at 0.1 V. The change in I cis-trans was negligibly small (approximately 0.1 pA), and dielectric breakdown of the membrane did not occur during a one-hour-long measurement. Therefore, the voltage used for ionic current measurements was usually set to 0.1 V. where φ l and φ s are the major and minor axes, respectively, of the nanopore measured from the TEM image. The relationship between φ m and the conductance of the ionic current through the nanopore (G 0 ) is illustrated in Fig. 6b. The currents were recorded 3 to 5 seconds after the voltage (0.1 V) was applied.
The plotted measurements could be fitted with the theoretically calculated lines obtained as follows 13,45 :  Long-term continuous measurements of I cis-trans through the nanopores at 0.1 V are shown in Fig. 7. Figure 7a shows I cis-trans thorough a nanopore with a φ m of 3.36 nm without applying DNA into the cis chamber. Figure 7b shows I cis-trans thorough a nanopore with a φ m of 3.65 nm after adding 20 nM 1 kbps double-stranded DNA (dsDNA) into the cis chamber. Typical I cis-trans noise power spectrums are shown in Supplementary Section SI-3. After adding dsDNA into the cis chamber, ionic current blockades were frequently observed, which indicated the occurrence of dsDNA translocation through the nanopores. However, the baseline I cis-trans current increased over time, which indicated widening of the nanopores. TEM images of the nanopores before and after the measurement of I cis-trans are shown in Supplementary Section SI-4. The widening of the nanopores was confirmed after the measurements. Such widening of nanopores after ionic-current measurements has been reported previously 27 . This increase in current was not observed prior to fabrication of the nanopores (inset of Fig. 5). Therefore, it is assumed that areas of the membrane near the edges of nanopores are weaker than the other areas. Figure 7c shows the change in baseline conductance (G 0 ) with time, and Fig. 7d shows the change in G 0 from the initial baseline current (G 0ini ) that was measured at the beginning of the measurement period. Unfilled/filled symbols represent the data obtained from measurements with/without dsDNA in the cis chamber. The increase in G 0 was approximately 5 nS for a half hour at 0.1 V. Figure 8(a) shows scatter plots of the voltage dependency and histograms of the ionic-current blockades. This voltage dependency was measured using the same nanopore with a φ m of 2.88 nm. It is reasonable that the duration of the ionic-current blockade became shorter as the applied voltage became higher because the speed of DNA translocation through the nanopores increased with increasing voltage. However, the depth of the mean ionic-current blockade (Δ I P ) showed an anomalous increase with increasing voltage (Δ I P was calculated from Gaussian fits to each histogram). Figure 8(b) shows the dependence of the mean conductance blockade (Δ G P = Δ I P /V cis-trans ) on the applied voltage. Δ G P at a lower voltage (0.1 V) was significantly smaller than Δ G P at higher voltages (0.2-0.3 V). In our experiments with other nanopores (see Supplementary Section SI-5), Δ G P at 0.1 V was 3.3 nS (the minimum value we observed) to 7.0 nS (the maximum value we observed). These Δ G P values at 0.1 V are markedly lower than Δ G P derived from a theoretical prediction discussed later.
Similar phenomena (i.e., an anomalous increase in Δ G P with increasing voltage) have been reported in several papers 23,25,28,29 . Recently, Carlsen et al. proposed a model to interpret these phenomena 25 . According to the model, positive counter ions surrounding dsDNA counteract the conductance blockade in the presence of low electrical fields, and these counterions are gradually removed from the dsDNA as the electrical field increases.
We theoretically estimated Δ G P at high voltages when counterions do not surround dsDNA. In this study, the geometric model proposed in ref. 25 was employed. Δ G is expressed as follows,

Discussion
The poly-Si sacrificial layer process was proposed and demonstrated to fabricate thin Si 3 N 4 membranes with thicknesses of less than 5 nm. The poly-Si sacrificial layer process enables the fabrication of membranes with thicknesses of approximately 3 nm, whereas the conventional SiO 2 sacrificial layer process cannot stably fabricate membranes when the thickness of the deposited Si 3 N 4 film is less than or equal to 7 to 9 nm. We believe that this difference primarily resulted from the different etchants used to remove the sacrificial layer. KOH aqueous solution cannot etch Si 3 N 4 membranes, whereas BHF aqueous solution can etch Si 3 N 4 membranes. However, the rate of etching of the Si 3 N 4 layer with BHF aqueous solution is very slow, and it remains incompletely explained why the SiO 2 sacrificial layer process could not stably fabricate membranes when the thickness of the deposited Si 3 N 4 film was less than or equal to 7 to 9 nm. The measured etching rate of the Si 3 N 4 layer was 0.17 nm/min in the presence of BHF (HF:NH 4 F = 1:60), whereas the total etching time for the SiO 2 sacrificial layer was set to 8.5 min. Even when both sides of the Si 3 N 4 membranes were exposed to the BHF aqueous solution during the etching process, the Si 3 N 4 membranes could not be etched more than 3 nm, and a membrane with a deposited Si 3 N 4 film 7 nm in thickness should have been fabricated stably. We believe that the result is attributable to the following two factors. The first factor is oxidation occurring on the surface of the bottom Si 3 N 4 layer when the SiO 2 sacrificial layer was deposited onto it. This process leads to weakening of the chemical resistance of the Si 3 N 4 layer against BHF aqueous solution. The second factor is the total stress on the membrane. Compared with membranes fabricated using the poly-Si sacrificial layer process, membranes fabricated using the SiO 2 sacrificial layer process had higher tensile stresses. In this study, Si 3 N 4 with a tensile stress of approximately 900 MPa, SiO 2 with a tensile stress of approximately 150 MPa, and poly-Si with a compressive stress of approximately 250 MPa were used. Therefore, the total stress of the membranes fabricated using the SiO 2 sacrificial layer process was supposed to be a tensile stress of approximately 360 MPa, which was higher than that of the membranes fabricated using the poly-Si sacrificial layer process (approximate tensile stress of 210 MPa). Higher tensile stresses of a membrane may lead to a decrease in its mechanical stability. The mean effective thickness of nanopores fabricated in membranes with thicknesses of 3 nm was found to be approximately 1.3 nm. According to the results reported by Lee et al. 16 , the effective thickness of nanopores in 5-nm-thick Si 3 N 4 membranes is approximately 2.4 nm. Therefore, thinning of the effective thickness is also confirmed to be associated with thinning of the physical thickness of the membrane.
According to long-term continuous measurements of the current through nanopores at 0.1 V, the current increased over time. This result was caused by widening of the nanopores. Considering that there was no increase in the current for one hour during the measurement of the current through membranes without nanopores, it is assumed that the parts of the membrane near the edges of nanopores are weaker than the other parts. It is assumed that one of the possible causes of this degradation is irradiation by the reported that the widening of nanopores during ionic-current measurements could be mitigated by optimizing the TEM beam size and other parameters. We also need to optimize the parameters of TEM beam etching for such thin membranes based on that report 27 . In addition, it is also important to fabricate more robust Si 3 N 4 membranes by improving the film formation process. To obtain more robust membranes, the chemical composition should be more stoichiometric than the current composition.
Conductance blockades (Δ G) during DNA translocation events increased as the voltage increased. Δ G at low voltages (0.1 V) was less than that at high voltages (0.2-0.3 V), and Δ G at high voltages was in good agreement with the theoretical prediction (approximately 9.7 nS). This behavior is consistent with that previously reported by Carlsen et al. 25 . However, our observed Δ G at high voltages is not the highest value among those previously reported for Si 3 N 4 nanopores. In ref. 13, a Δ G of approximately 13 nS was reported using an 8-nm-thick Si 3 N 4 membrane and 3 kbps dsDNA. We cannot explain why such a high Δ G was observed using a thicker membrane than ours, and we think that a more extended model is required to explain any DNA translocation events.
In conclusion, we fabricated Si 3 N 4 membranes with thicknesses of approximately 3 nm using the poly-Si sacrificial layer process. The mean effective thickness of the nanopores fabricated in the membrane was approximately 1.3 nm. This ultrathin membrane could be fabricated across a wafer with extremely low variation in thickness, and we thus conclude that the poly-Si sacrificial layer process is a promising approach for fabricating ultrathin membranes with solid-state nanopores. We believe that the thickness of 3 nm is not a limit; by forming more stoichiometric Si 3 N 4 films and improving the nanopore fabrication method, sub-3-nm-thick Si 3 N 4 membranes with nanopores could be fabricated.

Methods
Fabrication of membranes. The membranes were fabricated on an 8-inch silicon wafer with a thickness of 725 μ m. First, a Si 3 N 4 layer with a thickness of 3 to 12 nm was deposited using low-pressure chemical vapor deposition (reacting gases: SiH 4 -NH 3, 650 °C for 4 min), followed by measurement of the thickness of the Si 3 N 4 layer with a single-wavelength ellipsometer (wavelength: 632.8 nm; MARY-102SM, Five Lab Co., Ltd., Japan). After the measurement, a multilayer of SiO 2 /Si 3 N 4 (250/100 nm) or poly-Si/Si 3 N 4 (150/100 nm) was deposited onto the front of the wafer, and a Si 3 N 4 layer with a thickness of 100 nm was deposited onto the backside of the wafer. The top Si 3 N 4 layer was etched in circular areas with a diameter of 150 nm by reactive-ion etching, as was the backside Si 3 N 4 layer in corresponding 1038 × 1038-μ m 2 square areas, followed by etching of the silicon substrate with tetramethylammonium hydroxide (TMAH) at 85 °C for 9 hours. During etching of the silicon substrate, the front surface of the wafer was covered with protective film (ProTEK ® B3 primer and ProTEK ® B3, Brewer Science, Inc.).
The protective film was removed by acetone after etching of the silicon substrate. Finally, the SiO 2 or poly-Si layer in each circular area was etched with buffered hydrofluoric acid (BHF: HF:NH 4 F = 1:60 for 8.5 min) or potassium hydroxide (28 wt% solution of KOH for 16 min) at room temperature, and thin Si 3 N 4 membrane portions with thicknesses of 3 to 12 nm were fabricated.
Observation and fabrication of nanopores by TEM. Cross-sectional images of the Si 3 N 4 layers were obtained using a scanning transmission electron microscope (HD 2700, 200 kV, Hitachi High-Technologies Corp.). Observations of the top of the Si 3 N 4 membranes and nanopore fabrication were performed using a field-emission transmission electron microscope (JEM-2100F (HRP), 200 kV, JEOL, Ltd.). The electron flux used to fabricate the nanopores was approximately 1 × 10 8 to 1 × 10 9 e − nm −2 s −1 , and the irradiation time was approximately 5 seconds.
Setup for measurement of current through nanopores. Initially, the membrane was mounted onto a custom-built acrylic flow cell. The flow cell has two chambers (each with a volume of 90 μ L) separated by the membrane. One is a cis chamber and the other is a trans chamber. For measurements without DNA, both chambers were filled with buffer solution (1 M potassium chloride (KCl), 10 mM Tris-HCl, and 1 mM EDTA buffer at pH 7.5). For measurements with DNA, the cis chamber was filled with 1 M KCl buffer solution with 20 nM 1 kbps dsDNA (NoLimits, Fermentas, Burlington, Ontario, Canada). To ensure electrical contact with each aqueous solution, an Ag/AgCl electrode was immersed into each aqueous solution.
The measurements of ionic current shown in Figs 2 and 5 were performed using a 4156B Precision Semiconductor Parameter Analyzer (Agilent Technologies, Inc.). The current was measured one second after the voltage was applied. The measurements of ionic current shown in Figs 6-8 and the inset of Fig. 5 were performed using a patch-clamp amplifier (Axopatch 200B, Axon Instruments, Union City, CA). The detected current was low-pass-filtered with a cut-off frequency of 10 kHz using a four-pole Bessel filter and then digitized with an NI USB-6281 18-bit DAQ AD converter (National Instruments, Austin, TX) at 50 kHz. Finally, the current was recorded on the hard disk of a personal computer. These procedures and measurements were performed at room temperature. Event analysis of ionic-current blockades was performed using the OpenNanopore software (École polytechnique fédérale de Lausanne).