The ability to define patterns on the nanometre scale is a cornerstone of modern nanotechnology with applications in chemistry, biology, medicine, electronics, optics, material science and other fields. In top-down fabrication processing, patterns are produced in a resist film by commonly-used lithography methods1, including electron-beam lithography (EBL)2, optical lithography3 and projection ion/electron beam lithography with stencil masks4,5,6,7. The patterns can then be transferred onto the substrate using subtractive or additive methods, such as dry etching or lift-off8,9. However, these lithography techniques are restricted to a certain subset of target samples, which must be flat and typically several millimetres or more in size so that a uniform resist film can be applied by spin coating10. Spin coating is difficult on many other types of substrates11, including fibre facets, thin and fragile samples, or small regions on pre-fabricated devices such as semiconductor lasers12 and atomic force microscope (AFM) cantilevers13. Also, many samples have low electrical conductivity and are therefore not suitable for EBL or require the coating of additional conductive layers.

Several techniques have been developed to solve the challenges in patterning some of the above-mentioned samples. Evaporated negative resists for EBL have been demonstrated to pattern optical fibres12 and AFM cantilevers13. Dip coating14 and spray coating15 have been developed, but the difficulty of producing uniform and thin resist films present major challenges for high-resolution EBL. A focused ion beam (FIB) can be used for fabricating these samples without spin coating, but it causes extensive surface amorphization, material re-deposition and gallium implantation16,17,18. Nanoimprint lithography19,20 can also be applied to some of these unconventional substrates without spin coating21,22,23, which is ideal for rigid sample surfaces to avoid pattern distortion. A few other methods of pattern transfer have been explored in which metal nanostructures were transferred onto unconventional substrates by utilizing a sacrificial organic layer24,25; they are mainly suited for applications that do not require accurate alignment.

Here, we introduce an alternative nanofabrication solution that achieves excellent spatial resolution on both conventional and nonconventional substrates without the need of resist spin coating, wet chemical processing and electron/ion beam or UV exposure directly on the substrates. The nanofabrication process combines the well-developed processing methodology of silicon-on-insulator (SOI) samples26,27,28 and membrane-transfer techniques29,30,31. We use frameless single-crystal silicon membranes with nanoscale patterns as contact hard masks enabling plasma etching, metal lift-off and ion implantation on various unconventional substrates with spatial linewidths down to 10 nm and excellent alignment accuracy. High-resolution hundred-nanometre-thick silicon membrane masks can be produced routinely using conventional lithography methods, such as EBL, optical lithography, nanoimprint lithography and many others. We have developed two complimentary transfer techniques for relocating nanopatterned silicon membrane masks onto a desired substrate: (i) A pick-and-place method using a micro-polydimethylsiloxane (PDMS, Sylgard 184 Silicone Elastomer Kit from Dow Corning, the elastomer and curing agent mixed at a ratio of 10:1) adhesive attached to a tungsten probe tip, and, (ii) stamping of silicon membranes using a transparent polytetrafluoroethylene (PTFE) sheet. The patterned silicon membrane contact hard masks enable a precise transfer of the silicon pattern to target substrates using reactive-ion etching; they can be removed mechanically with ease once etching is completed, thus allowing a dry patterning process that does not require resist spin-coating and solvent-based mask removal procedures on target substrates. Similarly, the silicon masks allow us to realize linear gaps with aspect ratios of membrane height over width in excess of 100:1 by atomic layer deposition (ALD) to conformally shrink the mask size. In separate work, such masks were used for ion implantation with lateral straggle below 10 nm32. We also achieved fabrication of titanium lines as narrow as 10 nm from the production of tone-reversed nanometre-scale metal patterns via a dry lift-off process. Finally, this process of silicon mask transfer is suitable for a wide range of substrates; for example, we patterned high-quality gold nanodot arrays on a fibre facet using the dry lift-off process.


We investigated two methods for transferring 220-nm-thick patterned silicon membranes onto target substrates. In the first method, we used wet etching in 49% hydrofluoric acid (HF) for 90 seconds to undercut the patterned silicon membranes, which remained connected to the substrate using 250-nm-wide, 500-nm-long bridges. These bridges kept the suspended membranes in the plane of the device layer surface (Fig. 1a). We then used a micro-PDMS adhesive sphere on a tungsten probe tip (Fig. 1b) to pick up these membranes from the SOI chip (See Methods for details of preparing patterned silicon membranes and micro-PDMS adhesives). This pick-up process involved slowly lowering the PDMS sphere onto a patterned silicon membrane, deforming the sphere in the process to produce a large surface contact area. Then, the sphere was rapidly lifted away from the sample, causing the bridges to snap off. A patterned silicon membrane attached to the micro-PDMS adhesive on a tungsten tip is shown with different viewing angles in Fig. 1c and Fig. 1d. By rolling the PDMS adhesive over the target substrate's surface and slowly lifting the PDMS adhesive back up, we released the attached silicon membrane onto the substrate. The micro-PDMS adhesive is analogous to previously demonstrated stamping techniques33,34,35, but because of the low profile and cross-section, it enables operation with sub-1 μm positional and sub-1.5° rotational placement accuracy31 (See Supplementary Fig. S1 online) and has the potential to be integrated into an electron microscope to achieve nanometre-scale placement accuracy29,30. In this demonstration, the area of each membrane was no larger than 200 μm × 200 μm because we found that larger silicon membranes bow and stick to the bottom silicon substrates during drying after the wet HF undercut step. However, larger membranes should be compatible with this transfer method provided that the mechanical strain is relieved by a critical point dryer36 or that we use SOI samples with thicker buried oxide (BOX) layers. The micro-PDMS method enables the transfer of silicon membranes onto the target substrate with a yield close to 100%.

Figure 1
figure 1

Mask production and transfer techniques.

(a) Arrays of freestanding patterned silicon membranes on an SOI wafer. Inset: Scanning electron micrograph (SEM) of a typical suspended silicon membrane using 250-nm-wide, 500-nm-long bridges connected to the substrate. The bridges are denoted by white circles. (b) A micro-PDMS adhesive attached to a tungsten probe tip (side view) for transfer of a patterned silicon membrane. (c) Illustration of a silicon membrane attached to the micro-PDMS adhesive on a tungsten tip during the transfer. (d) A silicon membrane attached to the micro-PDMS adhesive on a tungsten tip in air (bottom view). The silicon membrane is circled by blue dotted line. (e) Millimetre-scale silicon membranes were transferred onto a piece of quartz using a polytetrafluoroethylene (PTFE) sheet.

In the second method, silicon membranes were transferred during the HF undercut step. In this process, we omitted the connecting bridges in the SOI chip. The chip was placed face-down on the target substrate directly, or onto an intermediate transfer substrate. Here, we focus on the latter technique, in which the intermediate substrate consisted of a transparent PTFE sheet (Teflon Petri Dish Linear from Fluoro Lab). After we etched the face-down SOI BOX layer in 49% HF for 10 minutes, silicon membranes were released and they floated down onto the PTFE sheet. The sheet itself is not etchable in HF acid. We flushed away the residual HF with deionized water using a pipette when the membrane was still facing-down. We found that membranes kept their original arrangement with high probability (>90%) if the samples were not moved during the flushing process. We observed that more than half of the silicon membranes would floated down onto the PTFE sheet. After flipping the transparent PTFE, silicon membranes were aligned over the target chip in an optical microscope and pressed down. Because of the weak surface bonding of the PTFE sheet with the silicon membrane, the membrane was easily transferred onto the target substrate when pressed down. Using this process, we succeeded in transferring large, millimetre-scale membranes (Fig. 1e).

As discussed above, the transferred silicon membranes function as excellent contact hard masks for reactive-ion etching. Here, we demonstrate the applicability of our method to pattern sub-micron-thick diamond membranes with lateral dimensions on the scale of hundreds of microns, adhering to a silicon substrate. Patterned diamond membrane systems have numerous emerging applications in mechanics37, nonlinear optics38 and quantum information processing39. Compared to a commercial bulk diamond with flat and even surfaces, it is difficult to produce uniformly flat diamond membranes with lateral dimensions on the scale of hundreds of microns40. Patterning such 100-μm-scale membranes is challenging for conventional nanofabrication techniques due to the difficulty of spin-coating uniform resist films. In addition, we found that spin coating would sometimes float off these diamond membranes because of their inefficient surface bonding with silicon substrates. Our process can overcome these challenges with the following procedure (Fig. 2a): First, a diamond membrane (300 nm in thickness and 10–500 μm in length) adhered to a bulk silicon substrate because of Van der Waals forces. We then placed a silicon membrane hard mask with photonic crystal (PC) patterns41,42 onto the diamond membrane and used oxygen plasma etching43 to transfer the PC structures into the diamond membrane. Next, a tungsten tip mechanically removed the silicon mask and finally an isotropic SF6 plasma-etching step removed the silicon underneath the diamond membrane to suspend it at devices' locations for optical spectroscopic measurements. This method is compatible with sample sizes down to hundreds of square microns; the smallest diamond membrane patterned using this technique was 15 μm × 25 μm in area (Fig. 2b). Spectroscopic measurements of the diamond PC cavities indicated optical quality factors (Q) as high as 4,700 for L7 PC cavities (PC cavities with seven missing holes, as shown in Fig. 2c). We attribute this high Q to the well-developed processing methodology of silicon and the high fidelity of pattern transfer with low edge erosion of silicon masks (See Supplementary Fig. S2a online). High-quality diamond PC cavities fabricated via this technique were also used to couple with nitrogen-vacancy quantum memories44.

Figure 2
figure 2

Patterning of a diamond membrane using a silicon membrane as a contact etch mask.

(a) Illustration of fabrication method: (I) A patterned silicon mask was transferred onto a diamond membrane (less than 300 nm in thickness, adhering to a bulk silicon substrate) using a micro-PDMS adhesive. (II) The silicon membrane on top of the diamond membrane served as an etch mask for oxygen plasma etching. (III) The diamond membrane was patterned with nanostructures during oxygen etching after subsequent mask removal. (IV) A SF6 isotropic dry etching removed the silicon underneath and suspended the diamond membrane at devices' locations. (b) Optical image of a silicon mask covering a diamond membrane that is circled by the blue dotted line. (c) SEM of a suspended diamond L7 PC cavity. Inset: Measured cavity resonance (blue dots) at 623.3 nm with a Lorentzian fit, yielding a quality factor of 4,700 (red line).

The process detailed above has many other advantages over conventional lithography methods. Silicon membrane hard masks can be re-used multiple times for dry etching. For oxygen plasma etching of diamond membranes, the silicon etch rate is negligible, while typical etch rates of diamond are 1.8 μm/hr in our case. We demonstrated 8.5 μm etching of a diamond using a 220-nm-thick silicon mask, achieving an etching selectivity of over 38 (See Supplementary Fig. S2b online). Deeper etching should be possible with silicon masks if we use SOI chips with thicker device layer. Unlike soft materials24,25,45,46 and nitride membranes6,47,48,49, silicon masks have no internal stress or distortion, even after the transfer and are free of folding and wrinkling. Additionally, we can protect the surface of silicon masks by depositing etch-resistant materials on them. For example, Cr deposited by electron beam or thermal evaporation makes silicon masks more etch-resistant against fluorinated gases. Alumina deposited by atomic layer deposition also protects silicon masks from chlorine etching.

Fig. 3a demonstrates an alternative use of the silicon membrane hard masks for nanometre-resolution lift-off patterning. The lift-off process is the most direct solution to transfer patterns into materials that are not etchable, such as many magnetic metals, high-temperature superconductors and precious metals. Generally, the lift-off is accomplished by using a resist that can be dissolved by a solvent, sometimes with an aid of ultrasonication. Poor metal adhesion can become detrimental when resist scum is left on the surface50. The lift-off is straightforward with the silicon mask transfer process and requires no liquid or sonication steps. It can be applied on almost any arbitrarily chosen substrates and unlike the conventional lift-off processes, naturally no residual scum is left behind. Fig. 3b shows metal lines with 10 nm width on a silicon substrate produced by electron beam evaporation of 15 nm thick titanium through a patterned silicon mask, which was subsequently removed with a tungsten tip. The ability to pattern such narrow lines indicates that our silicon masks, in contact with target substrates, provide better spatial linewidth than metal deposition using suspended silicon nitride masks with frames47,48,49. With our 220 nm thick silicon membrane masks, we were able to deposit up to 100 nm thick titanium. The deposition of thicker metal films was not tested and may require thicker silicon masks. And a close-up SEM image (Fig. 3c) shows excellent line edge roughness below 2 nm. Silicon masks can be re-used multiple times for dry lift-off as well. We can also use the ALD of alumina to conformably shrink the mask size to achieve controllable metal lift-off with 0.1 nm accuracy51.

Figure 3
figure 3

Dry lift-off.

(a) Illustration of fabrication: (I) A patterned silicon mask was transferred onto the substrate. (II) A metal layer was deposited via an electron beam or thermal evaporation. (III) A tungsten tip was swept across a silicon mask to mechanically remove the mask. (b) SEM image of a nanoscale pattern. (c) The expanded view of the white rectangular region in (b). The minimum linewidth that we achieved was 10 nm.

Nanofabrication using transferred silicon membrane hard masks can be applied to substrates of irregular shape. As a proof of concept, we demonstrated patterning of gold nanodot arrays on a fibre facet. Functionalization on optical fibres has recently attracted much attention because fibre-based devices can be small, lightweight and portable for in-situ sensing, imaging and optical trapping applications52,53,54. However, the size and the shape of an optical fibre preclude the use of conventional lithographic processes25. Producing a uniformly thick layer of resist by spin coating is a particular challenge and mounting optical fibres in electron-beam writers or optical lithography tools is difficult. To overcome these challenges, we transferred a silicon mask onto a fibre facet using the micro-PDMS adhesive described above (Fig. 4a). After the transfer, we deposited 70 nm gold and subsequently removed the silicon mask with another tungsten tip, creating arrays of gold dot arrays (the dot's diameter was 130 nm) on the fibre facet (Fig. 4b), which could enable surface-plasmon-enhanced Raman scattering55 on a fibre tip. Our process can also be applied to create patterns by etching or dry lift-off on AFM cantilevers, curved lenses and many other irregular substrates.

Figure 4
figure 4

Patterning on a fibre facet.

(a) A silicon membrane with patterned gold dot arrays was transferred onto a fibre facet using a micro-PDMS adhesive. Inset: The expanded view of the silicon membrane on the fibre core. (b) After silicon mask transfer, gold dot arrays were tone-reversely patterned on a fibre facet by deposition of a layer of 70 nm gold and removal of silicon masks using a tungsten tip. Inset: The expanded view of the white rectangular region to show gold dots on the fibre facet.


Nanofabrication using transferred silicon membrane hard masks avoids direct electron or ion beam exposure on target substrates. This provides an alternative methodology suitable for samples that are non-conductive, electron sensitive or easily damaged by electron or ion irradiation. In our laboratory, we also use these masks for nanopatterned nitrogen ion implantation on a diamond to form proximal qubit clusters32.

By exploiting mature silicon nanofabrication processes, our method of transferring silicon membrane hard masks can create nanopatterns on a wide range of substrates without spin-coating, wet chemical processing, scanning electron/ion beam or UV exposure. We demonstrated successful fabrication of suspended high-Q diamond PC devices, as well as patterning of 10-nm metal lines on a silicon substrate. Silicon masks furthermore enabled us to integrate arrays of gold nanodots on a facet of an optical fibre. The introduced silicon masks, ranging in scale from tens of micrometres to a few millimetres, can be re-used multiple times. Nanofabrication using transferred hard masks expands the applicability of standard patterning techniques to new substrates and offers exceptionally high spatial patterning resolution with excellent etching selectivity.


The nanopatterned silicon membranes were fabricated using EBL and cryogenic etching. A ZEP-520A EBL resist, diluted in anisole (1:3 ratio), was spin-coated on a SOI substrate (220 nm thick silicon device layer, 1 μm thick BOX layer) at 3000 rpm for 45 seconds, followed by baking on a hotplate at 180°C for 3 minutes to realize a resist layer of 60 nm. After electron beam exposure of the samples in a JEOL JBX6300FS electron beam writer (100 kV), they were developed at low temperature (−15°C) in hexyl acetate developer. Development at low temperature improved the quality of the resist layer56. We used an Oxford ICP etcher (mixture of SF6 and O2, −100°C) to transfer the patterns from the resist layer to silicon.

The micro-PDMS adhesive sphere was prepared as follows: The tungsten probe with a tip radius of 0.5 μm (Ted Pella) was dipped in uncured PDMS gel. After removing the tip, a droplet of PDMS formed near its sharpest point. The droplet was dried in warm air, forming a hemisphere ball that was firmly attached to the tungsten tip. We controlled the size of the PDMS sphere by adjusting the angle of and the depth to which the tip was dipped into the PDMS gel. Then the PDMS-tipped tungsten probe was mounted on a six-axis micromanipulator for pick-and-place.