Abstract
Reversible computing has been studied since Rolf Landauer advanced the argument that has come to be known as Landauer's principle. This principle states that there is no minimum energy dissipation for logic operations in reversible computing, because it is not accompanied by reductions in information entropy. However, until now, no practical reversible logic gates have been demonstrated. One of the problems is that reversible logic gates must be built by using extremely energyefficient logic devices. Another difficulty is that reversible logic gates must be both logically and physically reversible. Here we propose the first practical reversible logic gate using adiabatic superconducting devices and experimentally demonstrate the logical and physical reversibility of the gate. Additionally, we estimate the energy dissipation of the gate and discuss the minimum energy dissipation required for reversible logic operations. It is expected that the results of this study will enable reversible computing to move from the theoretical stage into practical usage.
Introduction
Energy efficiency has become the most important metric of advancement in modern computer design^{1,2}. One of the most wellknown theories regarding the fundamental energy limits in computation is Landauer's principle^{3}, where Rolf Landauer predicted that the erasure of 1bit information generates heat of more than k_{B}Tln2, so that the entropy of the system does not decrease, where k_{B} is the Boltzmann constant and T is temperature. This principle imposed the Landauer bound of k_{B}Tln2 as the minimum energy dissipation on irreversible logic operations, such as AND and OR, because they erase 1bit information at every logic operation. After long discussions and numerical analyses of this energy bound^{4,5,6}, some very recent experimental demonstrations that confirmed its validity have been reported^{7,8}. These results indicate that the Landauer bound limits the minimum energy dissipation in modern CMOSbased computers^{9,10,11,12}, which perform irreversible logic operations. In order to go beyond this bound, Edward Fredkin established a theory of reversible computing^{13}, where the entropy of information is conserved during computation to prevent the heat generation resulting from the entropy reduction. He introduced the Fredkin gate^{13} as a 3in/3out reversible logic gate, which is logically reversible^{14} because its inputs are uniquely determined from its outputs, thereby conserving the entropy during computation. As part of the effort to achieve practical reversible logic gates, several physical models and devices have been proposed^{15,16,17,18}. However, no reversible logic operations have been experimentally demonstrated to date. Thus, discussions on reversible computing remain theoretical and the question as to whether reversible computing is achievable using practical logic devices has yet to be resolved.
In order to achieve reversible logic gates, an extremely energyefficient logic device is first necessary because the energy dissipated by the erasure of information is of the order of k_{B}T. The bit energy of conventional logic devices, including CMOS and energyefficient superconductor logics^{19,20,21}, is at least larger than ~1,000k_{B}T, which is too large to permit their use as reversible logic gates. In contrast, the adiabatic quantumfluxparametron (AQFP) logic^{22,23,24,25}, which is an adiabatic superconducting logic device, is a good candidate for use as a building block of reversible logic gates because its bit energy can go below k_{B}T due to adiabatic switching operations^{25}. Figure 1a shows the equivalent circuit of an AQFP buffer/NOT gate, which is based on the quantumfluxparametron (QFP) gate invented by Eiichi Goto^{26,27}. The gate is composed of inductances, L_{1}, L_{2} and L_{q} along with the Josephson junctions, J_{1} and J_{2}. By applying magnetic fluxes to the gate using an ac excitation current, I_{x}, either J_{1} or J_{2} will switch depending on the direction of the input current, I_{in}. As a result, one singlefluxquantum (SFQ) is stored in the loop composed of either L_{1}, L_{q} and J_{1} or L_{2}, L_{q} and J_{2}, generating an output current, I_{out} through a mutual inductance, M = k_{io}(L_{q}L_{out})^{0.5}. During this switching event, the potential energy of the gate changes adiabatically or reversibly from a singlewell to a doublewell, without a sudden state transition^{22,23}. This means that the switching energy can be much smaller than the energy barrier height, I_{c}Φ_{0}, which corresponds to energy dissipation during a nonadiabatic 2πtransition in a currentbiased Josephson junction, where I_{c} is a critical current of Josephson junctions and Φ_{0} is an SFQ.
Results and Discussion
A logic gate is considered to be physically reversible^{28} if its potential energy changes adiabatically and reversibly. Konstantin K. Likharev argued that physical reversibility is necessary to prevent nonadiabatic energy dissipation during a switching event^{28}, as well as logical reversibility. Bit information in a physically reversible gate can propagate bidirectionally, therefore the circuit topology of a reversible logic gate must be symmetrical in the data flow direction. In this study, we utilize 3in majority (MAJ) gates and 3out splitter (SPL) gates as building blocks. Figure 1b shows a block diagram of a 3in MAJ gate with three input buffers, where a white block corresponds to an AQFP buffer gate. The logic state of the output port, x, is defined as x = MAJ(a, b, c) = a·b + b·c + c·a, where a, b, c are the logic states of the three input ports. Figure 1c is the block diagram of a 3out SPL gate with an input buffer. The logic states of each output port are determined to be x = y = z = a. While the 3in MAJ gate and the 3out SPL gate have the same circuit topologies, the data flow direction, or the order of the excitation of each gate, is opposite. Figure 1d shows a block diagram of our proposed 3in and 3out reversible logic gate, which we have designated as the reversible quantumfluxparametron (RQFP) gate. The RQFP gate is composed of three 3in MAJ gates and three 3out SPL gates, whose function is represented by the following equation:
Table I is the truth table of the RQFP gate. This table clearly shows that the gate is injective and logically reversible by operating the function two times: F(F(a, b, c)) = (a, b, c). Additionally, the RQFP gate is considered to be a primitive gate in reversible computing, because MAJ, NOT gates and constant inputs constitute a logical primitive. Because a 3in MAJ gate and a 3out SPL gate have the same circuit topologies, the topology of the RQFP gate is symmetrical. Data in the RQFP gate can propagate bidirectionally due to this symmetrical circuit topology, depending on the order of excitation. Specifically, if the SPL gates are excited earlier (excitation current, I_{x1} is provided earlier than I_{x2}), the data propagates from the ports, a, b and c to x, y and z. If the MAJ gates are excited earlier, the data propagates in the opposite direction. Therefore, the RQFP gate is physically reversible.
To demonstrate logical and physical reversibility of an RQFP gate, we conducted three kinds of experiments, α, β and γ. The block diagrams of these three experiments are shown in Fig. 2a, where a, b and c are input ports and x, y and z are output ports. In the experiment α, we demonstrate logic operations of an RQFP gate. In β, two RQFP gates are serially connected to demonstrate logical reversibility. Specifically, if a = a’, b = b’ and c = c’, the RQFP gate is injective and proven to be logically reversible. In γ, two RQFP gates are connected but one is physically mirrored to demonstrate physical reversibility. Specifically, if a = a”, b = b” and c = c”, data can propagate bidirectionally in an RQFP gate and the gate is proven to be physically reversible. The RQFP gates were designed and fabricated using the Nb Josephson process, the AIST standard process (STP2)^{29}. Figure 2b is a microphotograph of the circuits used in experiment γ, where I_{x1}, I_{x2} and I_{x3} are threephase excitation currents. Here, it can be seen that two RQFP gates are serially connected but their physical layouts are horizontally mirrored. Figure 2c shows the measurement results of the experiments α, β and γ, using trapezoidal excitation currents of 100 kHz at 4.2K. In the experiment α, the correct logic operations were confirmed for the RQFP gate. In β, the obtained outputs (a’, b’ and c’) corresponded to the inputs (a, b and c), which proves the logical reversibility of the RQFP gate. Similarly, the outputs corresponded to the inputs in γ, which proves its physical reversibility. These results confirm that the RQFP gate is logically and physically reversible and that the RQFP gate is a practical reversible logic gate.
Next, we calculated energy dissipation of the RQFP gate by integrating the product of excitation currents and voltages over time using the Josephson circuit simulator, JSIM^{30}. Figure 3a shows a block diagram for the simulation, where input and output buffers are inserted to avoid the interaction with input and output ports. Figure 3b provides the simulation results and shows the total energy dissipation per clock cycle, including an RQFP gate, input and output buffers, as a function of a rise/fall time of excitation currents. As can be seen in the figure, energy dissipation decreases almost linearly with an increase in the rise/fall time for all input patterns, which indicates that all gates operate adiabatically and reversibly during logic operations^{25,28}. For a rise/fall time of 10,000 ps, the total energy dissipation of the RQFP gate and buffers composed of 69 AQFP gates reaches ~ 1 × 10^{−21} J/cycle. The bit energy per AQFP gate is ~ 2 × 10^{−23} J/cycle, which is much smaller than the barrier height, I_{c}Φ_{0} ~ 1.0 × 10^{−19} J for I_{c} = 50 μA and around the same order of magnitude as the Landauer bound at 4.2 K, k_{B}Tln2 ~ 4.0 × 10^{−23} J. These calculation results show that there is no minimum energy dissipation for reversible logic operations using the RQFP gates.
Conclusions
Based on the above results, we can conclude that the RQFP gate is the first practical reversible logic gate. It is clear that through the use of RQFP gates, detailed discussion and investigations on the energy efficiency of reversible computing will become possible. Although the energy dissipation of the RQFP gate was too small to measure in the lowspeed demonstration at 100 kHz, we expect that we will be able to measure it at a higher operation frequency (~1 GHz) in future work by using highspeed interface circuits^{31} and the superconducting resonatorbased method^{24}. Also, in previous work^{24}, we have confirmed that calculation results of energy dissipation well agree with experimental results using superconducting resonators.
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Acknowledgements
This work was supported by a GrantinAid for Scientific Research (S) (No. 22226009) from the Japan Society for the Promotion of Science (JSPS). The circuits were fabricated in the clean room for analogdigital superconductivity (CRAVITY) of National Institute of Advanced Industrial Science and Technology (AIST) with the standard process 2 (STP2). The AISTSTP2 is based on the Nb circuit fabrication process developed in International Superconductivity Technology Center (ISTEC). We would like to thank C. J. Fourie for improving the 3D inductance extractor, InductEx that we used during the layout design of the circuits.
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N.T. designed circuits, carried out simulations and experiments and wrote the paper. Y.Y. and N.Y. supported theoretical aspects and supervised simulations and experiments. All authors discussed the results and commented on the manuscript.
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Takeuchi, N., Yamanashi, Y. & Yoshikawa, N. Reversible logic gate using adiabatic superconducting devices. Sci Rep 4, 6354 (2015) doi:10.1038/srep06354
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