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Advanced packaging of chiplets for future computing needs

Nature Electronics volume 7, pages 425–427 (2024)Cite this article

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Heterogeneous integration of chips in three-dimensional systems will be needed to meet increasing global demands for computing power.

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Fig. 1: Interconnect technologies.
Fig. 2: Heterogeneously integrated system-on-package.

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Acknowledgements

We thank D. Das, W. Morgan, Z. Qian, K. Aygun, K. Radhakrishnan, R. Mongia and S. Nekkanty. Discussions with W. Chen and S. Iyer, as well as the HIR, IEEE-EPS and SRC teams, are gratefully acknowledged.

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  1. Intel Corporation, Santa Clara, CA, USA

    Debendra Das Sharma

  2. Intel Corporation, Chandler, AZ, USA

    Ravi V. Mahajan

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  1. Debendra Das Sharma
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  2. Ravi V. Mahajan
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Correspondence to Debendra Das Sharma or Ravi V. Mahajan.

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Das Sharma, D., Mahajan, R.V. Advanced packaging of chiplets for future computing needs. Nat Electron 7, 425–427 (2024). https://doi.org/10.1038/s41928-024-01175-3

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