Abstract
Two-dimensional molybdenum disulfide (MoS2) is a potential alternative channel material to silicon for future scaled transistors. Scaling down the gate dielectric and maintaining a high-quality interface is challenging with such materials, because the atomic thickness of MoS2 makes it sensitive to defects common in amorphous gate oxides such as hafnium oxide (HfOx). Here we show that a van der Waals gap of 5.3 Å can be formed between HfOx and MoS2 via the ozone treatment of a hafnium disulfide (HfS2)/MoS2 stack. The ozone treatment converts the HfS2 flake into a HfOx dielectric, and excess oxygen accumulation at the interface widens the van der Waals gap. Experimental results and density functional theory calculations show that the increased gap decouples the interaction between the HfOx dielectric and MoS2 channel, allowing the intrinsic properties of the MoS2 semiconductor to be preserved. The resulting MoS2 van der Waals-gap-gated transistors exhibit a negligible hysteresis of 10 mV and average subthreshold slope of 63.1 mV dec−1, which is close to the physical Boltzmann limit of 60.0 mV dec−1. We also show that the transistors can be used to construct NOT, OR and AND logic gates.
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The data that support the plots within this paper and other findings of this study are available from the corresponding authors on reasonable request.
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Acknowledgements
This work was supported by the National Key Research and Development Program of Ministry of Science and Technology (no. 2018YFA0703700), China National Funds for Distinguished Young Scientists (grant 61925403), China National Funds for Outstanding Young Scientists (grant 62122024), the National Natural Science Foundation of China (grant nos. 62274060, 12174094, 51872084 and 51991341) and Natural Science Foundation of Hunan Province (grant nos. 2021JJ20028 and 2020JJ1002), and partly by the Key Research and Development Plan of Hunan Province (grant nos. 2022WK2001 and 2018GK2064).
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P.L. and C.L. contributed equally to this work. L.L. and X.L. conceived and designed the experiments. P.L. fabricated the VGG transistors, measured the electrical performance and prepared the manuscript. C.L. and J.L. designed the schematic and prepared the TEM samples. X.D. completed the current–voltage measurements. W.Q. finished the Raman measurements and MD simulations. W.Z. completed the TEM analysis using the protocols provided by C.M. Y.Lv. provided the DFT analysis. X.Z., Y.Liu., F.S. and J.H. presented the suggestions for improving the quality of this work and revised the manuscript. All the authors examined and commented on the manuscript.
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Luo, P., Liu, C., Lin, J. et al. Molybdenum disulfide transistors with enlarged van der Waals gaps at their dielectric interface via oxygen accumulation. Nat Electron 5, 849–858 (2022). https://doi.org/10.1038/s41928-022-00877-w
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DOI: https://doi.org/10.1038/s41928-022-00877-w
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