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Scaled indium oxide transistors fabricated using atomic layer deposition

Nature Electronics volume 5, pages 164–170 (2022)Cite this article

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Abstract

To continue to improve integrated circuit performance and functionality, scaled transistors with short channel lengths and low thickness are needed. But further scaling of silicon-based devices and the development of alternative semiconductor channel materials that are compatible with current fabrication processes are challenging. Here we report atomic-layer-deposited indium oxide transistors with channel lengths down to 8.0 nm, channel thicknesses down to 0.50 nm and equivalent dielectric oxide thickness down to 0.84 nm. Due to the scaled device dimensions and low contact resistance, the transistors exhibit high on-state currents of 3.1 A mm–1 at a drain voltage of 0.5 V and transconductance of 1.5 S mm–1 at a drain voltage of 1.0 V. Our approach provides a promising alternative channel material for scaled transistors with back-end-of-line-processing compatibility.

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Fig. 1: Schematic, TEM images and I–V characteristics of ALD In2O3 transistors.
Fig. 2: Thickness scaling of ALD In2O3 down to 0.5 nm.
Fig. 3: EOT scaling of ALD In2O3 transistors down to sub-1 nm.
Fig. 4: Channel length scaling of ALD In2O3 transistors down to 8 nm.
Fig. 5: Benchmarking of ALD In2O3 with other ultrathin semiconductors.

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Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.

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Acknowledgements

This work was supported in part by the Semiconductor Research Corporation (SRC) nCore Innovative Materials and Processes for Accelerated Compute Technologies (IMPACT) Center and in part by the Air Force Office of Scientific Research (AFOSR) and SRC/Defense Advanced Research Projects Agency (DARPA) Joint University Microelectronics Program (JUMP) Applications and Systems-driven Center for Energy Efficient integrated Nano Technologies (ASCENT) Center.

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Authors and Affiliations

  1. School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, IN, USA

    Mengwei Si, Zehao Lin, Zhizhong Chen & Peide D. Ye

  2. Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China

    Mengwei Si

  3. School of Materials Engineering, Purdue University, West Lafayette, IN, USA

    Xing Sun & Haiyan Wang

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  1. Mengwei Si
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  6. Peide D. Ye
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Contributions

P.D.Y. and M.S. conceived the idea and proposed the ALD In2O3 scaling research. M.S. developed the ALD process of In2O3 as a high-performance oxide semiconductor. M.S. and Z.L. performed the device fabrication, electrical measurement and analysis on thickness and EOT scaling of ALD In2O3 devices. Z.L. and M.S. conducted the channel length scaling of ALD In2O3 devices down to 8 nm. Z.C., X.S. and H.W. performed the STEM and EDX measurements. M.S. and P.D.Y. co-wrote the manuscript and all the authors commented on it.

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Correspondence to Peide D. Ye.

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Nature Electronics thanks Seong Keun Kim and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Supplementary Figs. 1–4 and Table 1.

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Si, M., Lin, Z., Chen, Z. et al. Scaled indium oxide transistors fabricated using atomic layer deposition. Nat Electron 5, 164–170 (2022). https://doi.org/10.1038/s41928-022-00718-w

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