A native oxide high-κ gate dielectric for two-dimensional electronics

Abstract

Silicon-based transistors are approaching their physical limits and thus new high-mobility semiconductors are sought to replace silicon in the microelectronics industry. Both bulk materials (such as silicon-germanium and III–V semiconductors) and low-dimensional nanomaterials (such as one-dimensional carbon nanotubes and two-dimensional transition metal dichalcogenides) have been explored, but, unlike silicon, which uses silicon dioxide (SiO2) as its gate dielectric, these materials suffer from the absence of a high-quality native oxide as a dielectric counterpart. This can lead to compatibility problems in practical devices. Here, we show that an atomically thin gate dielectric of bismuth selenite (Bi2SeO5) can be conformally formed via layer-by-layer oxidization of an underlying high-mobility two-dimensional semiconductor, Bi2O2Se. Using this native oxide dielectric, high-performance Bi2O2Se field-effect transistors can be created, as well as inverter circuits that exhibit a large voltage gain (as high as 150). The high dielectric constant (~21) of Bi2SeO5 allows its equivalent oxide thickness to be reduced to 0.9 nm while maintaining a gate leakage lower than thermal SiO2. The Bi2SeO5 can also be selectively etched away by a wet chemical method that leaves the mobility of the underlying Bi2O2Se semiconductor almost unchanged.

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Fig. 1: Crystal and electronic structures.
Fig. 2: Controlled oxidation of Bi2O2Se layers and facile etching of Bi2SeO5.
Fig. 3: Electrical properties of Bi2SeO5.
Fig. 4: Top-gated Bi2O2Se/Bi2SeO5 FETs and inverter circuit.

Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.

References

  1. 1.

    Kilby, J. S. Invention of the integrated circuit. IEEE Trans. Electron. Dev. 23, 648–654 (1976).

    Article  Google Scholar 

  2. 2.

    Kingon, A. I., Maria, J. P. & Streiffer, S. K. Alternative dielectrics to silicon dioxide for memory and logic devices. Nature 406, 1032–1038 (2000).

    Article  Google Scholar 

  3. 3.

    Muller, D. A. et al. The electronic structure at the atomic scale of ultrathin gate oxides. Nature 399, 758–761 (1999).

    Article  Google Scholar 

  4. 4.

    Van Zant, P. Microchip Fabrication: A Practical Guide to Semiconductor Processing 4th edn, 100–121 (McGraw Hill, 2000).

  5. 5.

    Ferain, I., Colinge, C. A. & Colinge, J. P. Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors. Nature 479, 310–316 (2011).

    Article  Google Scholar 

  6. 6.

    Aberg, I., Chleirigh, C. N., Olubuyide, O. O., Duan, X. & Hoyt, J. L. High electron and hole mobility enhancements in thin-body strained Si/strained SiGe/strained Si heterostructures on insulator. In Technical Digest of the IEEE International Electron Devices Meeting 2004 173–176 (IEEE, 2004).

  7. 7.

    Xiang, J. et al. Ge/Si nanowire heterostructures as high-performance field-effect transistors. Nature 441, 489–493 (2006).

    Article  Google Scholar 

  8. 8.

    Passlack, M. et al. High mobility III–V MOSFETs for RF and digital applications. In Proceedings of the International Electron Devices Meeting 2007 621–624 (IEEE, 2007).

  9. 9.

    Ohtomo, A. & Hwang, H. Y. A high-mobility electron gas at the LaAlO3/SrTiO3 heterointerface. Nature 427, 423–426 (2004).

    Article  Google Scholar 

  10. 10.

    Qiu, C. G. et al. Scaling carbon nanotube complementary transistors to 5-nm gate lengths. Science 355, 271–276 (2017).

    Article  Google Scholar 

  11. 11.

    Shulaker, M. M. et al. Carbon nanotube computer. Nature 501, 526–530 (2013).

    Article  Google Scholar 

  12. 12.

    Desai, S. B. et al. MoS2 transistors with 1-nanometer gate lengths. Science 354, 99–102 (2016).

    Article  Google Scholar 

  13. 13.

    Li, L. K. et al. Black phosphorus field-effect transistors. Nat. Nanotechnol. 9, 372–377 (2014).

    Article  Google Scholar 

  14. 14.

    Bandurin, D. A. et al. High electron mobility, quantum Hall effect and anomalous optical response in atomically thin InSe. Nat. Nanotechnol. 12, 223–227 (2017).

    Article  Google Scholar 

  15. 15.

    Novoselov, K. S. et al. A roadmap for graphene. Nature 490, 192–200 (2012).

    Article  Google Scholar 

  16. 16.

    Chhowalla, M., Jena, D. & Zhang, H. Two-dimensional semiconductors for transistors. Nat. Rev. Mater. 1, 16052 (2016).

    Article  Google Scholar 

  17. 17.

    Franklin, A. D. Nanomaterials in transistors: from high-performance to thin-film applications. Science 349, aab2750 (2015).

    Article  Google Scholar 

  18. 18.

    Li, M. Y., Su, S. K., Wong, H. S. P. & Li, L. J. How 2D semiconductors could extend Moore’s law. Nature 567, 169–170 (2019).

    Article  Google Scholar 

  19. 19.

    Liu, Y., Duan, X. D., Huang, Y. & Duan, X. F. Two-dimensional transistors beyond graphene and TMDCs. Chem. Soc. Rev. 47, 6388–6409 (2018).

    Article  Google Scholar 

  20. 20.

    Zhao, H. et al. Effects of gate-first and gate-last process on interface quality of In0.53Ga0.47As metal–oxide–semiconductor capacitors using atomic-layer-deposited Al2O3 and HfO2 oxides. Appl. Phys. Lett. 95, 253501 (2009).

    Article  Google Scholar 

  21. 21.

    Gutowski, M. et al. Thermodynamic stability of high-κ dielectric metal oxides ZrO2 and HfO2 in contact with Si and SiO2. Appl. Phys. Lett. 80, 1897–1899 (2002).

    Article  Google Scholar 

  22. 22.

    Maiti, C. K., Samanta, S. K., Chatterjee, S., Dalapati, G. K. & Bera, L. K. Gate dielectrics on strained Si/SiGe heterolayers. Solid State Electron. 48, 1369–1389 (2004).

    Article  Google Scholar 

  23. 23.

    Toriumi, A. et al. Opportunities and challenges for Ge CMOS—control of interfacing field on Ge is a key. Microelectron. Eng. 86, 1571–1576 (2009).

    Article  Google Scholar 

  24. 24.

    Hussey, R. J. et al. Thermal oxidation of III–V materials and heterostructures. J. Electrochem. Soc. 149, G581–G584 (2002).

    Article  Google Scholar 

  25. 25.

    Zhu, H. et al. Remote plasma oxidation and atomic layer etching of MoS2. ACS Appl. Mater. Interfaces 8, 19119–19126 (2016).

    Article  Google Scholar 

  26. 26.

    Chamlagain, B. et al. Thermally oxidized 2D TaS2 as a high-κ gate dielectric for MoS2 field-effect transistors. 2D Mater. 4, 031002 (2017).

    Article  Google Scholar 

  27. 27.

    Lai, S. et al. HfO2/HfSe2 hybrid heterostructure fabricated via controllable chemical conversion of two-dimensional HfS2. Nanoscale 10, 18758–18766 (2018).

    Article  Google Scholar 

  28. 28.

    Yamamoto, M. et al. Self-limiting layer-by-layer oxidation of atomically thin WSe2. Nano Lett. 15, 2067–2073 (2015).

    Article  Google Scholar 

  29. 29.

    Mleczko, M. J. et al. HfSe2 and ZrSe2: two-dimensional semiconductors with native high-k oxides. Sci. Adv. 3, e1700481 (2017).

    Article  Google Scholar 

  30. 30.

    Peimyoo, N. et al. Laser-writable high-κ dielectric for van der Waals nanoelectronics. Sci. Adv. 5, eaau0906 (2019).

    Article  Google Scholar 

  31. 31.

    Wu, J. X. et al. High electron mobility and quantum oscillations in non-encapsulated ultrathin semiconducting Bi2O2Se. Nat. Nanotechnol. 12, 530–535 (2017).

    Article  Google Scholar 

  32. 32.

    Chen, C. et al. Electronic structures and unusually robust bandgap in an ultrahigh-mobility layered oxide semiconductor, Bi2O2Se. Sci. Adv. 4, eaat8355 (2018).

    Article  Google Scholar 

  33. 33.

    Wu, D. et al. Thickness-dependent dielectric constant of few-layer In2Se3 nanoflakes. Nano Lett. 15, 8136–8140 (2015).

    Article  Google Scholar 

  34. 34.

    Lin, Z. et al. Solution-processable 2D semiconductors for high-performance large-area electronics. Nature 562, 254–258 (2018).

    Article  Google Scholar 

  35. 35.

    Chen, B. et al. Highly uniform carbon nanotube field-effect transistors and medium scale integrated circuits. Nano Lett. 16, 5120–5128 (2016).

    Article  Google Scholar 

  36. 36.

    Tan, C. W. et al. Wafer-scale growth of single-crystal 2D semiconductor on perovskite oxides for high-performance transistors. Nano Lett. 19, 2148–2153 (2019).

    Article  Google Scholar 

  37. 37.

    Kresse, G. & Hafner, J. Norm-conserving and ultrasoft pseudopotentials for first-row and transition-elements. J. Phys. Condens. Matter 6, 8245–8257 (1994).

    Article  Google Scholar 

  38. 38.

    Heyd, J., Scuseria, G. E. & Ernzerhof, M. Hybrid functionals based on a screened Coulomb potential. J. Chem. Phys. 118, 8207–8215 (2003).

    Article  Google Scholar 

  39. 39.

    Vydrov, O. A., Heyd, J., Krukau, A. V. & Scuseria, G. E. Importance of short-range versus long-range Hartree–Fock exchange for the performance of hybrid density functionals. J. Chem. Phys. 125, 074106 (2006).

    Article  Google Scholar 

  40. 40.

    Wu, X. et al. Quantitative measurements of nanoscale permittivity and conductivity using tuningfork-based microwave impedance microscopy. Rev. Sci. Instrum. 89, 043704 (2018).

    Article  Google Scholar 

  41. 41.

    Wu, J. X. et al. Chemical patterning of high-mobility semiconducting 2D Bi2O2Se crystals for integrated optoelectronic devices. Adv. Mater. 29, 1704060 (2017).

    Article  Google Scholar 

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Acknowledgements

We thank G.F. Dong for her help and discussions in measuring dielectric properties. We acknowledge financial support from the National Natural Science Foundation of China (21733001, 21525310, 51672007 and 11974023) and the National Basic Research Program of China (2016YFA0200101). P.G. also acknowledges support from the Key Area R&D Program of Guangdong Province (2018B010109009) and the Key R&D Program of Guangdong Province (2018B030327001). J.Y. and K.L. were supported by the US Department of Energy (DOE), Office of Science, Basic Energy Sciences (award no. DE-SC0019025).

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Contributions

H.P. conceived the original idea for the project. T.T. carried out the synthesis and structural characterizations of the bulk and 2D crystals. The devices were fabricated and measured by T.L., with help from L.X., Z.W., H.W. and R.J. H.F. and B.Y. carried out the theoretical calculations. The scanning transmission electron microscopy measurements were performed by Y.S. under the direction of P.G. MIM was performed by J.Y. under the supervision of K.L. The manuscript was written by H.P., T.L., T.T. and J.W. with input from the other authors. All work was supervised by H.P. All authors contributed to the scientific planning and discussions.

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Correspondence to Hailin Peng.

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Li, T., Tu, T., Sun, Y. et al. A native oxide high-κ gate dielectric for two-dimensional electronics. Nat Electron 3, 473–478 (2020). https://doi.org/10.1038/s41928-020-0444-6

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