Abstract
Complementary metal–oxide–semiconductor (CMOS) logic circuits at their ultimate scaling limits place extreme demands on the properties of all materials involved. The requirements for semiconductors are well explored and could possibly be satisfied by a number of layered two-dimensional (2D) materials, such as transition metal dichalcogenides or black phosphorus. The requirements for gate insulators are arguably even more challenging. At present, hexagonal boron nitride (hBN) is the most common 2D insulator and is widely considered to be the most promising gate insulator in 2D material-based transistors. Here we assess the material parameters and performance limits of hBN. We compare experimental and theoretical tunnel currents through ultrathin layers (equivalent oxide thickness of less than 1 nm) of hBN and other 2D gate insulators, including the ideal case of defect-free hBN. Though its properties make hBN a candidate for many applications in 2D nanoelectronics, excessive leakage currents lead us to conclude that hBN is unlikely to be suitable for use as a gate insulator in ultrascaled CMOS devices.
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Data availability
The data that support the findings of this study are available from the corresponding authors upon reasonable request.
Code availability
For the Tsu–Esaki/WKB calculations, we used the Comphy code, which is publicly available from https://comphy.eu/ (ref. 39). For the full-band transport simulations, the matrices were calculated with the CP2K package, which is publicly available from https://www.cp2k.org/ (ref. 44). These matrices were loaded into the quantum transport solver OMEN, as described at https://www.cp2k.org/howto:cp2k_omen (ref. 45). Both code packages can be downloaded from https://github.com/cp2k/cp2k.
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Acknowledgements
T.K., Y.Y.I. and T.G. acknowledge the financial support through FWF grant numbers I2606-N30, I4123-N30 and P29119-N35. Y.Y.I. and M.I.V. acknowledge financial support by the Ministry of Science and Higher Education of the Russian Federation under project number 075-15-2020-790. F.D. and M. Luisier thank CSCS for giving them access to the Piz Daint supercomputer under project number s876. C.S. and M.W. gratefully acknowledge financial support by the Austrian Federal Ministry for Digital and Economic Affairs and the National Foundation for Research, Technology and Development and the Christian Doppler Research Association. The computational results presented have been achieved in part using the Vienna Scientific Cluster (VSC). S.W. and T.M. acknowledge financial support through the Graphene Flagship number 785219 and number 881603. K.W. and T.T. acknowledge support from the Elemental Strategy Initiative conducted by the MEXT, Japan, number JPMXP0112101001, JSPS KAKENHI grant number JP20H00354 and the CREST(JPMJCR15F3), JST. M. Lanza acknowledges support from the Ministry of Science and Technology of China (grant numbers 2018YFE0100800, 2019YFE0124200) and the National Natural Science Foundation of China (grant number 61874075).
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T.K. and T.G. conceived the ideas and led the study; T.K., Y.Y.I. and T.G. prepared the manuscript draft; F.D. and M. Luisier prepared and performed the DFT+NEGF calculations in frequent discussions with T.K. and T.G.; C.S. implemented the Tsu–Esaki model within the Comphy framework under the guidance of M.W.; T.K. and M.I.V. performed the Tsu–Esaki calculations in frequent discussions with Y.Y.I. and T.G.; S.W. fabricated devices under the supervision of T.M. using crystals provided by K.W. and T.T.; M. Lanza fabricated devices and provided advice for data analysis; T.K. performed the electrical characterization of the devices; and all authors reviewed and revised the manuscript.
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Peer review information Nature Electronics thanks Tania Roy, Hailin Peng and Ruge Quhe for their contribution to the peer review of this work.
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Details about device fabrication, electrical characterization, and the simulation methodology for using the Tsu–Esaki model and the DFT+NEGF model, and discussion of the impact of the metal work function on the simulation results. Supplementary Figs. 1 and 2.
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Knobloch, T., Illarionov, Y.Y., Ducry, F. et al. The performance limits of hexagonal boron nitride as an insulator for scaled CMOS devices based on two-dimensional materials. Nat Electron 4, 98–108 (2021). https://doi.org/10.1038/s41928-020-00529-x
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DOI: https://doi.org/10.1038/s41928-020-00529-x
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