Strain-insensitive intrinsically stretchable transistors and circuits

Abstract

Intrinsically stretchable electronics can form intimate interfaces with the human body, creating devices that could be used to monitor physiological signals without constraining movement. However, mechanical strain invariably leads to the degradation of the electronic properties of the devices. Here we show that strain-insensitive intrinsically stretchable transistor arrays can be created using an all-elastomer strain engineering approach, in which the patterned elastomer layers with tunable stiffnesses are incorporated into the transistor structure. By varying the cross-linking density of the elastomers, areas of increased local stiffness are introduced, reducing strain on the active regions of the devices. This approach can be readily incorporated into existing fabrication processes, and we use it to create arrays with a device density of 340 transistors cm–2 and a strain insensitivity of less than 5% performance variation when stretched to 100% strain. We also show that it can be used to fabricate strain-insensitive circuit elements, including NOR gates, ring oscillators and high-gain amplifiers for the stable monitoring of electrophysiological signals.

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Fig. 1: Strain-insensitive intrinsically stretchable transistor arrays with patterned strain distribution.
Fig. 2: Performance uniformity of intrinsically stretchable transistor arrays with patterned strain distribution.
Fig. 3: Electrical performance of the transistor array under global strain of up to 100%.
Fig. 4: Tunable mechanical stability and device density.
Fig. 5: Strain-insensitive digital and analogue circuits for human electrophysiological signal conditioning.

Data availability

The data that support the plots within this paper and the other findings of this study are available from the corresponding authors upon reasonable request.

Code availability

The code that supports the results within this paper and the other findings of this study are available from the corresponding authors upon reasonable request.

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Acknowledgements

This work is supported by SAIT, Samsung Electronics. R.R., P.K.A. and C.L. acknowledge support from the National Science Foundation through CAREER Award CMMI-1553638. S.-K.K. thanks NRF 2018R1A2A1A05078734. N.M. is supported by the Japan Society for the Promotion of Science (JSPS) Overseas Research Fellowship.

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Contributions

S.W., W.W. and Z.B. designed the project and experiments. W.W. and S.W. fabricated the intrinsically stretchable transistor array and circuits and carried out the electrical characterizations. S.N. helped with the circuits design and measurements. R.R., P.K.A. and C.L. carried out the mechanical simulations. Y.O. and Y.Z. synthesized the azide compound. W.W. and X.Y carried out the materials characterizations. S.-K.K. provided the conjugated polymer. A.M.F. and R.N helped to take device photographs. N.M., J.X., Y.J. and Z.Z. helped with the experiments design and manuscript preparation. W.W., S.W., Z.B. and J.B.-H.T. wrote the manuscript. All the authors reviewed and commented on the manuscript.

Corresponding authors

Correspondence to Sihong Wang or Zhenan Bao.

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Peer review information Nature Electronics thanks Kyung-In Jang, Rujun Ma and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

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Supplementary Table 1 and Figs. 1–23.

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Wang, W., Wang, S., Rastak, R. et al. Strain-insensitive intrinsically stretchable transistors and circuits. Nat Electron 4, 143–150 (2021). https://doi.org/10.1038/s41928-020-00525-1

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