Skip to main content

Thank you for visiting nature.com. You are using a browser version with limited support for CSS. To obtain the best experience, we recommend you use a more up to date browser (or turn off compatibility mode in Internet Explorer). In the meantime, to ensure continued support, we are displaying the site without styles and JavaScript.

Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices

Abstract

Two-dimensional semiconductors could be used as a channel material in low-power transistors, but the deposition of high-quality, ultrathin high-κ dielectrics on such materials has proved challenging. In particular, atomic layer deposition typically leads to non-uniform nucleation and island formation, creating a porous dielectric layer that suffers from current leakage, particularly when the equivalent oxide thickness is small. Here, we report the atomic layer deposition of high-κ gate dielectrics on two-dimensional semiconductors using a monolayer molecular crystal as a seeding layer. The approach can be used to grow dielectrics with an equivalent oxide thickness of 1 nm on graphene, molybdenum disulfide (MoS2) and tungsten diselenide (WSe2). Compared with dielectrics created using established methods, our dielectrics exhibit a reduced roughness, density of interface states and leakage current, as well as an improved breakdown field. With the technique, we fabricate graphene radio-frequency transistors that operate at 60 GHz, and MoS2 and WSe2 complementary metal–oxide–semiconductor transistors with a supply voltage of 0.8 V and subthreshold swing down to 60 mV dec−1. We also create MoS2 transistors with a channel length of 20 nm, which exhibit an on/off ratio of over 107.

Access options

Rent or Buy article

Get time limited or full article access on ReadCube.

from$8.99

All prices are NET prices.

Fig. 1: Deposition of ultrathin high-κ oxide on 2D materials.
Fig. 2: STEM characterization of gate stacks.
Fig. 3: Dielectric properties on graphene FETs.
Fig. 4: Low-power TMD CMOS.
Fig. 5: Short-channel MoS2 FETs.
Fig. 6: Benchmark of breakdown and leakage characteristics with other technologies.

Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author on reasonable request.

References

  1. 1.

    Theis, T. N. & Wong, H. S. P. The end of Moore’s law: a new beginning for information technology. Comput. Sci. Eng. 19, 41–50 (2017).

    Article  Google Scholar 

  2. 2.

    Natarajan, S. et al. A 14nm logic technology featuring 2nd-generation FinFET interconnects, self-aligned double patterning and a 0.0588 µm2 SRAM cell size. In Proc. 2014 IEEE International Electron Devices Meeting 3.7.1–3.7.3 (IEEE, 2014).

  3. 3.

    Robertson, J. High dielectric constant oxides. Eur. Phys. J. Appl. Phys. 28, 265–291 (2004).

    Article  Google Scholar 

  4. 4.

    Chhowalla, M., Jena, D. & Zhang, H. Two-dimensional semiconductors for transistors. Nat. Rev. Mater. 11, 16052 (2016).

    Article  Google Scholar 

  5. 5.

    Fiori, G. et al. Electronics based on two-dimensional materials. Nat. Nanotechnol. 9, 768–779 (2014).

    Article  Google Scholar 

  6. 6.

    Desai, S. B. et al. MoS2 transistors with 1-nanometer gate lengths. Science 354, 99–102 (2016).

    Article  Google Scholar 

  7. 7.

    Radisavljevic, B., Radenovic, A., Brivio, J., Giacometti, V. & Kis, A. Single-layer MoS2 transistors. Nat. Nanotechnol. 6, 147–150 (2011).

    Article  Google Scholar 

  8. 8.

    Kim, H. G. & Lee, H. B. R. Atomic layer deposition on 2D materials. Chem. Mater. 29, 3809–3826 (2017).

    Article  Google Scholar 

  9. 9.

    Zhu, Y. et al. Monolayer molybdenum disulfide transistors with single-atom-thick gates. Nano Lett. 18, 3807–3813 (2018).

    Article  Google Scholar 

  10. 10.

    Wang, X., Tabakman, S. M. & Dai, H. Atomic layer deposition of metal oxides on pristine and functionalized graphene. J. Am. Chem. Soc. 130, 8152–8153 (2008).

    Article  Google Scholar 

  11. 11.

    Park, J. H. et al. Atomic layer deposition of Al2O3 on WSe2 functionalized by titanyl phthalocyanine. ACS Nano 10, 6888–6896 (2016).

    Article  Google Scholar 

  12. 12.

    Alaboson, J. M. et al. Seeding atomic layer deposition of high-κ dielectrics on epitaxial graphene with organic self-assembled monolayers. ACS Nano 5, 5223–5232 (2011).

    Article  Google Scholar 

  13. 13.

    Johns, J. E., Karmel, H. J., Alaboson, J. M. & Hersam, M. C. Probing the structure and chemistry of perylenetetracarboxylic dianhydride on graphene before and after atomic layer deposition of alumina. J. Phys. Chem. Lett. 3, 1974–1979 (2012).

    Article  Google Scholar 

  14. 14.

    Britnell, L. et al. Electron tunneling through ultrathin boron nitride crystalline barriers. Nano Lett. 12, 1707–1710 (2012).

    Article  Google Scholar 

  15. 15.

    Wang, J. et al. Integration of high-k oxide on MoS2 by using ozone pretreatment for high-performance MoS2 top-gated transistor with thickness-dependent carrier scattering investigation. Small 11, 5932–5938 (2015).

    Article  Google Scholar 

  16. 16.

    Wang, X. et al. Improved integration of ultra-thin high-k dielectrics in few-layer MoS2 FET by remote forming gas plasma pretreatment. Appl. Phys. Lett. 110, 53110 (2017).

    Article  Google Scholar 

  17. 17.

    Xiao, M., Qiu, C., Zhang, Z. & Peng, L. Atomic-layer-deposition growth of an ultrathin HfO2 film on graphene. ACS Appl. Mater. Interfaces 9, 34050–34056 (2017).

    Article  Google Scholar 

  18. 18.

    Liu, Y. et al. Approaching the Schottky–Mott limit in van der Waals metal–semiconductor junctions. Nature 557, 696–700 (2018).

    Article  Google Scholar 

  19. 19.

    Sangwan, V. K. et al. Quantitatively enhanced reliability and uniformity of high-κ dielectrics on graphene enabled by self-assembled seeding layers. Nano Lett. 13, 1162–1167 (2013).

    Article  Google Scholar 

  20. 20.

    Dean, C. R. et al. Boron nitride substrates for high-quality graphene electronics. Nat. Nanotechnol. 5, 722–726 (2010).

    Article  Google Scholar 

  21. 21.

    Yang, L. et al. 10 nm nominal channel length MoS2 FETs with EOT 2.5 nm and 0.52 mA/µm drain current. In Proc. 73rd Annual Device Research Conference 237–238 (IEEE, 2015).

  22. 22.

    Liao, L. et al. Top-gated graphene nanoribbon transistors with ultrathin high-κ dielectrics. Nano Lett. 10, 1917–1921 (2010).

    Article  Google Scholar 

  23. 23.

    Liao, L. et al. Sub-100 nm channel length graphene transistors. Nano Lett. 10, 3952–3956 (2010).

    Article  Google Scholar 

  24. 24.

    Cheng, R. et al. Few-layer molybdenum disulfide transistors and circuits for high-speed flexible electronics. Nat. Commun. 5, 5143 (2014).

    Article  Google Scholar 

  25. 25.

    Wu, B. et al. Precise, self-limited epitaxy of ultrathin organic semiconductors and heterojunctions tailored by van der Waals interactions. Nano Lett. 16, 3754–3759 (2016).

    Article  Google Scholar 

  26. 26.

    Wang, Q. H. & Hersam, M. C. Room-temperature molecular-resolution characterization of self-assembled organic monolayers on epitaxial graphene. Nat. Chem. 1, 206–211 (2009).

    Article  Google Scholar 

  27. 27.

    Zhao, Y., Wu, Q., Chen, Q. & Wang, J. Molecular self-assembly on two-dimensional atomic crystals: insights from molecular dynamics simulations. J. Phys. Chem. Lett. 6, 4518–4524 (2015).

    Article  Google Scholar 

  28. 28.

    Martin, J. M., Vacher, B., Ponsonnet, L. & Dupuis, V. Chemical bond mapping of carbon by image-spectrum EELS in the second derivative mode. Ultramicroscopy 65, 229–238 (1996).

    Article  Google Scholar 

  29. 29.

    Wang, X., Xu, J. B., Wang, C., Du, J. & Xie, W. High-performance graphene devices on SiO2/Si substrate modified by highly ordered self-assembled monolayers. Adv. Mater. 23, 2464–2468 (2011).

    Article  Google Scholar 

  30. 30.

    Zou, X. et al. Interface engineering for high-performance top-gated MoS2 field-effect transistors. Adv. Mater. 26, 6255–6261 (2014).

    Article  Google Scholar 

  31. 31.

    Wang, B. et al. High-κ gate dielectrics for emerging flexible and stretchable electronics. Chem. Rev. 118, 5690–5754 (2018).

    Article  Google Scholar 

  32. 32.

    Cheng, R. et al. High-frequency self-aligned graphene transistors with transferred gate stacks. Proc. Natl Acad. Sci. USA 109, 11588–11592 (2012).

    Article  Google Scholar 

  33. 33.

    Wu, Y. et al. High-frequency, scaled graphene transistors on diamond-like carbon. Nature 472, 74–78 (2011).

    Article  Google Scholar 

  34. 34.

    Yu, Z. et al. Realization of room-temperature phonon-limited carrier transport in monolayer MoS2 by dielectric and carrier screening. Adv. Mater. 28, 547–552 (2016).

    Article  Google Scholar 

  35. 35.

    International Technology Roadmap for Semiconductors www.itrs.net/2013-itrs.html (Semiconductor Industry Association, 2013).

  36. 36.

    Pu, J. et al. Highly flexible and high-performance complementary inverters of large-area transition metal dichalcogenide monolayers. Adv. Mater. 28, 4111–4119 (2016).

    Article  Google Scholar 

  37. 37.

    Fang, N. & Nagashio, K. Band tail interface states and quantum capacitance in a monolayer molybdenum disulfide field-effect-transistor. J. Phys. D 51, 65110 (2018).

    Article  Google Scholar 

  38. 38.

    Liu, H. & Ye, P. D. MoS2 dual-gate MOSFET with atomic-layer-deposited Al2O3 as top-gate dielectric. IEEE Electron Device Lett. 33, 546–548 (2012).

    Article  Google Scholar 

  39. 39.

    Salvatore, G. A. et al. Fabrication and transfer of flexible few-layers MoS2 thin film transistors to any arbitrary substrate. ACS Nano 7, 8809–8815 (2013).

    Article  Google Scholar 

  40. 40.

    Ninomiya, N. et al. Fabrication of high-k/metal-gate MoS2 field-effect transistor by device isolation process utilizing Ar-plasma etching. J. Appl. Phys. Jpn 54, 046502 (2015).

    Article  Google Scholar 

  41. 41.

    Choi, K. et al. Trap density probing on top-gate MoS2 nanosheet field-effect transistors by photo-excited charge collection spectroscopy. Nanoscale 7, 5617 (2015).

    Article  Google Scholar 

  42. 42.

    Auth, C. et al. A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors. In Proc. 2012 Symposium on VLSI Technology (VLSIT) 131–132 (IEEE, 2012).

  43. 43.

    Wang, L. et al. One-dimensional electrical contact to a two-dimensional material. Science 342, 614–617 (2013).

    Article  Google Scholar 

  44. 44.

    Takahashi, N. & Nagashio, K. Buffer layer engineering on graphene via various oxidation methods for atomic layer deposition. Appl. Phys. Express 9, 125101 (2016).

    Article  Google Scholar 

  45. 45.

    Xia, J., Chen, F., Li, J. & Tao, N. Measurement of the quantum capacitance of graphene. Nat. Nanotechnol. 4, 505–509 (2009).

    Article  Google Scholar 

  46. 46.

    McPherson, J., Kim, J., Shanware, A. & Mogul, H. Thermochemical description of dielectric breakdown in high dielectric constant materials. Appl. Phys. Lett. 82, 2121–2123 (2003).

    Article  Google Scholar 

  47. 47.

    Jeong, S. J. et al. Thickness scaling of atomic-layer-deposited HfO2 films and their application to wafer-scale graphene tunnelling transistors. Sci. Rep. 6, 20907 (2016).

    Article  Google Scholar 

  48. 48.

    Muller, J. et al. Ferroelectricity in simple binary ZrO2 and HfO2. Nano Lett. 12, 4318–4223 (2012).

    Article  Google Scholar 

  49. 49.

    Gusev, E. P. et al. Ultrathin high-κ gate stacks for advanced CMOS devices. In International Electron Devices Meeting. Technical Digest 20.1.1–20.1.4 (IEEE, 2001).

  50. 50.

    Zhong, D. et al. Gigahertz integrated circuits based on carbon nanotube films. Nat. Electron. 1, 40–45 (2018).

    Article  Google Scholar 

Download references

Acknowledgements

This work is supported by National Natural Science Foundation of China grants 61734003, 61521001, 61851401, 51861145202, 61861166001, 11874199 and 21872100; National Key Basic Research Programme of China grants 2015CB921600 and 2015CB654901; Natural Science Foundation of Jiangsu Province grants BK20170005; Singapore MOE grant R143-000-A43-114; Programme A for Outstanding Ph.D. candidate of Nanjing University 201801A013; Postgraduate Research & Practice Innovation Programme of Jiangsu Province KYCX18_0045; Strategic Priority Research Programme of Chinese Academy of Sciences XDB 30000000; a Grant-in-Aid for JSPS Research Fellows from the JSPS KAKENHI; the JSPS A3 Foresight Programme and JSPS KAKENHI grants JP19H00755 and 19K21956, Japan; Key Laboratory of Advanced Photonic and Electronic Materials, Collaborative Innovation Centre of Solid-State Lighting and Energy-Saving Electronics, and the Fundamental Research Funds for the Central Universities, China.

Author information

Affiliations

Authors

Contributions

X. Wang conceived and supervised the project. W.L., J. Zhou, Z.Y., N.D., X. Wu., H.Z., D.H., Y.S. and X.D. contributed to sample preparation, characterization, device fabrication, measurements and data analysis. S.C. and P.W. performed TEM and data analysis. J. Zhang and W.C. performed STM and data analysis. N.F. and K.N. performed Dit analysis. T.L. and Z.W. performed CVD sample growth and transfer. Y.W. and T.C. contributed to RF transistor fabrication, measurements and data analysis. X.X. and H.M. performed molecular dynamics simulations. K.Y. and L.P. performed water contact-angle measurement. W.L., Z.Y., P.W. and X. Wang wrote the manuscript with input from other authors. All authors contributed to discussions.

Corresponding authors

Correspondence to Peng Wang or Xinran Wang.

Ethics declarations

Competing interests

The authors declare no competing interests.

Additional information

Publisher’s note Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Supplementary information

Supplementary Information

Supplementary Figs. 1–19 and Tables 1 and 2.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Li, W., Zhou, J., Cai, S. et al. Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices. Nat Electron 2, 563–571 (2019). https://doi.org/10.1038/s41928-019-0334-y

Download citation

Further reading

Search

Quick links

Nature Briefing

Sign up for the Nature Briefing newsletter — what matters in science, free to your inbox daily.

Get the most important science stories of the day, free in your inbox. Sign up for Nature Briefing