Non-volatile computing-in-memory (nvCIM) could improve the energy efficiency of edge devices for artificial intelligence applications. The basic functionality of nvCIM has recently been demonstrated using small-capacity memristor crossbar arrays combined with peripheral readout circuits made from discrete components. However, the advantages of the approach in terms of energy efficiency and operating speeds, as well as its robustness against device variability and sneak currents, have yet to be demonstrated experimentally. Here, we report a fully integrated memristive nvCIM structure that offers high energy efficiency and low latency for Boolean logic and multiply-and-accumulation (MAC) operations. We fabricate a 1 Mb resistive random-access memory (ReRAM) nvCIM macro that integrates a one-transistor–one-resistor ReRAM array with control and readout circuits on the same chip using an established 65 nm foundry complementary metal–oxide–semiconductor (CMOS) process. The approach offers an access time of 4.9 ns for three-input Boolean logic operations, a MAC computing time of 14.8 ns and an energy efficiency of 16.95 tera operations per second per watt. Applied to a deep neural network using a split binary-input ternary-weighted model, the system can achieve an inference accuracy of 98.8% on the MNIST dataset.
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The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.
The code that supports the experimental platforms and proposed nvCIM test chip and SBITW network is available from the corresponding author upon reasonable request.
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The authors acknowledge support from NVM-DTP of TSMC, TSMC-JDP and MOST-Taiwan.
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Chen, WH., Dou, C., Li, KX. et al. CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors. Nat Electron 2, 420–428 (2019). https://doi.org/10.1038/s41928-019-0288-0
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