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Three-dimensional integration of plasmonics and nanoelectronics

Abstract

Optoelectronic integrated circuits can leverage the large bandwidth and low interconnect delay of optical communications. Developing a three-dimensional optoelectronic integrated circuit architecture could then provide increased integration density, improved operation speeds and decreased power consumption. However, the integration of photonics and electronics in 3D geometries is difficult due to conflicts in materials and fabrication methods. Plasmonics can help address the incompatibility of photonic and electronic circuits, but methods for the 3D integration of plasmonics and electronics on a single chip are limited. Here, we report a strategy for the three-dimensional integration of plasmonics and electronics using waveguide-fed slot antennas and carbon nanotube networks. Our low-temperature approach, which is compatible with complementary metal–oxide–semiconductor (CMOS) technology, is based on a metal engineering technique in which different metals with typical structures are used as different functional modules. Using this approach, we demonstrate a series of 3D integrated circuits including photovoltaic-type plasmonic unidirectional receivers, wavelength–polarization multiplexers, and receivers integrated with CMOS signal-processing circuits.

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Fig. 1: Three-dimensional integration of plasmonics and electronics.
Fig. 2: Photovoltaic-type plasmonic unidirectional receiver.
Fig. 3: Polarization response of the unidirectional receiver.
Fig. 4: Wavelength–polarization multiplexer.
Fig. 5: Integration of the plasmonic-enhanced detector with CNT CMOS signal-processing circuits.

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Data availability

The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.

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Acknowledgements

This work was financially supported by the National Key Research & Development Program of China (Grant No. 2016YF0201902) and the National Natural Science Foundation of China (Grant No. 61621061, 11574011 and 91850104).

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Authors and Affiliations

Authors

Contributions

Y.L. led and was involved in all aspects of the project, and performed all of the design, layout, fabrication, testing, simulation and data analysis. J.Z. and L.-M.P. advised on all parts of the project. L.M.P. was in charge of the project. All authors discussed the results and contributed to preparation of the manuscript.

Corresponding authors

Correspondence to Yang Liu, Jiasen Zhang or Lian-Mao Peng.

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The authors declare no competing interests.

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Supplementary Information

Supplementary Notes 1–16 and Supplementary Figures 1–14

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Liu, Y., Zhang, J. & Peng, LM. Three-dimensional integration of plasmonics and nanoelectronics. Nat Electron 1, 644–651 (2018). https://doi.org/10.1038/s41928-018-0176-z

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