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Hardware-intrinsic security primitives enabled by analogue state and nonlinear conductance variations in integrated memristors

Nature Electronicsvolume 1pages197202 (2018) | Download Citation


Hardware-intrinsic security primitives employ instance-specific and process-induced variations in electronic hardware as a source of cryptographic data. Among various emerging technologies, memristors offer unique opportunities in such security applications due to their underlying stochastic operation. Here we show that the analogue tuning and nonlinear conductance variations of memristors can be used to build a basic building block for implementing physically unclonable functions that are resilient, dense, fast and energy-efficient. Using two vertically integrated 10 × 10 metal-oxide memristive crossbar circuits, we experimentally demonstrate a security primitive that offers a near ideal 50% average uniformity and diffuseness, as well as a minimum bit error rate of around 1.5 ± 1%. Readjustment of the conductances of the devices allows nearly unique security instances to be implemented with the same crossbar circuit.

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  1. 1.

    Damiani, E., di Vimercati, S. D. C. & Samarati, P. New paradigms for access control in open environments. Proc. Fifth IEEE Int. Symp. Signal Process. Inf. Tech. (2005).

  2. 2.

    Konstantinou, C. et al. Cyber-physical systems: A security perspective. 2015 20th IEEE European Test Symp. (ETS) (2015).

  3. 3.

    Suh, G. E. & Devadas, S. Physical unclonable functions for device authentication and secret key generation. 2007 44th ACM/IEEE Des. Autom. Conf. 9–14 (2007).

  4. 4.

    Sadeghi, A.R. & Naccache, D. Towards Hardware-Intrinsic Security: Foundations and Practice (Springer: New York, NY, 2010).

  5. 5.

    Kömmerling, O. & Kuhn, M. G. Design principles for tamper-resistant smartcard processors. Smartcard 99, 9–20 (1999).

  6. 6.

    Pappu, R., Recht, B., Taylor, J. & Gershenfeld, N. Physical one-way functions. Science 297, 2026–2030 (2002).

  7. 7.

    Tehranipoor, M. & Wang, C. Introduction to Hardware Security and Trust (Springer Science & Business Media: Berlin, 2011).

  8. 8.

    Rajendran, J. et al. Nano meets security: exploring nanoelectronic devices for security applications. Proc. IEEE 103, 829–849 (2015).

  9. 9.

    Hu, Z. et al. Physically unclonable cryptographic primitives using self-assembled carbon nanotubes. Nat. Nanotech. 11, 559–565 (2016).

  10. 10.

    Delvaux, J. & Verbauwhede, I. Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise. 2013 IEEE Int. Symp. Hardware-Oriented Security Trust (HOST) (2013).

  11. 11.

    Herder, C., Yu, M.-D., Koushanfar, F. & Devadas, S. Physical unclonable functions and applications: a tutorial. Proc. IEEE 102, 1126–1141 (2014).

  12. 12.

    Ruhrmair, U. & Holcomb, D. E. PUFs at a glance. 2014 Des. Autom. Test Europe Conf. Exhibit. (DATE) (2014).

  13. 13.

    Yu, M.-D. M., Sowell, R., Singh, A., M’Raïhi, D. & Devadas, S. Performance metrics and empirical results of a PUF cryptographic key generation ASIC. 2012 IEEE Int. Symp. Hardware-Oriented Security Trust (HOST) (2012).

  14. 14.

    Roel, M. Physically Unclonable Functions: Constructions, Properties and Applications. PhD thesis, Univ. KU Leuven (2012).

  15. 15.

    Herder III, C. H. Towards Security Without Secrets. PhD thesis, Massachusetts Institute of Technology (2016).

  16. 16.

    Kang, H., Hori, Y., Katashita, T., Hagiwara, M. & Iwamura, K. Cryptographic key generation from PUF data using efficient fuzzy extractors. 16th Int. Conf. Adv. Commun.Tech. (2014).

  17. 17.

    Lim, D. et al. Extracting secret keys from integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. 13, 1200–1205 (2005).

  18. 18.

    Maes, R., Van Herrewege, A. & Verbauwhede, I. PUFKY: a fully functional PUF-based cryptographic key generator. Int. Workshop Cryptographic Hardware Embedded Syst. (2012).

  19. 19.

    Rührmair, U. & van Dijk, M. PUFs in security protocols: attack models and security evaluations. 2013 IEEE Symp. Security Privacy (2013).

  20. 20.

    van Dijk, M. & Rührmair, U. Physical unclonable functions in cryptographic protocols: security proofs and impossibility results. IACR Cryptol. EPrint Arch. 2012, 228 (2012).

  21. 21.

    Zhang, L., Kong, Z. H. & Chang, C.-H. PCKGen: a phase change memory based cryptographic key generator. 2013 IEEE Int. Symp. Circuits Syst. (ISCAS2013) (2013).

  22. 22.

    Ranasinghe, D. C. & Cole, P. H. Confronting security and privacy threats in modern RFID systems. 2006 Fortieth Asilomar Conf. Signals Syst. Comput. (2006).

  23. 23.

    Devadas, S. et al. Design and implementation of PUF-based 'unclonable' RFID ICs for anti-counterfeiting and security applications. 2008 IEEE Int. Conf. RFID (2008).

  24. 24.

    Cole, P. H. & Ranasinghe, D. C. Networked RFID Systems and Lightweight Cryptography. Vol. 10 (Springer: Berlin, 2008).

  25. 25.

    Waser, R., Dittmann, R., Staikov, G. & Szot, K. Redox-based resistive switching memories—nanoionic mechanisms, prospects, and challenges. Adv. Mater. 21, 2632–2663 (2009).

  26. 26.

    Yang, J. J., Strukov, D. B. & Stewart, D. R. Memristive devices for computing. Nat. Nanotech. 8, 13–24 (2013).

  27. 27.

    Zhang, L., Fong, X., Chang, C.-H., Kong, Z. H. & Roy, K. Feasibility study of emerging non-volatile memory based physical unclonable functions. 2014 IEEE 6th Int. Memory Workshop (IMW) (2014).

  28. 28.

    Liu, R., Wu, H., Pang, Y., Qian, H. & Yu, S. A highly reliable and tamper-resistant RRAM PUF: design and experimental validation. 2016 IEEE Int. Symp. Hardware-Oriented Security Trust (HOST) (2016).

  29. 29.

    Chen, A. Comprehensive assessment of RRAM-based PUF for hardware security applications. 2015 IEEE Int. Electron Dev. Meet. (IEDM) (2015).

  30. 30.

    Gao, Y., Ranasinghe, D. C., Al-Sarawi, S. F., Kavehei, O. & Abbott, D. Memristive crypto primitive for building highly secure physical unclonable functions. Sci. Rep. 5, 12785 (2015).

  31. 31.

    Rajendran, J., Rose, G. S., Karri, R. & Potkonjak, M. Nano-PPUF: a memristor-based security primitive. 2012 IEEE Comput. Soc. Annual Symp. VLSI (2012).

  32. 32.

    Chang, S. H. et al. Oxide double‐layer nanocrossbar for ultrahigh‐density bipolar resistive memory. Adv. Mater. 23, 4063–4067 (2011).

  33. 33.

    Gao, L., Chen, P.-Y., Liu, R. & Yu, S. Physical unclonable function exploiting sneak paths in resistive cross-point array. IEEE Trans. Electron. Dev. 63, 3109–3115 (2016).

  34. 34.

    Moors, M. et al. Resistive switching mechanisms on TaOx and SrRuO3 thin-film surfaces probed by scanning tunneling microscopy. ACS Nano 10, 1481–1492 (2016).

  35. 35.

    Rührmair, U. et al. Applications of high-capacity crossbar memories in cryptography. IEEE Trans. Nanotech. 10, 489–498 (2011).

  36. 36.

    Kim, J. et al. A physical unclonable function with redox-based nanoionic resistive memory. IEEE Trans. Inf. Forensics Security 13, 437–448 (2018).

  37. 37.

    Che, W., Plusquellic, J. & Bhunia, S. A non-volatile memory based physically unclonable function without helper data. 2014 IEEE/ACM Int. Conf. Comp. Aided Des. (2014).

  38. 38.

    Rose, G. S. & Meade, C. A. Performance analysis of a memristive crossbar PUF design. 2015 52nd ACM/EDAC/IEEE Des. Autom. Conf. (DAC) (2015).

  39. 39.

    Adam, G. C. et al. 3-D memristor crossbars for analog and neuromorphic computing applications. IEEE Trans. Electron. Dev. 64, 312–318 (2017).

  40. 40.

    Alibart, F., Gao, L., Hoskins, B. D. & Strukov, D. B. High precision tuning of state for memristive devices by adaptable variation-tolerant algorithm. Nanotechnology 23, 075201 (2012).

  41. 41.

    Uddin, M., Majumder, M. B. & Rose, G. S. Robustness analysis of a memristive crossbar PUF against modeling attacks. IEEE Trans. Nanotech. 16, 396–405 (2017).

  42. 42.

    Xu, X. & Burleson, W. Hybrid side-channel/machine-learning attacks on PUFs: a new threat? 2014 Des. Autom. Test Europe Conf. Exhibit. (DATE) (2014).

  43. 43.

    Merrikh Bayat, F. et al. Memristor-based perceptron classifier: Increasing complexity and coping with imperfect hardware. 2017 IEEE/ACM Int. Conf. Comp. Aided Des. (2017).

  44. 44.

    Kim, K.-H. et al. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. Nano Lett. 12, 389–395 (2011).

  45. 45.

    Holcomb, D. E. & Fu, K. Bitline PUF: building native challenge–response PUF capability into any SRAM. Int. Workshop Cryptographic Hardware Embedded Syst. (2014).

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This work was supported by AFOSR under MURI grant FA9550-12-1-0038, ARC DP140103448 and NSF grant CCF-1528502. The authors thank A. Chen and J. Rajendran for useful discussions.

Author information


  1. University of California Santa Barbara, Santa Barbara, CA, USA

    • Hussein Nili
    • , Gina C. Adam
    • , Brian Hoskins
    • , Mirko Prezioso
    • , M. Reza Mahmoodi
    • , Farnood Merrikh Bayat
    •  & Dmitri B. Strukov
  2. National Institute for R&D in Microtechnologies, Bucharest, Romania

    • Gina C. Adam
  3. Royal Melbourne Institute of Technology University, Melbourne, Victoria, Australia

    • Jeeson Kim
    •  & Omid Kavehei


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H.N., O.K. and D.B.S. conceived the original concept and initiated the work. G.C.A and B.H. fabricated devices. H.N., M.P. and F.M.B. developed the characterization set-up and performed measurements. H.N., J.K. and M.R.M. performed simulations and estimated performance. H.N. and D.B.S. wrote the manuscript. All authors discussed the results.

Competing interests

The authors declare no competing interests.

Corresponding authors

Correspondence to Hussein Nili or Omid Kavehei or Dmitri B. Strukov.

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    Supplementary Sections 1–10, Supplementary Figures 1–9 and Supplementary Tables 1–3

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