Biodegradable albumen dielectrics for high-mobility MoS2 phototransistors

This work demonstrates the fabrication and characterization of single-layer MoS2 field-effect transistors using biodegradable albumen (chicken eggwhite) as gate dielectric. By introducing albumen as an insulator for MoS2 transistors high carrier mobilities (up to ~90 cm2 V−1 s−1) are observed, which is remarkably superior to that obtained with commonly used SiO2 dielectric which we attribute to ionic gating due to the formation of an electric double layer in the albumen MoS2 interface. In addition, the investigated devices are characterized upon illumination, observing responsivities of 4.5 AW−1 (operated in photogating regime) and rise times as low as 52 ms (operated in photoconductivity regime). The presented study reveals the combination of albumen with van der Waals materials for prospective biodegradable and biocompatible optoelectronic device applications. Furthermore, the demonstrated universal fabrication process can be easily adopted to fabricate albumen-based devices with any other van der Waals material.

Supplementary Figure 1: Albumen film thickness determination methods.Different spin-coating speeds are compared by reflectance spectrometer measurements and AFM measurements, proving the reliability of fast spectrometer thickness determination.The reflectance data is fitted using Fresnel's equations.The fits for two spin-coating speeds (3000 and 6000 rpm) are shown on the right, giving a good agreement between experimentally measured reflectance and the expected Fresnel curves.
To confirm the monolayer thickness of the used flakes we measure the different thicknesses of a multilayer flake for comparison in Supplementary Figure 2. The used monolayer of albumen transistor #18 is depicted in Supplementary Figure 2a and its corresponding differential reflectance measurement in Supplementary Figure 2b.A multilayer flake for comparing measurements is shown in Supplementary Figure 2c.Three different layers of this flake were measured, monolayer (1L), bilayer (2L) and three-layer configuration (3L).
Comparing the reflectance measurement of our used flake and the measurements obtained from the multilayer flake, it is clear that we can easily identify our flakes as monolayers prior to transfer.Note that the bilayer measurement illustrates the existence of the interlayer exciton, confirming further our point.
For demonstration purposes an easy marker-process was tested, using a commercial marker pen to apply an evaporation mask on a processed substrate with an albumen layer on top.The mask was created by simply drawing a line with the marker pen.In the following step a layer of 50 nm gold was evaporated onto the substrate.For the lift-off the substrate was left in acetone for 10 min, rinsed with 2-propanol and blow-dried with a nitrogen gun.Electrical leakage characterization was carried out to confirm the stability of albumen after immersion in Acetone.A sample of albumen with top gold contacts was immersed in Acetone and rinsed in Isopropanol for different times with leakage current measurements after each immersion.
The albumen layer does not get damaged by the lift-off process (Supplementary Figure 5c).Structuring desired patterns using a commercial marker pen with a tip width of 0.75 mm.After the pattern is applied a 50 nm layer of gold is evaporated using an electron beam evaporation system.(c) Lift-off in an acetone bath.(d) The gold layer is structured while the albumen layer is unharmed.Microscope images of different steps show the albumen layer before processing (e), the albumen layer covered with a marker line (f) and the substrate after lift-off, demonstrating the intact albumen film and patterned gold structures.To fully understand the electrical properties of the albumen dielectric, several capacitors with different active areas have been defined.The albumen capacitors were fabricated on a highly doped silicon substrate, which acts as the bottom electrode, and exploiting a top electrode with evaporated gold contact.The electrical characterization has been performed modelling the capacitor with an Rp-Cp parallel model as shown in Supplementary Figure 6a, with Rp taking into account the leakage through the dielectric.The effects of the series resistance were neglected, considering the high conductivity of the electrodes.

Supplementary
Cp and Rp values have been estimated by characterizing the capacitors as a function of frequency, down to the DC.In particular, the AC measurements have been performed with an LCR meter (KEYSIGHT E4989A) using a four-probe configuration, in the frequency range 100Hz -2MHz, while applying a sinusoidal signal with amplitude equal to 1 V.An open circuit calibration has been performed before each data acquisition to ensure measurement accuracy.
For the DC characterization, the circuit shown in Supplementary Figure 6a has been exploited, where the Device Under Test (DUT) has been connected between the inverting input and the output of a low-noise operational amplifier (Op-Amp) (LF356N).The chosen amplifier also ensures that the bias current generators can be neglected with respect to the bias current Ip of the DUT, which is further generated by the series of a DC voltage Vp and the resistor R = 10 MΩ (i.e., Ip = Vp/R).Before the measurement, the switch is closed, so that the current Ip flows through the switch.At t = 0 s, the switch is opened, and Ip flows through the DUT.The generated voltage transient across the DUT, and hence at the output, has been monitored by means of an oscilloscope connected to the output of the circuit.
The values of the capacitance and of the resistance have been estimated, fitting the output characteristic through the function: as indicated in Supplementary Figure 6b.For the characterization, DC voltage values between 0.4 V to 0.8 V have been chosen.An open circuit calibration has been performed before each data acquisition in order to evaluate the parasitic capacitance of the system, which can be considered as an offset in the capacitor measurements.Dimensions and electrical device properties of all measured albumen transistors: Electrical device properties of all measured SiO2-based transistors: Nr.
On/off ratio gm (AV -1 ) In the following the characteristic electrical measurements for all albumen devices are given, with the (a) panels showing the current vs. voltage (IV) curves for gate voltage sweeps of −10 to 10 V and the (b) panels showing the corresponding transfer curves in linear and logarithmic fashion for the same gate bias range.Numbers correspond to the label in Supplementary Table 1.The curves of the albumen transistor with the number 9 are displayed in the main text.

Supplementary Figure 4 :
Marker lithography process.Panels (a)-(d) show the used procedure to realize patterned gold films on albumen films, making use of albumen's resilience against acetone and 2-propanol.(a) Spin-coating and baking of a 300 nm thick albumen film on a Si substrate.(b)

Figure 5 :
Leakage current characterization.(a) Thickness dependent leakage current of one series of albumen samples from the same egg with thicknesses ranging from 370 nm to 600 nm.(b) Humidity dependent leakage current for an albumen layer of 550 nm thickness in the range of 10-50 % humidity.(c) Changes of leakage current for an albumen layer of 550 nm thickness for different immersion times in Acetone and subsequent rinsing in Isopropanol are shown up to a time of 30 min.The inset shows the maximum leakage current values for under a bias of 10 V.All samples have an effective electrode area of 1 x 1 mm 2 .

Supplementary Figure 8 :
KPFM measurements for Schottky barrier analysis.(a) and (c) Recorded topography images of the two devices on SiO2 and albumen, respectively.(b) and (d) Recorded surface potential maps of both devices for different source-drain biases (0 V, 0.5 V and 1.5 V).The left electrode is grounded.Potential profile lines are indicated in white.(e) Schottky barrier plots for both cases and voltages.The potential profiles extracted from (b) and (d) are shown as insets, with dotted lines marking the MoS2-area of the profile.The barrier plots result from subtracting the zero-bias profile from the desired voltage profile.The barrier height is the difference between the potential of the gold electrode and the potential of the MoS2 flake at the border.

Table 1 : Device geometries and electrical figures of merit of the albumen transistors.
Values are extracted for all fabricated albumen transistors.Mobility, transconductance, threshold voltage and transconductance voltage values are corresponding to the forward sweep.Devices 24 and 25 are fabricated with eggwhite extracted from whole eggs, all other devices from bottled pasteurized eggwhite.

Table 2 : Electrical figures of merit of the SiO2-based transistors.
Values are extracted for all fabricated SiO2-based transistors.Mobility, transconductance, threshold voltage and transconductance voltage values are corresponding to the forward sweep.