Domain Wall Enabled Steep Slope Switching in MoS$_2$ Transistors Towards Hysteresis-Free Operation

The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation mechanisms remain a central topic of debate. In this work, we report steep slope switching in MoS$_2$ transistors back-gated by single-layer polycrystalline PbZr$_{0.35}$Ti$_{0.65}$O$_3$. The devices exhibit current on/off ratios up to 8$\times$10$^6$ within an ultra-low gate voltage window of $V_g$ = $\pm$0.5 V and subthreshold swing (SS) as low as 9.7 mV decade$^{-1}$ at room temperature, transcending the 60 mV decade$^{-1}$ Boltzmann limit without involving additional dielectric layers. Theoretical modeling reveals the dominant role of the metastable polar states within domain walls in enabling the NC mode, which is corroborated by the relation between SS and domain wall density. Our findings shed light on a hysteresis-free mechanism for NC operation, providing a simple yet effective material strategy for developing low-power 2D nanoelectronics.


Introduction
While the ever-growing thermal power becomes a central challenge faced by information technology in the post-Moore's law era 1 , ferroelectric-gated field effect transistors (FeFETs) operating in the negative capacitance (NC) mode provides a promising route for developing energy-efficient logic applications that can transcend the classic thermal limit 2,3 . For conventional transistors, the subthreshold swing (SS), defined as the gate voltage required to change the channel source-drain current by one order of magnitude (decade, dec), is determined by Boltzmann statistics: which imposes a fundamental limit of SS 60 mV dec -1 at 300 K 2 . Here is the surface potential of the channel, is the channel capacitance, and is the gate capacitance. It has been proposed that by replacing the gate dielectric with a ferroelectric layer coupled with proper capacitance matching, it is possible to stabilize the device in the regime with an effectively negative , which in turn reduces SS below the Boltzmann limit (Equation (1)), known as steep slope switching 2 .
The key to accessing the intrinsic NC regime of ferroelectrics relies on the instability of the spontaneous polarization 2 , which has been identified experimentally either in single-layer ferroelectric capacitors in transient measurements during polarization switching 4,5 , or in ferroelectric/dielectric stacks exploiting the dielectric layer to stabilize the quasi-static NC mode [6][7][8][9][10][11][12][13][14][15] . Since polarization switching is a first-order physical process, a hysteresis loop in the transfer curve is inevitable, which means that the on and off switching must be operated at different voltages. Such hysteresis window is not desired as it effectively increases the turn-on voltage span, lowers operation speed, and compromises the reliability of the device performance. Alternative scenarios proposed to harness the NC effect include charge trapping 16 and polarization rotation effects 17 . While the underlying mechanism for the NC-FETs remains a central topic of debate, the technological implementation of this device concept calls for device switching in a hysteresis-free fashion 3 .
In this work, we report steep slope switching in few-layer (FL) and bilayer (2L) MoS2 transistors back-gated by single-layer polycrystalline PbZr0.35Ti0.65O3 (PZT) films. These devices exhibit current ratios up to 8×10 6 within an ultra-low gate voltage window of 0.5 V, SS as low as 9.7 mV dec -1 at room temperature, and hysteresis-free switching at 10 A µm -1 .
Unlike the extensively investigated device structure with a ferroelectric/dielectric stack gate, no dielectric layer is employed to stabilize the NC mode of the ferroelectric layer. Instead, our theoretical modeling reveals that the steep slope switching originates from the metastable polar state within the domain walls (DWs) in the polycrystalline PZT gate, where a sudden boost of surface potential can be induced at an electric field well below the ferroelectric coercive field.
Compared with conventional NC mechanisms that involve polarization switching, the operation based on polarizing the DW is intrinsically low power and should occur at high speed. Our study thus provides critical insights into the viable mechanism for the NC operation, and points to a simple yet effective material scheme for achieving hysteresis-free steep slope transistors with reduced fabrication complexity.

Characterizations of polycrystalline PZT thin films
We work with 300 nm thick polycrystalline PbZr0.35Ti0.65O3 films deposited on Pt/Ti/SiO2/Si substrates (see Supplementary Note 1 for deposition details). Figure 1a shows the x-ray diffraction spectrum of a PZT film, which reveals predominant (001) and (111) Figure 1g shows the polarization P vs. bias voltage (Vbias) measured in a capacitance structure, which exhibits robust switching hysteresis with remanent polarization of about 0.3 C m -2 and coercive voltages of +1.3 V and -1.1 V. The hysteresis becomes negligibly small at the small bias voltage range of ±0.5 V (Fig. 1h insert). Within the hysteresis-free regime, we extracted a dielectric constant of 630−650, which is one to two orders of magnitude higher than those of conventional dielectrics such as SiO2 and HfO2. The dielectric constant shows little variation in this Vbias range, and can yield highly efficient doping in the 2D channel 30 .

Steep slope switching in PZT-gated MoS 2 transistors
We mechanically exfoliate few-layer and bilayer MoS2 flakes on PZT and fabricate them into FET devices back-gated by PZT (Fig. 2a, Methods). Figure 2b shows the AFM topography image of a  25,27,28 . In this temperature range, decreases with increasing temperature, following a power law T-dependence of ~ . (Fig. 2e), which can be attributed to phonon scattering 22  for over three decades of channel current, getting close to the thermal limit as exceeds 10 A µm -1 , while a substantial increase in SS occurs for 10 A µm -1 . The average subthreshold swing in this current range (10 10 A µm -1 ) is SS 57 1 mV dec -1 . In the reverse scan ( Fig. 2g), SS is close to and fluctuating around 60 mV dec -1 in the channel current range of 10 10 A µm -1 , with SS 60 1 mV dec -1 . Once exceeds 10 A µm -1 , the transfer curve of the device is essentially free of hysteresis between the forward and reversesweeps, agreeing well with the dielectric measurement of the PZT gate (Fig. 1h inset).
Similar switching characteristics have been observed in a bilayer MoS2 device (Device 2L D2).
As shown in Fig. 3a, a current switching ratio of 5 10 is achieved in the device within a small voltage window ΔVg of 0.76 V (-0.26 V to 0.5 V) in the forward -sweep. Compared with the few-layer device, the bilayer channel exhibits a much steeper slope in the initial turn-on characteristic at low channel current, with an SSmin of 9.7 mV dec -1 at 8 10 A µm -1 ( Fig. 3a lower insert). The SS then increases quickly with , reaching about 60 mV dec -1 at 10 A µm -1 . This is in sharp contrast to the moderate Vg-dependence of SS observed in the fewlayer device at this current range ( Fig. 2f and Supplementary Figure 9d). The tradeoff between the steepness of the initial turn-on behavior and the current range of low SS value can be attributed to the competing effects of the channel capacitance and 2D doping efficiency. As shown in Equation (1), not only plays a critical role in stabilizing the NC mode, but also tailors the fractional weight of the second term. As scales inversely with the dielectric layer thickness, the bilayer MoS2 possesses a larger capacitance in the depletion state compared with the few-layer device. For a given , it yields a larger fractional weight for the NC term in Equation (1) A µm -1 ). For both few-layer and bilayer devices, SSavg is consistently below the classical thermal limit of ln10/ (Equation (1)) over the entire temperature range investigated. Figure  3e compares the Ion/Ioff vs. ΔVg result obtained on the few-layer device in Fig. 2 (FL D1) with previous reports for MoS2-based NC-FETs [8][9][10][11][12][13][14]18 and classical FeFETs 24,25,27 , which highlights the superb performance combination of ultra-low supply voltage and high current on/off ratio in our devices. Despite the large current on-off ratio obtained within a small Vg, these devices exhibit negligible hysteresis (Vg < 10 mV) at 10 A µm -1 . This is in sharp contrast to the widely observed NC-FETs operating upon polarization switching 6,7,9,14,16,18  Unlike previous experimental studies of NC-FETs based on ferroelectric/dielectric stack gates [6][7][8][9][10][11][12][13][14] , the sub-60 mV dec -1 SS acquired in our devices in the hysteresis-free regime of PZT suggests the existence of a quasi-static NC mode in absence of an additional dielectric layer and hence the associated capacitance matching. The SS falls below the Boltzmann limit at an applied field well below the coercive field (Ec) of the ferroelectric gate, further suggesting that it is not driven by polarization switching. Besides polarization reversal, it has been theoretically predicted that a sudden change of in the semiconductor channel can also be achieved through ferroelectric polarization rotation from the in-plane to out-of-plane orientation, which can lead to hysteresisfree operation with higher speed and lower energy consumption 17  can be expressed as: . ( Here , , , and are the energy densities associated with the thermodynamic potential of a PZT single crystal, elastic energy, dipole gradient, and electrostatic energy, respectively (see Supplementary Note 10 for modeling details). Figure  This result thus yields strong support to the scenario of DW enabled NC modes in the MoS2 FETs.

Discussion
With the simulation results and PFM studies, we attribute the experimentally observed steep slope switching to the NC states of the DWs, which are abundant in polycrystalline PZT (Fig. 1c-f) 31, 32 .
In this scenario, the DW region possesses significantly suppressed local polarization due to their neighbors with antiparallel dipole orientations. These metastable polar states are delicate and have the tendency to collapse into a uniform polarization upon external perturbation, as evidenced by the enhanced dielectric susceptibility observed in the DWs 15,32,45 . An external electric field can thus induce a much larger increase in the dipoles at the DW compared with the dipoles inside the uniformly polarized domains. The simulated jump in the polarization is about 0.004 C m -2 ( Fig.   4d), which is on the same order of magnitude as that measured in our PZT films at Vbias below the coercive voltage (Fig. 1h inset). Even though this polarization value is much smaller than the remanent polarization of bulk PZT, it is comparable with that of polymorphous (Hf,Zr)O2 13 and large enough to induce a significant boost in (0.76 V), as indicated in Fig. 4b.
Our proposal of DW induced NC effect does not require capacitance matching from a dielectric layer, which is distinct from the extensively studied scenario operating in the polarization reversal regime. The latter effect capitalizes on the strong depolarization field provided by a dielectric layer to suppress the energy barrier in the ferroelectric between two polarization states, which can stabilize the steady-state NC effect in the hysteresis-free mode 46  The DW-enabled NC mode is generally applicable to DW-rich ferroelectric systems, such as polycrystalline thin films and films deposited along a crystalline orientation off the major polar axis. For example, steep slope switching has been observed in MoS2 FETs gated by a single layer of polycrystalline P(VDF-TrFE) 14 applications. In addition, controlling the extrinsic interfacial charge condition is critical for achieving hysteresis-free switching at the low current (Id < 10 -12 A µm -1 ) regime.
In terms of the MoS2 channel, even though we have achieved similar current on/off ratios in the few-layer and bilayer devices, they exhibit distinct turn-on behaviors. The few-layer MoS2 shows steep-slope switching over three decades of channel current, with only moderate Vg-

Data Availability statement
The data that support the plots within this paper and other findings of this study are available from the corresponding author upon reasonable request.

Competing Interests
The authors declare no conflict of interest.      In this study, we work with spin-coated polycrystalline Pb(Zr0.35Ti0.65)O3 (PZT) thin films 1  We have conducted C-V and C-F measurements at 10-100 kHz range and obtained similar results with the 1 kHz measurement. Supplementary Figure 1a shows the bias dependence of the dielectric constant extracted from the C-V measurements at 10 kHz, which is consistent with that obtained at 1 kHz shown in Fig. 1h in the main text. Supplementary Figure 1b

Supplementary Note 2: PFM Studies of Polycrystalline PZT Films at Low Bias Voltage
To

Supplementary Note 3: PFM Studies of Polycrystalline PZT Films at High Bias Voltage
We have also characterized the variation of local domain structure in PZT at high Vbias.
Supplementary Figure 3

Supplementary Note 5: C-AFM Studies of Leakage Current in Polycrystalline PZT Films
To track the leakage current distribution, we have carried out conductive AFM (c-AFM) studies on a thinner PZT film (150 nm) at different Vbias. As shown in Supplementary Figure 7

Supplementary Note 7: Effect of Leakage Current and Extraction of Subthreshold Swing
We consider the effect of leakage current (Ileak) on the transfer characteristics of MoS2 NC-FETs.
In our device geometry, the source/drain contact area (~10,000 m 2 ) is over two orders of magnitude larger than the device area (<100 m 2 ). The leakage current is thus limited by the contacts, and the source and drain contacts are subject to different bias voltages ( Supplementary   Figure 9a, b). To have a controlled study of the effect of leakage current, we have performed high precision characterization of Ileak through PZT using a capacitor structure, with the top electrode area comparable with the device contact. In Supplementary Figure 9c, we superimpose the measured Ileak onto the transfer curve of Device 2L D2 (Fig. 3a in the main text). In the NC region, the Id curve is above the leakage level, confirming that the gate-leakage does not contribute to the steep-slope switching of the MoS2 NC-FETs. within Vg = ±0.5 V. With increasing Vd, the transfer curve shifts to positive Vg direction at low current and then exhibits a crossover behavior at high current. This result is consistent with previous reports in Refs. [11,12], which can be attributed to the negative drain-induced-barrier-lowering (N-DIBL) effect in a junctionless transistor 13 .
What is interesting is the direction of the shift also depends on the Vg range. When the Vg range is expanded to ±1 V, the transfer curve shifts to the negative Vg direction for the entire gate range with no crossover behavior (Supplementary Figure 10b). Similar negative Vg-shift has also been reported in literature 11 We have also examined the temperature-dependence of the switching hysteresis. As shown in Supplementary Figure 11b, we extract the Vg hysteresis window (Vg) between the forward-sweep and reverse-sweep transfer curves of Device 2L D1. Supplementary Figure 11c shows Vg averaged over 4 orders of magnitude of Id (10 -12 -10 -8 A m -1 ) at four different temperatures (220 to 300 K) below the Curie temperature of PZT (above 700 K), illustrating that Vg is nearly temperature independent. This result indicates that the steep slope switching of the MoS2 FET is not due to the net effect of competing mechanisms, e.g., ferroelectric switching and interfacial charge dynamics, as those would have differen temperature dependences. It further supports our conclusion that the NC effect is intrinsic to the polycrystalline PZT gate.

FETs
When scanning in a large voltage-range (e.g., | | > 1 V), a switching hysteresis occurs in the MoS2 NC-FETs. Supplementary Figure 12a, b shows the transfer characteristics of a bilayer MoS2 NC-FET (Device 2L D3) taken at the -scan ranges of 1.5 V and 2 V, respectively. The device exhibits clockwise switching hysteresis similar to those reported in literature 18 . The hysteresis window increases with increasing -range, suggesting that it is dominated by the extrinsic mechanism 9 . A clockwise hysteresis has been widely observed in MoS2 FETs back-gated by dielectrics, which can be attributed to the dynamic response of ambient adsorbates, such as water dissociation/recombination, or charge trapping/de-trapping in interfacial defect states 9,19 . For ferroelectric-gated MoS2 FET, both clockwise and anti-clockwise hysteresis have been observed due to the competition between the intrinsic and extrinsic mechanisms. Previous studies have shown that for MoS2 devices prepared on PZT with relatively rough surfaces, the hysteresis is clockwise 18 , which is consistent with the results in this study.
The anti-hysteresis, on the other hand, is also absent in the low Vg-range, as the dynamic response of interfacial charges can only be activated above a threshold voltage 19,20 . A control study has been performed on a bilayer MoS2 FET back-gated by 300 nm SiO2 (Device 2L D4). As shown in Supplementary Figure 12c, clockwise hysteresis in the Id-Vg curve is observed in this device at high Vg-scan range ( 3 V and above), while there is no hysteresis at low Vg-scan range ( 1 V), confirming this scenario. We also note that no steep slope switching is observed in this device (SSmin = 106 mV dec -1 ). We can thus conclude that the hysteresis-free operation at

Supplementary Note 10: 3D Force Field Simulation
The 3D force field simulation is mainly based on the model developed in Refs. [21,22]. The single crystal term in the Gibbs free energy F of the multi-domain structure (Equation (2) in the main text) can be expressed as a 6 th -order polynomial with respect to the polarization along three Cartesian-axes as 21,22 : , The gradient term captures the energy contribution from the polarization discontinuity in domain walls and surfaces: are the potential drop through the electrode and ferroelectric oxide, respectively, along the x, y and z directions. Our previous work has shown that: where is the charge density in the electrodes or at the surfaces, is the screening length, and is the thickness of the insulators along the i ( 1, 2, 3) direction 22 . Therefore, Supplementary Equation (7) can be rewritten as: .
Deduced from Supplementary Equation (10) The relationship between and is where is the dielectric constant, is the intrinsic carrier concentration, and is the doping concentration 23 . In the simulation, we use a 20×20×10 supercell. The polarization of each unit cell is initially randomly directed. Then, the Gibbs free energy F is minimized by the Landau-Khalatnikov equation: where is the polarization dynamic parameter 24 . After acquiring the equilibrated structure, switches as 0 → 0.5 → 0 → -0.5 → 0 V with a 0.05 V step. For each voltage, the structure acquired at the last step is used as the beginning structure, and then F is minimized by Supplementary Equation (13).
The drain-source current is obtained by the Pao-Sah double integral as: where q is the electronic charge, is the effective electron mobility, W is the width of the channel, L is the length of the channel, is the flat band potential, is the current floor imposed by extrinsic mechanisms, such as interfacial charge dynamics or measurement noise level, E( , V) is the electric field in the channel, and δ is an infinitesimal quantity 25  b Ref. [22] c Estimated from Ref. [22] d Measured in the current work

Supplementary Note 11: Energy for Domain Wall Motion
We use a simple model to demonstrate that the energy and electric field required to polarize the metastable states at DWs are much smaller than those for reorienting the polarization of the entire crystal. Here, we consider a one-dimensional (1D) PZT crystal under zero strain, which is composed of 99 unit cells. The center of the DW locates between the #50 and #51 cells, as shown in Supplementary Figure 13a. The free energy of the system is expressed as: where and are neighboring cells. Supplementary Figure 13b shows the calculated polarization profile via minimizing the free energy. Starting from the DW center, the polarizations of the first three up-polarized unit cells are marked as , , and , respectively. Since the domain structure is anti-symmetric, the polarizations of the first three down-polarized unit cells are , , and , respectively. We consider 0.5 C m -2 as the bulk polarization in a uniform domain, and in our simulation . Next, we artificially change the polarization of the #50 unit cell #50 and optimize the polarization of the other unit cells with the Landau-Khalatnikov equation (Supplementary Equation (13)).
Supplementary Figure 13c shows the calculated energy profile as a function of #50 . As expected, the conditions of | #50 | , , and give the same energy (about 3 meV), since they correspond to either a left (+) or right (-) shift of the DW, with the resulting domain structures correlated by the translational symmetry. If the depolarization field is taken into consideration, the free energy is rewritten as: where is a constant depending on the screening length and thickness, and is the average polarization. As shown in Supplementary Figure 13d e Energy double well of the single crystal. The segment between the two dashed lines corresponds to the NC states.
The total energy barrier for DW motion has to be scaled by the width of the DW, as the entire DW has to shift collectively. Since the 1D model does not take into account the long-range dipoledipole interaction for a two-dimensional DW, the DW motion energy in a three-dimensional (3D) ferroelectric should be much larger. On the other hand, this simplified 1D model clearly illustrates that the energy barrier for polarizing the DW region is much smaller than polarization reversal for a uniformly polarized domain, which can be generalized to the 3D ferroelectric systems.