Oxidized-monolayer Tunneling Barrier for Strong Fermi-level Depinning in Layered InSe Transistors

In 2D-semiconductor-based field-effect transistors and optoelectronic devices, metal-semiconductor junctions are one of the crucial factors determining device performance. The Fermi-level (FL) pinning effect, which commonly caused by interfacial gap states, severely limits the tunability of junction characteristics, including barrier height and contact resistance. A tunneling contact scheme has been suggested to address the FL pinning issue in metal-2D-semiconductor junctions, whereas the experimental realization is still elusive. Here, we show that an oxidized-monolayer-enabled tunneling barrier can realize a pronounced FL depinning in indium selenide (InSe) transistors, exhibiting a large pinning factor of 0.5 and a highly modulated Schottky barrier height. The FL depinning can be attributed to the suppression of metal- and disorder-induced gap states as a result of the high-quality tunneling contacts. Structural characterizations indicate uniform and atomically thin surface oxidation layer inherent from nature of van der Waals materials and atomically sharp oxide-2D-semiconductor interfaces. Moreover, by effectively lowering the Schottky barrier height, we achieve an electron mobility of 2160 cm$^2$/Vs and a contact barrier of 65 meV in two-terminal InSe transistors. The realization of strong FL depinning in high-mobility InSe transistors with the oxidized monolayer presents a viable strategy to exploit layered semiconductors in contact engineering for advanced electronics and optoelectronics.


INTRODUCTION
Two-dimensional (2D) semiconductors present great potential for electronics and optoelectronics applications due to several unique characteristics, including efficient electrostatics, a lack of shortchannel effects, and the absence of dangling bonds. [1][2][3][4][5][6] Recent studies revealed that one of the challenges of fabricating 2Dsemiconductor-based transistors is to achieve an Ohmic contact at the interface of the electrodes and the 2D semiconductors. [7][8][9][10][11] In conventional bulk semiconducting devices, the Ohmic contact can be realized by matching the work function of the metals to the bands of the semiconductors. [12][13][14] However, Kim et al. 15 have shown a strong Fermi-level (FL) pinning in 2D-semiconductor transistors; i.e., the Schottky barrier height (SBH), Φ SB , is virtually independent of the work function of contact metals, resulting in a lack of tunability of contact resistance as well as the low-fieldeffect mobility and output current. 6 Moreover, the polarity of carrier transport cannot be manipulated by varying contact metals, 6 critically limiting the controllability of carrier extraction in 2D-semiconductor transistors. Mitigating the FL pinning effect is thus an urgent need to manifest the intrinsic nature of 2D semiconductors, to modulate the carrier transport properties, and to improve transistor performance.
A tunneling contact has been suggested to address the FL pinning effect in 2D-semiconductor devices by reducing: (i) disorder-induced gap states (DIGS), 6,16 (ii) metal-induced gap states (MIGS), [17][18][19] and (iii) interface dipoles. 20 By inserting an insulating layer between the metal and the semiconductor, the MIGS and interface dipoles can be effectively reduced by blocking the metallic wave function [17][18][19] and by neutralizing interface dipoles, 20 respectively. In the process of the device fabrication, the insulating layer can protect the underlying 2D semiconductors from direct bombardment and metal diffusion during the metal deposition, decreasing the DIGS in the metal-2D-semiconductor interface. 6,16 Previous studies have used metal/insulator/semiconductor (MIS) structure to tune the Φ SB in 2D-semiconductor devices. 20,21 However, these studies presented limited FL depinning, suggesting the difficulties to achieve a high-quality tunneling layer at the metal-semiconductor junctions. We overcome these issues by utilizing a surface oxidation layer (OL) in 2D semiconductors as an effective tunneling barrier. In the in-plane direction, a natively grown OL can yield a high compatibility between the oxide and layered semiconductor, 22,23 enabling a large-scale and atomically smooth oxide functioned as a tunneling contact in 2D-semiconductor devices. In the out-of-plane direction, because of the nature of van der Waals crystals, the thickness of the oxide layer can be precisely controlled down to atomicscale resolution, facilitating a high tunability of tunneling efficiency.
In this work, we address the FL pinning effect in 2Dsemiconductor-based transistors by demonstrating highperformance indium selenide (InSe) field-effect transistors with an atomically thin, precisely controlled tunneling barrier made by a surface OL. InSe is an emerging 2D semiconducting material with potential applications because of its extraordinary intrinsic characteristics, including a small effective mass in the conduction band, small optical bandgap (1.25 eV), high Hall mobility, 24,25 and weak electron-phonon scattering. 26 Hence, one envisions in InSe a channel material with high electronic performance that validates the demonstration of FL depinning. Here, we fabricate the atomically thin OL by a UV-ozone process that is highly scalable 1 and more compatible with semiconductor manufacturing processes. By employing the surface OL as part of the tunneling contact, we successfully achieve a strong FL depinning in InSe transistors and realize a high-pinning factor of 0.5. Moreover, the barrier height and the threshold voltage can be effectively modulated by varying the work function (WF) of the contact metal because of the pronounced FL depinning. Accordingly, with the selected WF of the contact metal, we achieve a low-contact barrier of 65 meV in the InSe devices, enabling a high two-terminal electron mobility of 2160 cm 2 /Vs.

RESULTS AND DISCUSSION
The InSe samples are mechanically exfoliated from InSe crystals onto a highly doped Si substrate with a 300 nm SiO 2 dielectric layer under ambient conditions. After exfoliation, we grown the surface OL on InSe flakes by employing UV-ozone treatment at 80°C for 10 s. The atomic structure and chemical properties of the surface OL are examined by cross-sectional transmission electron microscopy (TEM) and energy-dispersive X-ray spectroscopy (EDX) mapping, as shown in Fig. 1a. Remarkably, the OL is uniformly grown, and the underlying InSe layers remain of a high-quality crystallinity, highlighting an atomically sharp and clean interface. The surface OL is amorphous with a thickness of 1 nm,~1.3 times that of the single-layer InSe, implying that only the topmost monolayer is oxidized. The EDX mapping, which has been used to estimate the relative abundance of elements in the heterostructures, reveals that a substantial amount of Se atoms are substituted by O atoms within the OL regime, which is further supported by X-ray photoelectron spectroscopy data (Supplementary Fig. S1). The In concentration remains constant up to the surface, suggesting the formation of substoichiometric InO x . The TEM and EDX mapping clearly indicate the formation of a uniform OL generated from the topmost InSe monolayer, which we denote as an oxidized-monolayer (OML) from here forward. We note that in contrast to natively grown oxide ( Supplementary Fig. S3) and oxygen plasma, 27 UV-ozone facilitates the strong oxidation of the InSe surface due to the presence of singlet oxygen atoms, which are chemically active. 28 The strong oxidizability could in principle lead to the domination of the vertical oxidation reaction over the lateral reaction triggered by the defects, 29 resulting in a uniform OML observed in our InSe samples.
The surface topography of the OML of InSe samples is characterized by using atomic force microscopy (AFM). The AFM images were acquired by the Peak-Force tapping mode using a sharp probe with a tip radius of 2 nm. (See Supplementary Information S2 for detail information.) The inset of Fig. 1b shows the AFM image of the OML that manifests a very uniform surface, signifying that even with a thickness of 1 nm, the surface OL is highly compatible with the underlying InSe. Figure 1b compares the histogram of the OML surface with that of a bulk hexagonal boron nitride (h-BN) flake and a SiO 2 /Si substrate. Notably, the OML surface exhibits a very small roughness of 80 pm, confirming the high compatibility of the OML with the underlying InSe. It is noteworthy that the roughness of the oxidized InSe surface is comparable to that of h-BN (i.e., 90 pm), which exhibits an atomically smooth surface 30 and can be used in tunneling contacts for 2D-semiconductor-based devices. 31  uniform surface thus suggests the viability of employing the OML as a tunneling barrier. As a comparison, nucleation sites are observable in the InSe samples not subjected to the UV-ozone treatment, which may be attributed to the native oxide that arises during exposure to the ambient atmosphere (Supplementary Figs. S3 and S4). Therefore, the uniform surface of the OML indicates a passivation and a stabilization effect resulting from the chemically stable surface oxide. 33 We further perform Raman spectroscopy to understand the crystal quality of the InSe sample before and after the UV-ozone treatment. As shown in Fig. 1c, we observe four characteristic Raman peaks in the pristine InSe sample at 117, 179, 200, and 228 cm −1 , corresponding to the out-of-plane (A 1 ) and in-plane (E) vibration modes. 34 After the UV-ozone treatment, these four characteristic Raman peaks show insignificant changes to their peak intensity and energy. The full width at half maxima before (after) the UV-ozone treatment are 2.9 (3.1), 5.7 (5.1), 2.3 (2.7), and 4.7 (4.8) for Raman modes at 117, 179, 200, and 228 cm −1 , respectively. The invariance of these Raman modes before and after the oxidation process clearly confirms that the crystal quality of the underlying InSe is negligibly affected by the UV-ozone treatment. No additional peaks corresponding to the oxide are observed, suggesting that the oxide is amorphous. To summarize, the comprehensive characterizations of TEM, AFM, and Raman spectroscopy show strong evidence of the ultra-uniform OML interfaced with the high-quality layered InSe underneath.
To understand the effects of introducing the ultrasmooth and uniform OML on the electrical properties of the InSe transistors, we fabricate back-gated devices with the contact structure illustrated in Fig. 2a. The thickness of the InSe flakes used for the devices ranges from 10 to 20 nm, as confirmed by AFM. The InSe samples are then transferred onto h-BN flakes by a dry transfer technique. We employ the h-BN flakes as the substrate for the InSe channel to reduce the extrinsic carrier scattering sources at the bottom interface ( Supplementary Fig. S5). 35 The InSe/h-BN stacking structures are annealed in a furnace at 300°C with mixed gas (95% Ar and 5% H 2 ) to improve the quality of the InSe/h-BN interface and to remove the residual polymer at the surfaces. These InSe/h-BN samples are then oxidized by the UV-ozone process at a temperature ranging from 80 to 100°C for 10 s, followed by depositing electrical contacts (contact metal/Au of 15 nm/40 nm) with e-beam evaporation at a base pressure of 1 × 10 −7 Torr. To attain high uniformity of the tunneling barrier, we employ a resist-free method to define the source and drain contacts 36 to avoid the potential resist residue in conventional lithography techniques, allowing us to study the FL-depinning effect accurately. For the resist-free fabrication method, we use the commercially available TEM grids to define the device channel by the shadow effect with the width ranging from 5 to 12 μm. The TEM grids are attached to a premade holder, which are then mounted on a home-made aligner. We then align the InSe flakes to the bar of the TEM grid under an optical microscope, subsequently followed by the metal deposition. We note that the TEM grid is not in contact with the InSe flake during the whole process, leading to the pristine condition of the InSe surface. The inset of Fig. 2b shows an optical microscopy (OM) image of a typical InSe device. All the electrical characterization are performed in a helium environment at a pressure of 20 Torr.
We first present the tunneling transport behavior of the OMLembedded InSe devices. As shown in Fig. 2b, the InSe devices constructed with UV-ozone processing temperatures of 80, 90, and 100°C exhibit nonlinear output curves (I ds − V ds curves). These nonlinear output curves can be well described by Simmons' model that manifests a cubic term in the V ds dependence (inset in Fig. 2b and Supplementary Fig. S6), suggesting that the tunneling effect governs the charge transport as a result of introducing the OML. For higher processing temperatures, the I ds decreases because of a larger contact resistance corresponding to a thicker OL, which is consistent with the tunneling transport behavior in the OMLembedded InSe devices. The large I ds of the InSe device with an OML grown at 80°C indicates the optimal tunneling efficiency with a low-contact barrier, therefore, this condition is employed to fabricate the OML for subsequent studies. Moreover, compared with the InSe sample without the OML, the InSe devices embedded with the OML exhibit a higher I ds and lower barrier height ( Supplementary Fig. S7), which is consistent with the tunneling contact behavior. 20 To evaluate the SBH of the MIS contact of the InSe devices, we conduct temperature (T)-dependent transport measurements and extract the SBH under flat-band gate bias conditions. Based on the thermionic emission model, 9 the drain current injected through a reverse-biased Schottky barrier can be written as: where A * is Richardson's constant, k B is the Boltzmann constant, T is the temperature, q is the elementary charge, E A is the activation energy, and V ds is the source-drain voltage. By fitting the Arrhenius plot of I d /T 3/2 , we can extract E A , which represents the barrier height that the carriers have to overcome. The V ds dependence of E A is plotted to determine the SBH of the devices under the flat-band condition (Supplementary Fig. S8). The SBH extraction is found to only be applicable in the temperature range from 300 to 400 K, where the thermionic emission current dominates the carrier transport. 15 Moreover, we note that the extracted SBH corresponds to an effective SBH that represents the overall contact behavior because the insulating layer is not considered in the current-voltage characteristics described in Eq. (1). We now discuss how the OML-embedded MIS contact affects the FL pinning effect in the InSe devices by examining the pinning factor and charge neutrality level. 37 The relation between the SBH and the metal WF can be depicted by the following equation: where ϕ Bn is the SBH for electrons, ϕ m is the WF of the contact metal, χ is the electron affinity, and b is the y-intercept. S is the pinning factor and can be calculated by S = dϕ Bn /dϕ m , where S = 1 corresponds to the Schottky-Mott rule in which the SBH is simply determined by the difference between ϕ m and χ, and S = 0 corresponds to absolute FL pinning, where the SBH is independent of the metal WF. The charge neutrality level, ϕ CNL , denotes the energy of the surface states at which the FL of the metal electrodes is pinned. The ϕ CNL can be estimated by the following expression, which is derived from Eq. (2): Figure 3a compares the SBH as a function of the metal WF for the OML-embedded InSe devices with that of the control samples. The S and ϕ CNL are calculated using the following parameters: χ InSe = 4.6 eV, 38 ϕ m,In = 4.12 eV, ϕ m,Ti = 4.33 eV, ϕ m,Cr = 4.5 eV, and ϕ m,Pd = 5.12 eV. 39 Remarkably, the InSe transistors with the OMLembedded tunneling contact manifest a large pinning factor of S = 0.5 ± 0.01, indicating a pronounced FL depinning. This result is in contrast to that of the control samples, revealing a strong FL pinning with S = 0.05 ± 0.02. Moreover, due to the FL depinning, the modulation of the SBH by varying the WF of the contact metals (0.5 eV) is more substantial than that of the control samples (0.05 eV). We note that the FL depinning in layered semiconductors with a tunneling contact has not been realized before, highlighting the unique contact properties of the metal/insulator/ layered-semiconductor interface.
The mechanism of the FL depinning in OML-embedded InSe transistors can be elucidated by examining the value of S and ϕ CNL . First, a theoretical model considering the MIGS model predicts a pinning factor of S = 0.2 in an ideal metal/InSe interface. 40,41 The OML-embedded InSe devices show a greater S = 0.5, indicating that the presence of the OML can suppress MIGS, as illustrated in Fig. 3b, d. Next, the ϕ CNL is estimated by Eq.
(3) to be 4.9 eV for the control samples. This ϕ CNL is~0.3 eV below the conduction band-edge (CBE) (χ InSe = 4.6 eV), 38 suggesting that   the FL pinning in the control samples may be associated with defect states such as Se vacancies. 42 With the OML, the ϕ CNL increases to 5.2 eV, signifying that the DIGS corresponding to ϕ CNL = 4.9 eV are greatly suppressed, as depicted in Fig. 3c, e. It is noteworthy that the FL depinning resulting from the tunneling contact can be mainly attributed to the inherently dangling-bondfree nature of the layered materials, as well as the resist-free fabrication method of the metal contact. This clean interface and the high-quality InSe crystalline structure, as evidenced by the TEM characterizations, can mitigate the DIGS originating from the interfacial disorder. On the other hand, it has been reported that a tunneling barrier with a large band gap and small dielectric constant is beneficial to suppress FL pinning. 18 Whether using an alternative ultrathin oxide within the MIS contact of the layered semiconductor can lead to even more complete FL depinning is worth further investigation. Enabled by the FL depinning, we now show that the InSe devices with the tunneling contact manifest highly tunable transport characteristics controlled by the WF of the contact metal. Figure 4a compares the semilogarithmic output curves for InSe devices with In (ϕ m,In = 4.12 eV) and Pd (ϕ m,Pd = 5.12 eV) contact metals. In the case of the In contact, the I ds of the OMLembedded InSe devices is increased by threefold, indicating a reduced SBH. In contrast, the InSe devices with the Pd contact exhibit a decreased I ds and an increased contact barrier with the addition of the OML. This result is reasonable because for the Pd contact, we observe a larger SBH (ϕ Bn,Pd~0 .57 eV) when the FL is not pinned compared with that of the pinning scenario (ϕ Bn,Pd0 .28 eV). On the other hand, the integration of the OML with the In contact leads to a small-energy difference between the In WF and the CBE when the FL depinning occurs. 43 Figure 4b compares the transfer curves (I ds − V gs curves) of the OML-embedded InSe devices and the control samples at T = 2 K. The control samples with In and Pd contact metals exhibit a comparable threshold voltage of V th = 30 V, suggesting the presence of the FL pinning effect. Interestingly, V th shifts positively by 20 V and negatively by 25 V for larger (Pd) and smaller (In) WF metals, respectively. At low T, in the absence of the thermionic emission, V th is associated with the difference between the metal WF and the CBE of InSe. The effective modulation of V th by varying the WF of the contact metal thus confirms the occurrence of FL depinning in the InSe devices embedded with the OML. It is noted that the V th for the OML-embedded InSe samples with the In contact is~0 V, which is reasonable because the energy difference between the In WF and the CBE is small. 35 On the other hand, owing to the high WF of Pd (ϕ m,pd = 5.12 eV) relative to that of InSe (ϕ m,InSe = 4.7 eV), a large and positive V gs is needed to electrostatically gate the InSe channel to attain the turn-on state.
The observed shifting in V th is not caused by the doping effect of the surface oxide, 44 as verified by OML-embedded InSe devices with an additional ozone treatment that causes further oxidation layer (Supplementary Figs. S9 and S10). Therefore, the observed changes in V th and I ds due to the integration of the OML further substantiate the FL depinning in the InSe devices with the tunneling contact.
We have presented that the InSe devices with the tunneling contact enable the effective modulation of the SBH by alleviating FL pinning. This tunneling contact scheme can thus be utilized to improve the device performance by lowering the contact resistance. Accordingly, we demonstrate high-quality InSe devices with the OML-embedded tunneling contact by employing the In contact, which exhibits a small SBH of 65 meV (Fig. 3a). Figure 5a compares the transfer curves of an OML-embedded InSe device (sample A) and a control sample (sample B) at T = 2 K for V ds = 1 V. Both samples exhibit an n-type conduction behavior; however, sample A shows a high turn-on current of 103 μA/μm at V gs = 80 V, which is~6-times that of sample B. This enhanced I ds can be attributed to a large tunneling contact area as a result of the uniform oxide layer 45 and a low energy barrier corresponding to the tunneling contact. The inset of Fig. 5a presents the logarithmic transfer curve of sample A, which exhibits a pronounced turn-on behavior. A large on/off ratio of 10 8 at T = 2 K (and 10 7 at T = 300 K) is observed, indicating an ideal transistor behavior. Figure 5b compares the two-terminal field-effect mobility (μ FE ) as a function of T for samples A and B in which the μ FE is calculated by μ FE = (1/V ds C sio2 )(L/W)(dI ds /dV gs ). Remarkably, sample A manifests a high two-terminal μ FE of 2160 cm 2 /Vs at T = 2 K and 940 cm 2 /Vs at T = 300 K. This μ FE compares favorably with other layered-semiconductor-based transistors with the tunneling contact. 31,32,46 The μ FE of sample A is four-times that of the control sample, confirming the significance of introducing the OML into the metal/InSe interface. This enhancement in μ FE can be attributed to the reduction in the contact barrier ( Supplementary  Fig. S7). At the high-T regime (T = 200-300 K), the T dependence of μ FE can be described by μ ph / T Àγ (γ = 0.56 and 0.52 for samples A and B, respectively), indicating a phonon-scatteringlimited μ FE .
We further examine the trap states in our InSe devices to understand the effect of the OML on the carrier transport properties. The trap density in a transistor can be estimated by N IT ¼ C ox ΔV th =q, where C ox is the gate capacitance of the h-BN/ SiO 2 dielectric layer, ΔV th is the shift in the V th between the forward and backward sweeps of the transfer curves, and q is the elementary charge. 47 Figure 5c compares the trap density of the OML-embedded InSe devices with that of a control sample in an Arrhenius plot. We observe a larger trap density in the control sample, which may be attributed to the formation of a native oxide or the adsorption of moisture. 48,49 In contrast, the InSe device with the OML exhibits a very low trap density of~2 × 10 11 cm −2 , suggesting a higher interfacial quality. Moreover, the linear decrease in N IT with lowering T in both devices is consistent with a thermally activated behavior. 50 The activation energy, E A , of the InSe device with the OML is extracted to be 57 meV, suggesting that the trap states, albeit existing at a low density, negligibly affect the band-edge electrons due to the large energy difference between the trap states and the CBE. On the other hand, E a1 4 meV is extracted for the control sample, indicating the presence of shallow traps. The small trap density and the large E A of the OML-embedded InSe devices are both advantageous to the carrier transport in the channel, further validating the prominent transport characteristics (Supplementary Fig. S11).
In this work, we demonstrate a pronounced FL depinning in InSe transistors by employing a tunneling contact realized by a high-quality OML. Considering the great interest in layeredsemiconductor-based devices, control of the contact properties is especially important for device applications. We show that the unique characteristics of layered semiconductors can be utilized to form an atomically thin, ultra-uniform OML. This OML is integrated into the tunneling contact of InSe transistors, leading to a strong FL depinning with S = 0.5 and an effective modulation of the SBH. Accordingly, the low-contact barrier is achieved with the tunneling contact and the In electrodes, enabling a high electron mobility of 2160 cm 2 /Vs in two-terminal InSe devices. The realization of FL depinning in high-mobility InSe transistors embedded with the OML inspires a feasible tunneling contact scheme for 2Dsemiconductor-based electronic and optoelectronic applications.

The InSe samples fabrication
For TEM, AFM, and Raman spectroscopy characterizations, the InSe samples are mechanically exfoliated from InSe crystals onto a highly doped Si substrate with a 300 nm SiO 2 dielectric layer under ambient conditions. After exfoliation, we grown the surface OL on InSe flakes by employing UV-ozone treatment at 80 C for 10 s. For electrical characterization, we fabricate back-gated devices with the contact structure illustrated in Fig. 2a. The thickness of the InSe flakes used for the devices ranges from 10 to 20 nm, as confirmed by AFM. We exfoliate the InSe flakes onto polydimethylsiloxane (PDMS), which are then transferred onto preexfoliated h-BN flakes by a dry transfer technique. We employ the h-BN flakes as the substrate for the InSe channel to reduce the extrinsic carrier scattering sources at the bottom interface. The InSe/h-BN stacking structures are annealed in a furnace at 300°C with mixed gas (95% Ar and 5% H 2 ) to improve the quality of the InSe/h-BN interface and to remove the residual polymer at the surfaces. These InSe/h-BN samples are then oxidized by the UV-ozone process at a temperature ranging from 80 to 100°C for 10 s, followed by depositing electrical contacts (contact metal/ Au of 15 nm/40 nm) with e-beam evaporation at a base pressure of 1 × 10 −7 Torr. To attain high uniformity of the tunneling barrier, we employ a resist-free method to define the source and drain contacts to avoid the potential resist residue in conventional lithography techniques, allowing us to study the FL-depinning effect accurately.

Measurement
All the electrical characterization are performed in a Physical Property Measurement System in a helium environment at a pressure of 20 Torr. The channel conductance was measured by using a Keithley 2636 and the gate voltage was applied by using a Keithley 2400.

DATA AVAILABILITY
Data presented in this work is available upon reasonable request from the corresponding author.