Development of multiple input supply based modified SEPIC DC–DC converter for efficient management of DC microgrid

The development of DC microgrids is reliant on multi-input converters, which offer several advantages, including enhanced DC power generation and consumption efficiency, simplified quality, and stability. This paper describes the development of a multiple input supply based modified SEPIC DC–DC Converter for efficient management of DC microgrid that is powered by two DC sources. Here Multi-Input SEPIC converter offers both versatility in handling output voltage ranges and efficiency in power flow, even under challenging operating conditions like lower duty cycle values. These features contribute to the converter's effectiveness in managing power within a DC microgrid. In this configuration, the DC sources can supply energy to the load together or separately, depending on how the power switches operate. The detailed working states with equivalent circuit diagrams and theoretical waveforms, under steady-state conditions, are shown along with the current direction equations. This paper also demonstrates the typical analysis of large-signal, small-signal, steady-state modeling techniques and detailed design equations. The proposed configuration is validated through the conceptual examination using theoretical and comprehensive MATLAB simulation results. Detailed performance analysis has been done for different cases with various duty ratios. Finally, to show the competitiveness, the multi-input SEPIC topology is compared with similar recent converters.

• Introduction of a Highly efficient SEPIC (Single-Ended Primary Inductor Converter) configuration for power management in DC microgrids.• Performance evaluation based on the (R-H) criteria, considering both small signal and large signal modeling to account for linear and non-linear devices.• Through assessment of Multi-Input SEPIC configuration efficiency through simulation results.
• Detailed analysis of waveforms associated with switches and energy storing elements in the system.
• Contribution enhances understanding of system behavior, stability, and efficiency, providing valuable insights for real-world applications.
The paper is meticulously organized as follows.Section "Literature survey" provides an insightful overview of various converters integrated with the Single-Ended Primary Inductor Configuration (SEPIC), setting the stage for the proposed system.Section "Methodology" elucidates the different modes of operation within the SEPIC configuration, deriving them through state space modeling.Moving to Section "Analysis & design", a comprehensive analysis of SEPIC is presented, incorporating average large signal modelling, small signal modeling, (R-H) criteria assessment, steady-state modelling, and the design intricacies of key components like capacitors and inductors.This section also encompasses efficiency and voltage stress calculations.Section "Results" details the results obtained from simulations conducted on diverse circuits, evaluating the proposed converter's performance across different cases.Furthermore, it discusses the comparative analysis of the proposed topology with existing configurations.Section "Conclusion" succinctly concludes the paper, summarizing key findings and contributions, and providing closure to the proposed configuration's exploration.

Literature survey
At present, the energy that can be generated by renewable is more when compared non-non-renewable energy resources in terms of the fuel that may be extinguished in the future 18 .The most efficient way to store energy is to store it in a battery using a solar PV array system 22 .Other DC storage systems cannot be used in these circumstances, where they are more disadvantages than DC batteries.The foremost disadvantage of using a fuel cell is the presence of hydrogen, the cost of hydrogen element is higher when compared to the total cost taken to a battery manufacture.Now, to supply DC voltage, which is stored by solar PV system we need an efficient DC-DC converter, which can perform the Boost and Buck operation as well, the further the DC voltage can be given DC microgrid application.From this paper, there are many DC-DC converters in the Power Electronics Concept, like Buck, Boost, Buck-Boost, Cuk, Fly-back, SEPIC and Zeta converters, etc.At our foremost need the input to the converter should be a DC supply and a DC power Storage system 23 .These terms and conditions can only be satisfied by the SEPIC converter.Where when compared to other converters will not fulfill the demands and there will more losses for different converters if won't choose SEPIC (Single Ended Primary Inductor Converter) and efficiency will a significant factor in determining such a converter.Now, when Boost converter is compared with the SEPIC the output voltage can only be increased and the output cannot be bucked further as the paper states that the output voltage can be given to DC power micro grid application, where the applications can be of less voltage and more voltages, Where Buck and Boost of output voltage is also required.Where in SEPIC converter, the Buck and Boost of the output voltage can be done 24 .The boost converter cannot be used as energy storage system as well.Now when Buck-boost converter is used here the output voltage can be increased or decreased as well but the main disadvantage is that the input voltage should be given with a specific limit and the circuit complexity would be increased as well.There no inductor at the primary where the current cannot be in continuous mode, here also the storage system can be implemented further 25 .The Buck-Boost converters main drawback is that its larger and heavier than traditional one.In Flyback converter, the input can also be varied, but the drawback is that its cost is more.In terms of the construction also the two different converters topologies, the flyback converter and the boost converter by which the additional components and wiring 26 .
In order to decrease those, dis-advantages we can implement the SEPIC converter where the cost can be less when compared to flyback converter.The 5th order converter is ZETA converter where the input can be varied and the output voltage as well.By implementing this converter instead of the SEPIC, the output side capacitor by which the output ripples can be removed, even though the input side capacitor is not present, where the current will not be continuous 31 .But the continuous current is required based on the applications of DC power microgrids.This drawback can be rectified by SEPIC converter only the remaining converter cannot be used where the inductor is not at the input side.When the other converter is to be compared with the SEPIC converter, this comes first in terms of the DC power micro grids applications, where the remaining converter's drawback can be rectified as well.To overcome by the individual drawbacks, the we can implement the combination as well 24 .
In co-ordination with the buck-boost and Cuk where the converters have same topologies of working where in combined, they can work in more efficient way.The output can be of same when compared SEPIC and the combination of Buck-Boost & Cuk converter 25 .However, the issue is the increase of complexity, where the complexity can be reduced and the desired output can be acquired as well.Further the SEPIC topology technique can be implemented by Buck and Buck-Boost converter as well, where the multiple DC voltages can be connected to the DC micro grid bus.But the main intention is not regarding the input DC but the output desired voltage, which can be supplied further to plenty of DC power applications 33 .
But when we try to implement it, the cost will be more expensive compared to implementing single SEPIC alone.Not to mention that the complexity will also be increased, which will decrease usage.Now, in urban days, people try to use more energy at day time and low energy at nighttime, to fulfil it we must have control of input and output as well.Now this can be achieved by hybrid DC-DC converter based on buck-boost and ZETA converters for DC microgrids with grid connection 31 .But the drawback is that its efficiency is less when compared to the traditional DC-DC converter.As efficiency is the main parameter to determine its performances.

Methodology
The traditional single-input DC-DC configuration and the newly proposed converter function similarly in terms of their basic operating principles.In each mode of operation, both configurations involve the inductor (L) and capacitor (C) components storing energy for a specific duration and then releasing that energy to the load.The proposed converter, depicted in Fig. 1, operates in four different states (stages 1-4), each corresponding to an equivalent network (Figs. 2, 3, 4, 5).The ideal waveforms for the suggested DC source 1 and 2 under Continuous Conduction Mode (CCM) are illustrated in Fig. 1.In Fig. 1, v a and v b represent the DC source 1 and 2's large- signal terminal voltages, respectively.M 1 to M 4 are the four MOSFET switches, Diode a and Diode b are two diodes, L a and L b are the inductors, C a and C b are the capacitors, and R is the load resistance.
V La and V Lb indicate the large-signal voltages across L a and L b , respectively, while I La and I Lb represent the large-signal currents flowing through L a and L b .Similarly, I Ca and I Cb denote the large-signal currents through C a and C b , and V 0 is the large-signal voltage across R. The gating pulses for switches M 1 to M 4 are VGM 1 to VGM 4 , respectively.V Ca and V Cb are the large-signal voltages across C a and C b , and the large-signal current flowing through R is I 0 .V 0 is the steady-state voltage across R, and I 0 = V 0 /R is the corresponding steady-state current.It's important to note that while the designed converter can operate with various input combinations, it is a theoretical model and does not address the practical challenges associated with integrating DC source 1 and DC source 2 systems into the grid.The different states of the Proposed converter, where the Table 1 gives    the information regarding the elements which would charge or discharge, current direction which source acting as main input to the converter.

States of operations
The suggested converter's precise functioning, the corresponding state-space model, and dynamic equations in each operating state are discussed in Sections "Introduction" to Analysis & design.

State-1
In State-1, the switches M 1 and M 4 are in the ON condition and M 2 , M 3 Diode a and Diode b are inactive.Dur- ing the operating phase from 0 to t 1 , equivalent to (δ 1 )t , as illustrated in Fig. 6, the converter exhibits specific characteristics.The equivalent circuit for this particular state of operation is presented in Fig. 2. In this interval, the inductors L a and L b undergo a charging process, and the inductor currents i La and i Lb have slopes that are determined by v a La and v Ca Lb , respectively.The inductor current i La and i Lb theirmaximumvaluesi La max and i Lb max.The energy stored in the capacitor (C b ) is discharging along load resistance by having the slope of the voltage v Cb is −v o RCb .The capacitors C a starts discharging and helps L b , the slopes of the capacitor voltages v Ca is −i Lb Ca .Applying KVL and KCL to the circuit shown in Fig. 2, the equations presented in (1) to ( 5) can be derived.
The dynamic equations of State-1 is given below: The suggested system exhibits a fourth-order configuration, and the state-space model can be formulated by employing the dynamic equations corresponding to State-1 are shown in Eqs.(7) and (8).with the inductor currents.i La and i Lb and capacitor voltages v Ca and v Cb as the state variables.  which is equivalent to (δ 2 )t , as illustrated in Fig. 6. the converter exhibits specific characteristics.The equivalent circuit for this particular state of operation is presented in Fig. 3.In this interval, the inductors L a and L b undergo a charging process, and the inductor currents i La and i Lb have slopes that are determined by v b La and v Ca Lb , respectively.The inductor current i La and i Lb theirmaximumvaluesi La max and i Lb max.The energy stored in the capacitor (C b ) is discharging along load resistance by having the slope of the voltage v Cb is −v o RCb .The capacitors C a starts discharging and helps L b , the slopes of the capacitor voltages v Ca is −i Lb Ca .Applying KVL and KCL to the circuit shown in Fig. 3, the equations presented in ( 9) to ( 13) can be derived.
The dynamic equations of State-2 are given below: The suggested system exhibits a fourth-order configuration, and the state-space model can be formulated by employing the dynamic equations corresponding to State-2 are shown in Eqs.(15) and (16).with the inductor currents i La and i Lb and capacitor voltages v Ca and v Cb as the state variables.

State 3
In State-3, switches M 3 and M 4 are in the ON condition while M 1 , M 2 , Diode a, and Diode b are in the Inactive condition.During the operating phase from t 2 to t 3 , equivalent to (δ 3 )t , as shown in Fig. 6. the converter exhibits specific characteristics.The equivalent circuit for this particular state of operation is presented in Fig. 4. The inductors L a and L b initiate the charging process, with the inductor currents i La and i Lb have slopes that are v a +v b La and v Ca Lb , respectively.The inductor current i La and i Lb reachtheirmaximumvaluesdenotedasi La max and i Lb max.Simultaneously, the energy stored in capacitor C b begins to discharge through the load resistance R, capacitor (7) Ca .Applying KVL and KCL to the circuit shown in Fig. 4, the equations presented in ( 17) to ( 21) can be derived.
The dynamic equations of State-3 are given below: The suggested system exhibits a fourth-order configuration, and the state-space model can be formulated by employing the dynamic equations corresponding to State-3 are shown in Eqs. ( 23) and (24).with the inductor currents i La and i Lb and capacitor voltages v Ca and v Cb as the state variables.

State-4
In State-4, Diode a and Diode b are in the ON condition, while M 1 , M 2 , M 3 , and M 4 are in the Inactive condition.During the operating phase from t 3 to t 4 , equivalent to (1 − δ 1 − δ 2 − δ 3 )t , as illustrated in Fig. 6. the converter exhibits specific characteristics.The equivalent circuit for this particular state of operation is presented in Fig. 5.In this interval, the inductors L a and L b initiate the discharging process, with the slopes of the inductor currents i La and i Lb determined by −v ca −v cb La and − v Cb Lb , respectively.i La reaches its minimum value i La min from its maximum value i La max.while i Lb reaches its minimum value i Lb min from its maximum value i Lb max.Simultaneously, capacitors C a and C b begin to charge with the assistance of L a and L b , with the slopes of the capacitor voltages v Ca and v Cb given by i La Ca and i La Cb + i Lb Cb − v 0 RC b ,respectively.Applying KVL and KCL to the circuit shown in Fig. 5, the equations presented in ( 25) to ( 28) can be derived.
The dynamic equations of State-4 are given below: www.nature.com/scientificreports/ The suggested system exhibits a fourth-order configuration, and the state-space model can be formulated by employing the dynamic equations corresponding to State-4 are shown in Eqs.(30) and (31).with the inductor currents i La and i Lb and capacitor voltages v Ca and v Cb as the state variables.

Analysis and design Average large signal model
There is a non-linear circuit design in the recommended configuration.The typical large-signal modeling method considers non-linearities and the impact of the real voltages in the circuit.As a result, the results obtained closely agree with the physical circuit's behaviour.The State-space illustration is a mathematical model that describes the dynamic behaviour of the system is as follows A, B, C, and D are matrices representing the system dynamics, input-output relation, output observation, and feedforward components, respectively.

Small signal model
Small-signal models are very useful for analysing the behaviour of electronic circuits.They allow us to use linear circuit analysis techniques to analyse circuits containing nonlinear devices.This makes it much easier to design and analyse electronic circuits.
The small-signal model is then created by replacing the nonlinear device with its linearized equivalent circuit.This equivalent circuit typically consists of linear elements, such as resistors, capacitors, and voltage sources.
To analyse how this circuit responds to small changes, we can create a simplified model.This simplified model introduces small adjustments to the original circuit's control settings, internal conditions, and external inputs.Normally, these variables consist of a constant value (DC component) and a tiny variation around that value.By focusing on these small variations, we can analyse how the circuit behaves near its normal operating point where V a and V b stand for the DC source 1 and DC source 2's respective steady-state (DC element) voltages.Respectively.Additionally, the small-signal duty cycles of States 1 through 3 are represented by δ 1 to δ 3 .V Ca and V Cb denote the steady-state voltages across C a and C b , respectively.Similarly, I La and I Lb represent the steady-state current flowing through L a and L b .Additionally, d 1 to d 3 correspond to the steady-state duty cycle of State-1 to State-3.Furthermore, i La and i Lb are the small-signal current flowing through L a and L b , while the small-signal (perturbation component) voltages of the DC source 1 and DC source 2 are represented by v a and v b Lastly, v ca and v cb denote the small-signal voltages across C a and C b ,respectively.
General state-space representation Introducing perturbations into Eqs.( 34)-( 36), the resultant state-space illustration is expressed by the following Eqs.(39) and (40)   By comparing Equation general state-space illustration as shown in Eq. ( 38) with the Eqs.(39) and (40).The state vector matrix x represents the small-signal model, the system matrix Â , the first derivative of the small-signal state vector matrix x , the input matrix B , the output matrix Ĉ and the feedforward matrix D , The input vector matrix for the small-signal model is denoted as û , and the output vector matrix is represented by ŷ respectively, The characteristic equation is Vca+Vcb Lb 0 0 Compare Eq. ( 39) with the equation below: The Routh-Hurwitz stability criterion (RHSC) offers a method to determine the stability of a linear system without directly calculating its poles.Instead, RHSC relies on the coefficients of the characteristic equation.Given that the system under consideration is of fourth order, employing the R-H stability criterion proves advantageous over a pole-zero plot.This strategy circumvents the challenge of dealing with zeros and poles in higher-order systems.Below is the R-H stability criterion Table .2 illustrating the stability analysis for the proposed configuration.

Stability validation
Stability verification is accomplished by examining the parameters in Table .4 and solving for the coefficients in Characteristic Eq. ( 42).This calculation yields the coefficients of the characteristic equation, allowing us to assess the system's stability.The below is shown that characteristics equation of the proposed system.R-H stability criterion.

Steady-state modelling
Steady-state modelling of DC source 1 ( v a ) and DC source 2 ( v b ) hybrid system can be used to design the system parameters to achieve the desired output voltage and current, even under varying operating conditions.Consider that V a and V b are the steady-state DC source 1 and DC source 2 voltages, respectively.V La and V Lb are the volt- age across in steady state L a and L b , respectively, and IL a and IL b are the current flowing in steady-state through L a and L b , respectively.V Ca and V Cb are the voltage across in steady state C a and C b , respectively, and IC a and IC b are the current flowing in steady-state through C a and C b , respectively.ID a and ID b are the current flowing in steady-state through diodes Diode a and Diode b.I a and I b are the current flowing in steady-state from the source DC source 1 and DC source 2, respectively.From Eqs. ( 1)-( 5), ( 10)-( 13), ( 17)-( 21) and ( 24)-( 27

Designing capacitors and inductors
The precise choice of capacitors and inductors is pivotal in shaping the system's performance, facilitating its operation in the specified conduction mode.The careful selection of these components allows for fine-tuning the system's characteristics, ensuring optimal functionality and adherence to the desired operational mode.This deliberate approach to capacitor and inductor selection significantly influences the overall performance and efficiency of the configuration.The value of La is provided by Eq. (56).
The change in I La , denoted as ∆ I La , can be expressed as given in Eq. ( 57).
The value of L b is provided by Equation ( 58) The change in I Lb , denoted as ∆ I Lb , can be expressed as given in Eq. ( 59).
The value of Ca is provided by Equation ( 60) The change in V Ca , denoted as ∆ V Ca , can be expressed as given in Eq. ( 61).
The value of C b is given by Equation ( 62) The change in V Cb , denoted as ∆ V Cb , can be expressed as given in Eq. ( 61). (47)

Possible operating scenarios
The suggested configuration offers versatility by supporting operation in three distinct modes, each characterized by its unique output voltage equations, as outlined in Table 3. where D 4 represents the duty ratio associated with switch M 4 , and, respectively, D 1 , D 2 , and D 3 are the duty ratios of switches M 1 , M 2 and M 3 , respectively.

Results
The resulting waveforms presented here serve as empirical evidence supporting our assertion of high gain and efficiency.This dynamic modelling approach enhances our understanding of the converter's operation, reinforcing our claim of superior performance across diverse scenarios.The projected converter is designed for an output power of 100 W, with an output voltage of 54 V.With input voltages of 12 V and 24 V, they can be produced at a duty ratio of 25%.The load resistance is calculated using the basic formula as 29.1 Ω.To reduce the converter      size, it is advisable to take higher switching frequencies (f s ), however, for the proposed simulation and design 50 kHz includes Two inductors and Two capacitors.With the considerable current and voltage ripples on the inductors and capacitors, respectively.The energy component values are calculated and are observed in Table 4.

Theoretical calculations
We explore the theoretical calculations for the proposed converter, examining three distinct cases.For each case, the theoretical framework is summarized in the Table 5.

Case-1
In this case, the DC source 1 acts as the primary source, providing an input voltage of 12 V and yielding an output voltage of 36 V. Switches M 1 and M 4 are both in the ON state, with a duty ratio of 0.25 for M 1 and 0.75 for M 4 .
The Simulink diagram for Case-1 is depicted in Fig. 7.While Figs. 8 and 9 depicts the corresponding output voltage and output current waveforms.From the waveforms, the rise time can be determined as 0.002 s and the settling time is 0.014 s.In this case, the DC source 1 acts as the primary source, providing an input voltage of 24 V and yielding an output voltage of 72 V. Switches M 2 and M 4 are both in the ON state, with a duty ratio of 0.25 for M 2 and 0.75 for M 4 .The Fig. 10 displays the Simulink diagram for Case 2. While Figs. 11 and 12 depicts the corresponding output voltage and output current waveform.

Case-3
In this case, the DC source 1 acts as the primary source, providing an input voltage of 36 V and yielding an output voltage of 108 V. Switches M 3 and M 4 are both in the ON state, with a duty ratio of 0.25 for M 3 and 0.75 for M 4 .The Fig. 13 displays the Simulink diagram for Case 3.While Figs. 14 and 15 depict the corresponding output voltage and current waveform.This Table 6 comprehensively compares the parameters of performance for each of the three instances, including input voltage, input current, input power, output voltage, output current, output power, efficiency, and ripple factor.
We have examined each of the three cases from the preceding discussion individually.The Simulink diagram presented visually represents the proposed converter, which incorporates inductors, capacitors, diodes, four switches with phase delay, and is powered by both DC source 1 and DC source 2. The Fig. 16 displays the Simulink diagram for proposed converter.
Figure 17 represents the input DC voltage waveform and Fig. 18 represents the input current plotted using MATLAB simulation.A 12 V & 24 V DC input voltage is considered when designing the proposed topology.Similarly, it can be observed that the input current waveform is continuous.Figure 18 shows that the input current never reaches zero, indicating continuous current conduction from the input.The observed current interval from 1 to 200.
The inductors L a & L b are charged when the active switches are in ON state and they will discharge their energy when the active switches are in OFF state.Figure 19 shows the simulated inductor ( L a ) current wave- forms and inductor voltage waveforms, respectively under steady-state operation.Figure 20 shows the simulated inductor(b) current waveforms and inductor voltage waveforms under steady-state operation.The capacitor C a and C b discharge the energy when the active switches are turned on, and charges when the switch is turned off.The capacitor voltage waveforms can be observed in Figs.23 and 24.The capacitor current waveforms can be observed in Figs. 25 and 26.Under the steady state condition, the graph shows a stable output.Figure 19 shows the current from 10 to 12 during the time interval between 0.1664 and 0.1666, whereas the voltage from − 100 to 40 during the time interval between 0.1664 and 0.1666.Under the steady state condition, the graph shows a stable output.Figure 20 shows the current from − 8 to − 2 during the time interval between 0.0667 and 0.0668, whereas the voltage is from − 100 to 0 during the time interval between 0.0667 and 0.0668.
Under the steady state condition, the graph shows a stable output.Under the steady state condition, the graph shows a stable output.Figure 22 shows the capacitor ( C b ) voltage from 0 to 150 during the time interval between 0.0845 and 0.0846, whereas the capacitor ( C b ) current from 0 to 30 during the time interval between 0.0845 and 0.0846.
The Gate pulse of switches with phase delay is shown in Fig. 23.The switches are operated with a duty ratio of 25% and they are turned ON and OFF (altered for 50,000 times in a second) i.e., switching frequency is 50,000 Hz.
The voltage and current across the diodes are shown in Fig. 24.The diodes are operated with a duty ratio of 25% and they are turned ON and OFF (altered for 50,000 times in a second) i.e., switching frequency is 50,000 Hz.In Fig. 24, the negative voltage across diode ( d a ) is attributed to three specific cases.This occurs when the current through the diode is zero, indicating that the diode is in a reverse bias state.
In Fig. 25, The diode is initially reverse-biased, and the current is zero.At around 0.1 s, the diode becomes forward-biased, and the current begins to flow.The current increases rapidly to a peak value of 0.05 A at around 0.15 s.
Finally, the simulated output waveforms are shown in the Figs.26 & 27 of the proposed converter.For a 100 W power, the proposed converter is designed with an output voltage of 108 V.A load of 29.1 Ω resistance is used at the output and hence the DC output current can be given as 3.468 A theoretically.Figures 26 & 27 shows the simulated output voltage waveform and DC current voltage waveform.The simulated value is approximately 100.02 V and is much closed to the computed theoretical value.Figures 26 & 27 show that the input and output voltage waveforms of the proposed converter are related.At a frequency of 50 Hz and a duty cycle of 0.25, the output voltage consistently reaches 100 V and 3.58A.

Performance of proposed converter
An analysis is conducted on the suggested converter's efficiency, ripple factor, output power, output current, output voltage, and the voltage stresses placed on the active and passive parts.The simulated values for various duty ratios for various circumstances are shown in Tables 7, 8 and 9.
From Table 7, the analysis of the Multi-Input SEPIC converter's performance at various duty cycles sheds light on its operation.At lower duty cycles, such as 0.1, it attains peak efficiency of 95.23% and demonstrates a low ripple factor, indicating optimal performance.However, as the duty cycle increases beyond 0.4, both efficiency and ripple factor deteriorate significantly.Input and output currents remain relatively stable across different duty cycles, while the input voltage remains constant at 12 V.This analysis underscores the critical importance of carefully selecting the duty cycle to fine-tune the Multi-Input SEPIC converter's efficiency and ripple characteristics for specific applications.
From Table 8, the analysis of the Multi-Input SEPIC converter's performance at various duty cycles sheds light on its operation.At lower duty cycles, such as 0.1, it attains peak efficiency of 96.3% and demonstrates a low ripple factor, indicating optimal performance.However, as the duty cycle decreases beyond 0.4, both efficiency and ripple factor deteriorate significantly.Input and output currents remain relatively stable across different duty cycles, while the input voltage remains constant at 24 V.This analysis underscores the critical importance of carefully selecting the duty cycle to finetune the Multi-Input SEPIC converter's efficiency and ripple characteristics for specific applications.
From Table 9, the analysis of the Multi-Input SEPIC converter's performance at various duty cycles sheds light on its operation.At lower duty cycles, such as 0.1, it attains peak efficiency of 96.66% and demonstrates a low ripple factor, indicating optimal performance.However, as the duty cycle increases beyond 0.4, both efficiency and ripple factor deteriorate significantly.Input and output currents remain relatively stable across different 28.Relationship between input power and different duty ratios.
between output voltage and different duty ratios.duty cycles, while the input voltage remains constant at 36 V.This analysis underscores the critical importance of carefully selecting the duty cycle to fine-tune the Multi-Input SEPIC converter's efficiency and ripple characteristics for specific applications.
It can be observed that the highest efficiency point is achieved at duty ratio 0.1 < d > 0.75.The proposed converter is designed with duty ratio of 25% but the highest efficiency point might occur at this duty ratio.It is also observed that the efficiency is quite higher (96%) even at lower duty ratios i.e., from 10 to 75%.And the ripple factor is under the universal limit point that is below 10% percent up to the duty ratio of 75%.
Figure 28 shows the Input power for three cases with different duty cycles.It is observed that the Input power remains constant for various duty cycles, ranging from 0.1 to 0.75, in all three cases.
The output voltage for three scenarios with various duty cycles is displayed in Fig. 29.In all three scenarios, it is seen that the output voltage stays constant across a range of duty cycles, from 0.1 to 0.75.
Figure 30 shows the Output power for three cases with different duty cycles.It is observed that the Output power remains constant for various duty cycles, ranging from 0.1 to 0.75, in all three cases.

Comparisons with existing topologies
The Table 10 initially shows that the proposed converter can be compared with various traditional converters, offering significant advantages and finding numerous applications 31 .This proposed converter features an equal number of sources, high efficiency, and fewer diodes and relays.It also exhibits lower voltage stress than other converters 34 .In terms of the number of power switches (bidirectional), it stands out by requiring only two switches, while other converters typically have more 36 .The Multi-Input SEPIC converter boasts fewer diodes compared to traditional converters, which often require 5 or 3 diodes 33 .Furthermore, the Multi-Input SEPIC converter achieves an efficiency of over 96%, surpassing the lower efficiency percentages of 95%, 94%, and 88%-94% seen in other converters 35 .When comparing these aspects with the Multi-Input SEPIC converter, it becomes evident that it excels in numerous aspects and applications 34 .Figures 33, 34

Conclusion
In conclusion, our study presents a highly efficient SEPIC converter integrated with a multi-input DC-DC configuration for DC microgrid management.Using Simulink in MATLAB, we verified its ability to provide continuous power to the load by utilizing both a DC source 1 and DC source 2. The configuration versatility allows operation across a wide range of output voltages while maintaining effective power regulation.Various modelling techniques were employed to ensure precise design and analysis, including Average large-signal, small-signal, and steady-state modelling.Stability was assessed using the R-H stability criterion, and the output voltage expression was derived from steady-state modelling.Our study discusses the converter's operation and the role of switches in power transmission from single or dual sources.Efficiency comparisons with established converter topologies demonstrated an impressive 95% efficiency at rated load, with minimal system losses.The Multi-Input SEPIC converter's effectiveness, design, performance, and stability insights position it as a promising solution for efficient DC power microgrid management.Its potential for sustainable and reliable power supply solutions becomes particularly evident when integrated with renewable energy sources.

Figure 2 .
Figure 2. Operation of state-1 of the proposed converter.

Figure 3 .
Figure 3. Operation of state-2 of the proposed configuration.

Figure 4 .
Figure 4. Operation of state-3 of the proposed converter.

Figure 5 .
Figure 5. Operation of state-4 of the proposed configuration.

Figure 16 .
Figure 16.Simulink schematic for the proposed converter.

Figure 18 .
Figure 18.Simulated waveform of the input DC Current.
Figure 21 shows the capacitor ( C a ) voltage from 20 to 45 during the time interval between 0.0606 and 0.0608, whereas the capacitor ( C a ) current from 0 to 25 during the time interval between 0.0606 and 0.0608.

Figure 23 .
Figure 23.Simulation waveform of Gate pulse for Switch.

Figure 24 .
Figure 24.Simulation waveform of Diode a voltage and current.

Figure 25 .
Figure 25.Simulation waveform of Diode b voltages and current.

Figure 26 .
Figure 26.DC output voltage waveform of proposed topology.

Figure 27 .
Figure 27.DC output current waveform of proposed topology.

Figure 30 .
Figure 30.Relationship between output power and different duty ratios.

Figure 31 .
Figure 31.Relationship between efficiency and different duty ratios.

Figure 32 .
Figure 32.Relationship between ripple factor and different duty ratios.
, and 35 present a comprehensive comparison of various converters with the proposed Multi-Input SEPIC converter across different aspects.The data clearly demonstrates that the Multi-Input SEPIC converter out performs all traditional converters.

Figure 35 .
Figure 35.Comparison between output voltage for different topology.

Table 1 .
Different states of the proposed configuration.

Figure 6 .
Theoretical waveforms of the proposed converter.In State-2, the switches M 2 and M 4 are in the ON condition and M 1 , M 3 Diode a and Diode b are inactive.Dur- ing the operating phase from t 1 to t 2 Cb have slope that given by −v o RCb .Additionally, capacitors C a undergoes discharge, assisting L b , with the slopes of the capacitor voltages v Ca determined by −i Lb Scientific Reports | (2024) 14:11066 | https://doi.org/10.1038/s41598-024-61713-zwww.nature.com/scientificreports/voltage v 4 × 4 identity matrix, designated as I, and the Laplace transform variable S.

Table 3 .
Operating cases of the proposed configuration.

Table 5 .
Theoretical calculations for three different cases.

Table 6 .
Practical calculations for three different cases. CasesV

Table 7 .
Simulated parameters for various duty ratios for case-1.

Table 8 .
Simulated parameters for various duty ratios for case-2.

Table 9 .
Simulated parameters for various duty ratios for case-3.