Highly reproducible and CMOS-compatible VO₂-based oscillators for brain-inspired computing

Abstract

With remarkable electrical and optical switching properties induced at low power and near room temperature (68 °C), vanadium dioxide (VO₂) has sparked rising interest in unconventional computing among the phase-change materials research community. The scalability and the potential to compute beyond the von Neumann model make VO₂ especially appealing for implementation in oscillating neural networks for artificial intelligence applications, to solve constraint satisfaction problems, and for pattern recognition. Its integration into large networks of oscillators on a Silicon platform still poses challenges associated with the stabilization in the correct oxidation state and the ability to fabricate a structure with predictable electrical behavior showing very low variability. In this work, the role played by the different annealing parameters applied by three methods (slow thermal annealing, flash annealing, and rapid thermal annealing), following the vanadium oxide atomic layer deposition, on the formation of VO₂ grains is studied and an optimal substrate stack configuration that minimizes variability between devices is proposed. Material and electrical characterizations are performed on the different films and a step-by-step recipe to build reproducible VO₂-based oscillators is presented, which is argued to be made possible thanks to the introduction of a hafnium oxide (HfO₂) layer between the silicon substrate and the vanadium oxide layer. Up to seven nearly identical VO₂-based devices are contacted simultaneously to create a network of oscillators, paving the way for large-scale implementation of VO₂ oscillating neural networks.

Introduction

With phenomenal computing and learning capabilities far beyond the fastest chips, the brain remains today the most power-efficient computational system. Implementing brain-like circuitry for faster less power-hungry massive data processing drives the industry to downscale CMOS technology and innovate towards new ‘neurmorphic’ materials. Research surrounding phase-change materials has demonstrated their ability to mimic some of the brain’s elemental operations, both synaptic and neuronal. For example, the most recent work on Ge₂Sb₂Te₅ memories enables vector–matrix multiplication for in-memory computing, implemented in a spiking neural network (SNN) ¹. This type of phase-change spiking system is ideal both for powering biologically-realistic AI applications and for its technological potential in terms of integration at the back-end-of-the-line. Recently, an analogous computing technique based on another phase-change material system offering comparable benefits has sparked a growing interest among several research groups ^2,3,4. The ambition is to unravel further the potential of phase-change materials by using oscillation-based computing, inspired by the rhythmic patterns of action potentials exhibited by neurons during the learning phase ⁵. This approach provides new computational paradigms for bio-inspired applications.

In an oscillating neural network (ONN), the information is carried in the phase relations between coupled oscillators rather than in the amplitude of the signals, making them intrinsically resistant to voltage-scaled noise and typical input pattern distortion problems in Machine Learning (ML) ⁶. This method has demonstrated the potential to perform all types of arithmetic computation and shows the promise of major computational improvements, especially for optimization tasks, Boolean satisfiability (3-SAT) problems, and Ising machine problems ^3,4,5,7,8. Typically, finding the best solution to optimization tasks in traditional computers demands a tremendous amount of power and far larger computing times. A lightweight hardware design with phase-change material electronics offering moderate accuracy performed locally in-memory is often sufficient to find a suitable solution to common industrial operations ⁴. Additionally, computing with ONNs avoids the von Neumann bottleneck energy costs arising from data transfer from the memory unit to the processor by embracing the fundamental principle of in-memory computation: “let physics do the computing” ^4,8,9. Consequently, an ONN architecture built with nanoscale oscillators and compact high-fanout interconnections should be favored to allow for a richer representation of information while avoiding long-range power-hungry coupling between devices ^2,10,11.

Assembling an ONN depends on the successful fabrication of individual oscillators with predictable and reproducible behavior. An ideal oscillator needs to be scalable, offering easy integration on a Silicon (Si) platform, power-efficient, endurant, and operable at high frequency. Niobium oxide ¹² (NbO₂), magnesium-oxide-based magnetic tunnel junction ¹³ (MgO-based STO), and vanadium dioxide ¹⁴ (VO₂) all exhibit oscillatory capabilities, with the latter being the leading candidate thanks to the low power required to trigger a high-frequency resistive switching near room temperature (68 °C) ^14,15. The source mechanisms behind VO₂’s switching behavior are still being debated in the research community. For most studies, it originates between a Peierls and a Mott phase transition ¹⁶. This little understanding on VO₂’s intrinsic phase-transition nature as well as the complexity required to connect several devices for the integration of a large-scale ONN has limited most of the research to simulation-based results or generally, to the study of only two coupled VO₂-based oscillators ^15,17,18. In addition, the high variability between VO₂-based oscillators, originating from the multitude of metastable vanadium oxide oxidation states generated during fabrication, has been reported to be a main limiting factor for advancing full hardware-based ONN approaches. For example, in Won et al.¹⁹ and Pósa et al.²⁰, it is demonstrated that even the highly controllable magnetron sputtering deposition technique encounters challenges in growing pure VO₂ on a silicon dioxide (SiO₂) substrate. In fact, the variable VO₂ transition temperatures obtained in Pósa et al.²⁰ make devices fabricated by magnetron sputtering difficult to scale to nanodimensions and unfit for the large circuit implementation we are targeting. Other studies ^{3,21,22,23,24} also established that the fabrication of VO₂ layers on amorphous substrates through pulsed laser deposition, chemical vapor deposition, sputtering, and ALD tends to result in polycrystalline films with granular structure and considerable surface roughness ²⁵. The fabrication challenges associated with VO₂ deposition (magnetron sputtering or PLD-deposition ²⁰) include the coexistence of several compositions, such as the Magneli (V_nO_2n−1, where 3 ≤ n ≤ 9) and the Wadsley (V_nO_2n+1, where n = 1–6) phases that are all—including VO₂—intermediary phases towards the most thermodynamically stable stoichiometry of V₂O₅ ^20,26. Additionally, achieving precise control over the oxidation state, topography, crystal orientation, and degree of crystallinity in VO₂ crystals poses challenges in fabricating devices with high performance yields ^27,28,29. These morphology challenges have been shown to contribute to the undesired variability among electrical VO₂-based oscillators ³⁰.

In an effort to mitigate this variability and produce CMOS process-compatible vanadium-oxide oscillators to build ONNs, we study the advantages of several annealing techniques post-ALD deposition on different stacks where we fine-tune their respective parameters ²². We focus our analysis on the nanoscale granular morphology of the layer, as previous work ^6,30 has demonstrated that it has the greatest impact on the transition characteristics and performance of our developed VO₂ devices. We also look into inhomogeneities resulting from variations in chemical composition and the coexistence of other oxidation states of vanadium oxide, as they are expected to contribute to device variability ²⁶. In this work, we investigate the influence of the annealing parameters on the VO₂’s nanoscale structure and composition through Atomic Force Microscopy (AFM), Raman Spectroscopy, and X-ray reflectometry (XRR), as well as the VO₂’s resulting electrically prompted crystalline phase transition. Our goal is to obtain a granular film of high quality, which we define as a dense layer of compact grains with smooth surface roughness, uniform and reproducible electrical behavior showing a sharp and narrow resistance–temperature (R–T) hysteresis ²³. Finally, we also exploit the properties of different metal-oxides to study, influence, and engineer the crystalline phase-change temperature, opening the door for wider industrial applications where the thermal budget caused by the heat of the operating peripheral circuitry is limited ³¹. We show how the results obtained can be extended to various device topologies where layers are staked between electrodes to realize a network of VO₂ oscillators.

Methods

Vanadium oxide film deposition

Vanadium oxide can be synthesized through numerous methods, including gas-phase techniques like pulsed laser deposition (PLD), chemical vapor deposition (CVD), sputtering, and atomic layer deposition (ALD) as well as solution-based methods, such as sol–gel processes and hydrothermal synthesis. While magnetron sputtering is a widely-used deposition technique, the high energy of the deposited particles leads to limited results for vanadium oxide films below 100 nm ³². To achieve scalable ultrathin films suitable for low-power applications, gas-phase techniques offer better results ^26,32. These methods are well-suited for forming thin layers directly on a heated substrate in the presence of an appropriate process gas or in a two-step process with an annealing step following the deposition.

We use ALD for our depositions, as it provides uniform growth on high aspect ratio nanostructures, homogeneous deposition over a large area, and CMOS compatibility with the possibility to co-integrate the grown material on top of underlying pre-existing circuitry ^29,33. We apply the novel Tetrakis[ethylmethylamino] vanadium (TEMAV) reaction on a Si platform, which calls for the presence of an inert carrier gas (Argon) and an oxidation agent (water) to coat uniformly and quickly ²⁹. We prefer a dense water-grown film over an ozone-grown layer, as it was shown to more likely give rise to VO₂ grains in the M1 crystallization phase after a post-annealing treatment ^28,29. Our process occurs at 150 °C to prevent the material (98% TEMAV) from being too volatile at low temperatures or from thermal decomposition at temperatures higher than 175 °C ²⁹. The in-house recipe deposition rate is about 0.5 Å per cycle (30–40 s), including a sequence of dosing-purging steps that keep the pressure in the chamber below 11 Pa. The final thickness of the layer is 60 nm, as confirmed by XRR measurements (Table 1).

After the ALD process, a post-deposition treatment at temperatures above 420 °C is necessary to transform the film into the desired oxidation state (VO₂) ²⁹. The ALD process alone provides a highly homogeneous vanadium-oxide layer but lacks sufficient control over crystallinity, stoichiometry, and phase required for the devices ²⁹. The necessary post-deposition annealing step typically degrades the film’s morphology, and the effect is even stronger in thin films where the impact is directly measurable on the metal-to-insulator temperature (MIT) and on the properties of the VO₂ ³⁴. Our aim is to reduce the rough morphology obtained after annealing, which can be attributed to a volume change associated with the de-wetting process of the dielectric surfaces during annealing ²⁹.

Slow thermal annealing (STA)

The Neocera Combinatorial 180 PLD system used for this method offers a precise control over the oxygen pressure with heating and cooling temperature ramps limited to a maximum of 25 °C min⁻¹. The films were brought to a set temperature of 520 °C at the sample holder, corresponding to a temperature of about 420 °C in the sample, with an oxygen flow defined to keep the pressure at 5 Pa at the highest temperature setpoint. Increasing the temperature beyond this point induces the crystallization of large grains and can raise the final oxidation state ²⁹. Upon reaching the set temperature of 520 °C, the samples were kept in the heating chamber for 5 to 10 min, before being cooled back down to room temperature.

Flash annealing (FLA)

High heating and cooling rates during the annealing process offer increased control over the grains’ nanostructure ³⁵. In the early stages of phase formation, nucleation occurs, and a rapid heating rate within the sample affects both grain growth and density, resulting in a smoother film with small compact structures ³⁵. Other experiments have also shown that a flash annealing step could improve the film smoothness and transition sharpness ³⁶.

Using the flash lamp FLA-50AS, Dresden Thinfilm Technology, we investigate the possibility of growing small grains with the energy of a flash only. The flash is 20 ms long, with a power between 90 and 110 J cm⁻². The samples were preheated with a thermally regulated Si carrier wafer at a fixed temperature, ranging between 140 °C and 330 °C. This tool provides heating and cooling rates orders of magnitude faster than the STA, where exact values can only be estimated. The tool allows for oxygen pressure to be constrained within the range of 1.33 Pa to 66.66 Pa.

Rapid thermal annealing (RTA)

To achieve control over the grains' structure through rapid thermal rates, while still maintaining atmospheric conditions suitable for VO₂ growth, we used the ANNEALSYS AS-Micro RTP-System to explore rapid thermal annealing ^26,35. The samples were placed in a chamber and stabilized to a temperature of 300 °C, before being rapidly brought up to the final annealing temperature. The oxygen partial pressure, between 5 and 25 Pa, was maintained through a continuous flow, and annealing times varied from 30 to 600 s. This last technique combines the benefits of the STA and Flash annealing techniques by offering ultralow partial pressures with a heating rate of 18 °C s⁻¹.

Device configuration

A planar configuration (see Fig. 2c, with corresponding scanning electron microscopy (SEM) image in Fig. 1c) was chosen for the fabrication of rectangular test structures with active region dimensions varying between 400 × 400 × 60 nm³ and 2000 × 2000 × 60 nm³. The irregularity of the grains at the nanoscale can define a preferential current path in the device, as observed by X-ray diffraction (XRD) nanoimaging in Shabalin et al.²⁴. The advantage of this device geometry consists in few processing steps, offering a top view of the grains involved in the phase transition. However, this implies that a different preferential current path is created in each device, which is the source of significant variability. These tests structures are convenient to verify the reliability of our annealing process and to perform material characterization with a fast turnaround. To achieve coupling between oscillators, the crossbar configuration shown in Fig. 1d is preferable, as it confines the current path within the intersection of the cross-section between a top and a bottom electrode (see Fig. 2c).

Figure 1

VO₂ grown by STA. (a) AFM measurements of an STA treated VO₂ film on a 1 μm thermal SiO₂ substrate grown with different annealing parameters. Sample A: 520 °C, 5 Pa O₂ pressure, 5 min long annealing. Sample B: 520 °C, 5 Pa O₂ pressure, 10 min annealing time. Sample C: 540 °C, 5 Pa O₂ pressure, 5 min annealing time. (b) R–T characteristics of VO₂ crossbar devices (active area: 200 nm × 200 nm × 60 nm) fabricated from Sample A. The variation in grain morphology and stoichiometry, as discussed in the following sections, causes the grains to switch at different temperatures, leading to jumps in the hysteresis curve. SEM images of a VO₂ planar device (active area: 2 µm × 700 nm × 60 nm) in (c) and a crossbar device (active cross-section area dimensions: 200 nm × 200 nm × 60 nm) in (d).

Figure 2

VO₂ grown by FLA and RTA. (a) R–T characteristics of samples FLA annealed with the conditions: Pre-flash temp: 250 °C, 26.66 Pa O₂ pressure, 20 ms long annealing:, Flash power: 90 J cm⁻². The transition of 1.5 orders of magnitude around 58 °C is highlighted with a dashed line. Raman spectra of vanadium-oxide samples grown on 1 μm thermal SiO₂ pre-heated at different temperatures before being flashed: Pre-flash temp: 185–250 °C, 26.66 Pa O₂, 20 ms long annealing, Flash power: 90 J cm⁻². Minimum substrate temperature required to anneal amorphous VO_x into VO₂: 215 °C. AFM measurements of the samples pre-heated at different temperatures. (b) R–T characteristics of VO₂ crossbar devices (active area: 750 nm × 750 nm × 60 nm) grown on a 1 μm SiO₂ substrate. The variability between the insulating and metallic-state resistances (ΔR_ins = 2.36 × 10⁶ Ω µm and ΔR_met = 9.22 × 10⁴ Ω µm, respectively) is marked. AFM imaging and Raman spectroscopy of the VO₂ sample RTA annealed with the conditions: Temp: 470 °C, O₂ pressure: 5 Pa, Annealing time: 10 min. (c) Schematic representations of a planar VO₂ device and a crossbar VO₂ device with preferential current paths in purple.

The thickness of the VO₂ layer defines a current path and the amount power required to induce the phase transition. A 50 nm thick bottom electrode (3 nm Titanium (Ti)/47 nm Platinum (Pt)) was embedded into the substrate if it was at least 50 nm thick through an e-beam lithography step followed by a dry etch. In the case of a thin substrate (SiO₂ < 50 nm), the bottom electrodes were deposited directly on the substrate.

It should be noted that the planar and crossbar device configurations lead to different performance results. For instance, the crossbar configuration excels in localizing the current path, but assessing the film quality where the phase-transition occurs remains challenging due to characterization limitations. Evaluation at larger scales non-invasively through XRD, XRR, or Raman spectroscopy techniques is necessary, and device performance is subsequently correlated with these measurements under reasonable assessments.

Results

Different annealing techniques are explored to achieve high VO₂ granular quality. Synthesizing films in the VO₂ oxidation state only is limited by a fine window of homogeneity and a high sensitivity to the oxygen partial pressure during the thermal treatment ³⁷. These challenges have a direct impact on the reproducibility of the film's granular composition and surface roughness that affects the overall electrical performance ³⁷. A compact and dense layer of small grains favors low variability between devices ²³.

Synthesizing this reproducible VO₂ layer with small and compact grains relies on precise control of annealing parameters, including temperature, time, heating/cooling rates, and oxygen partial pressure. Decoupling the effect of each parameter proves difficult due to the complex chemical and physical mechanisms happening during annealing. Therefore, we assess the overall impact of these parameters on the grains’ morphology, oxidation phase, and surface roughness ex-situ and post-treatment through XRR, Raman, and AFM measurements.

We investigate the potential of three post-deposition annealing techniques to grow polycrystalline VO₂ for our oscillators. These techniques provide varying degrees of control over the annealing parameters.

VO₂ grown by slow thermal annealing (STA)

The AFM micrographs shown in Fig. 1a correspond to VO₂ samples A, B, and C grown directly on a 1 μm thick SiO₂ substrate. Various annealing treatments applied to the samples lead to nanoscale VO₂ grains of different dimensions. Samples A, B, and C were annealed at 520 °C, 520 °C, and 540 °C for 5 min, 10 min, and 5 min, respectively. Samples annealed at temperatures below 520 °C did not grow VO₂ grains. The conditions that lead to the smoothest film with the lowest surface roughness value (RMS) involve a short annealing time of 5 min at a set temperature of 520 °C, achieved with a ramp rate of 25 °C min⁻¹ under an oxygen partial pressure of 5 Pa. In addition to these conditions, our findings in Fig. 1 reveal that VO₂ grows a rougher surface when there is an increase in annealing temperature or time, due to the formation of larger grains. This is consistent with similar results found in other studies^26,35,38.

Figure 1b shows the R–T characteristics of crossbar devices of identical dimensions (active area of 200 nm × 200 nm × 60 nm) fabricated from the smoothest film (sample A). The high variability among the samples is evident in both the jumps observed in the hysteresis curves, attributed to grains of various morphology switching at different temperatures, and the different resistivity values in the insulator and metallic states. The annealing conditions employed to fabricate these devices served as an initial reference for further optimization using alternative annealing methods.

VO₂ grown by flash annealing (FLA)

Figure 2a shows the Raman spectra of films annealed with a flash power of 90 J cm⁻² and an oxygen pressure of 20 Pa at chuck temperatures ranging from 185 °C to 250 °C. The results indicate that pre-heating the sample at least to 215 °C is necessary to measure the characteristic VO₂ Raman peaks at 193 cm⁻¹ and 223 cm^{−1 39}. As the chuck temperature is raised above 215 °C before flashing, the intensity of the Raman peaks grows, indicating a greater amount of the initially amorphous material successfully crystallizes into VO₂ grains. A lower ratio of the intensity of the main Raman peaks (193 cm⁻¹ and 223 cm⁻¹) relative to the intensity of the weakest peaks (389 cm⁻¹, 497 cm⁻¹, 612 cm⁻¹, …) in VO₂ is also associated with an increase in surface roughness in our samples ⁴⁰. The presence of V₂O₅ is detected (145 cm⁻¹) when the pre-heating temperature is 250 °C or higher.

In Fig. 2a, the average grain diameter size (μ) and mean surface roughness (RMS) values extracted from AFM are plotted against the chuck temperature before flash annealing. The grain size remains stable around 25 nm across all temperatures, while the surface roughness consistently increases with the substrate temperature. These trends suggest that only the surface roughness is influenced by an increase in substrate temperature. This observation is also supported by the sharper peaks measured by Raman spectroscopy at higher chuck temperatures (see Fig. 2a). Comparing results in Fig. 1a to Fig. 2a indicates that flash annealing reduces surface roughness by over 50% compared to STA-annealed samples.

Figure 2a also shows 4-probe measurements performed on samples with the highest crystallized material content (pre-flash temperature: 250 °C). For the other samples with chuck temperatures below 215 °C, no resistive switching behavior was measured, which is consistent with the Raman spectra in Fig. 2a.

A change in resistivity of nearly 1.5 orders of magnitude is observed in Fig. 2a, with a hysteresis width of 6 °C and an IMT at 58 °C. This temperature is considerably lower than the typical 68 °C for VO₂ prepared by STA. This difference may arise from the presence of lattice defects, resulting from various phenomena such as low-angle grain boundaries, twinning, interface dislocations, or surface roughening ^41,42. The strain induced by relaxation paths, often challenging to monitor, could also influence the transition behavior of the annealed layer ⁴². Studies ⁴¹ have demonstrated that typical lattice defects in granular VO₂ tend to lower its transition temperature. Additionally, the large transition window observed in Fig. 2a suggests that interactions between grains or between grains and the substrate, possibly through thermoelastic behavior, could elongate the phase-transition hysteresis and reduce the apparent transition temperature ^41,43.

The R–T measurements in Fig. 2a also reveal a substantial variation in the resistivities (both insulator and metallic state) among samples 1 and 2 flash annealed under the same conditions, indicating a low level of reproducibility for this annealing technique.

Although flash annealing significantly reduces surface roughness (AFM measurements in Fig. 2a) compared to samples grown by STA (see Fig. 1a), the variability in grain dimensions, oxidation states, transition temperature, and electrical response between identically treated samples renders flash annealing unsuitable for the fabrication of uniform VO₂-based oscillators.

VO₂ grown by rapid thermal annealing (RTA)

The RTA tool offers O₂ pressure control at a level as low as the STA tool while providing much faster heating and cooling ramps. Table S3 (SI) provides a summary of the various tested recipes, emphasizing whether they meet the required specifications to obtain high-quality VO₂ films for our oscillators. These specifications include the presence of VO₂ stoichiometry confirmed by Raman spectroscopy, layer uniformity, and sample reproducibility.

The AFM measurements in Fig. 2b indicate that the highly reproducible annealing recipe highlighted in Table S3 results in grains as small as those obtained with the slow annealer (see Fig. 1a). Additionally, the surface is nearly as smooth as in samples subjected to flash annealing (Fig. 2a) and the main Raman peaks of VO₂ (193 cm⁻¹ and 223 cm⁻¹) are detected using this recipe (Fig. 2b) ³⁹. Figure 2b shows that the ratio of the intensities of the main Raman peaks to the weaker ones (389 cm⁻¹, 497 cm⁻¹, 612 cm⁻¹, is higher compared to those obtained with flash annealing (Fig. 2a) ³⁹. This suggests a reduced surface roughness ³⁹, which is confirmed by the measurements in Fig. 2b. This annealing technique with the highlighted conditions in Table S3 was selected to realize the VO₂ oscillators.

Figure 2b shows the R–T characteristics of crossbar devices of identical dimensions (active area of 750 nm × 750 nm × 60 nm) fabricated on a chip with these conditions. Despite the ideal structural composition of the film and the smooth transitions observed in the hysteresis curves, which exhibit relatively sharp transitions with a narrow hysteresis window of less than 20 °C for a granular film ^30,36, the devices show variability in their electrical properties. The measured resistivities range from 1.46 × 10⁶ Ω µm to 3.82 × 10⁶ Ω µm (ΔR_ins = 2.36 × 10⁶ Ω µm) in the insulator state, and from 1.88 × 10⁴ Ω µm to 1.11 × 10⁵ Ω µm (ΔR_met = 9.22 × 10⁴ Ω µm) in the metallic state. Given the unavoidable variability between VO₂ devices grown on SiO₂, we investigate, in the next section, the growth of VO₂ grains on different substrate stacks. The objective is to enhance material uniformity and device reproducibility by introducing an interlayer between the VO₂ and the SiO₂ substrate. By leveraging the diverse surface energies of these interlayers, we want to take advantage of the de-wetting angles created between the VO₂ grains and the underlying surface.

VO₂ on metal oxides

Figure 3a shows the normalized R–T characteristics of VO₂ layers in stacks embedding HfO₂, Ti₃O₅, Al₂O₃, or WO_x interlayers (red, green, blue, and orange curve, respectively) annealed for 45 min at 520 °C, along with a reference sample of VO₂ on 1 μm of SiO₂ (black curve). These materials were selected due to their widespread availability in a semiconductor fab environment and their higher surface energies compared to silicon. The longer 45-min annealing ensures the formation of de-wetted VO₂ grains on the interlayers. The presence of a thin 10 nm interlayer significantly alters the R–T characteristics compared to the reference sample (black curve). The VO₂ layer deposited on WO_x exhibits a less steep transition compared to typical samples on SiO₂. On Al₂O₃, the VO₂ layer displays similar hysteretic characteristics to the reference SiO₂ sample, but with a slight shift towards higher temperatures, suggesting it requires higher voltages to trigger its phase transition. Similarly, the Ti₃O₅ interlayer results in an even higher transition temperature accompanied with a narrower hysteresis width. To achieve low-power operation, we discarded Al₂O₃ and Ti₃O₅ as suitable interlayers for the oscillators. Interestingly, the sample with VO₂ on HfO₂ annealed for 45 min shows an increase in the transition temperature of the IMT (80 °C) while keeping the MIT around 68 °C.

Figure 3

VO₂ grown on interlayers. (a) Normalized R–T and (b) Raman spectra for VO₂ samples with 1 μm thermal SiO₂ coated with 10 nm interlayer of either HfO₂ (ALD), Al₂O₃ (ALD), Ti₃O₅ (Evaporated) or WO_x (ALD), STA treated: 520 °C, 5 Pa O₂ pressure, 45 min long annealing. (c)–(f) SEM images of the samples. (g) EDS composition analysis at the interfaces of the sample in (c), revealing that a thin layer of about 8 nm (located between 50 and 60 nm deep from the start of the EDS scan) shows some interplay between VO₂ and HfO₂. (h) Raman spectra, (i) normalized R–T, and (j) AFM measurement of VO₂ samples with 1 μm of thermal SiO₂ coated with either no interlayer (black) or a 10 nm interlayer (red) of HfO₂ (ALD), STA treated: 520 °C, 5 Pa O₂ pressure, 10 min long annealing.

Figure 3b shows the Raman spectra corresponding to the samples with different interlayers. In samples with Al₂O₃ or Ti₃O₅ interlayer, a shift of either one of the two major peaks of VO₂ is observed, suggesting the presence of strain across the VO₂ layer. The characteristic VO₂ Raman peaks at 193 cm⁻¹ and 223 cm⁻¹ are sharp and more pronounced with the HfO₂ interlayer, indicating superior stabilization into the VO₂ oxidation state and more uniform crystallization compared to other interlayers ³⁹. This is an important finding showing that the incorporation of a 10 nm HfO₂ interlayer with high surface energy prevents the complete separation of VO₂ into individual nanocrystals during the annealing process, as observed in previous studies ^6,44.

The results in Fig. 3a–b indicate that long annealing times at high temperatures can be employed to tune the intrinsic properties of VO₂ layer when combined with a metal-oxide interlayer.

To link the differences in R–T characteristics between samples to possible structural differences, we compared the SEM images of the VO₂ on HfO₂, Al₂O₃, Ti₃O₅, and WO_x samples in Fig. 3c–f. These images, along with the corresponding AFM measurements, reveal similar grain size and surface roughness in all samples with various interlayers, suggesting that the observed R–T differences in Fig. 3a might be attributed to variations in the vanadium oxide layer at the interface with the underlying substrate.

To confirm this theory, we investigate the VO₂ to HfO₂ interface for the sample annealed for 45 min at 520 °C, as it shows the largest variation in transition temperature compared to the reference sample on SiO₂ substrate (Fig. 3a, red and black lines, respectively). In Fig. 3g, the transmission electron microscope (TEM) micrograph and energy dispersive spectroscopy (EDS) scans measured on the sample with the HfO₂ interlayer highlight the formation of a thin layer at the VO₂/HfO₂ interface of roughly 8 nm, where both Hafnium and Vanadium are present. This interplay is a possible cause for the increased IMT (red curve in Fig. 3a), bringing more evidence that metal-oxides such as HfO₂ can be combined with long annealing times at high temperatures to engineer the crystalline phase-transition of VO₂. While this constitutes an interesting finding, the primary focus remains on minimizing variability among insulating- and metallic-state resistances, as illustrated in Figs. 1b and 2.

Based on the intensity and sharpness of the Raman peaks in Fig. 3b, HfO₂ emerges as the best interlayer to crystallize high-quality VO₂ grains. Continuing with this interlayer, we now use shorter annealing times to avoid intermixing caused by long annealing at the interface and maintain the IMT close to 68 °C.

Figure 3i shows the R–T characteristics of VO₂ annealed for 10 min on a HfO₂ interlayer and of a reference sample with no interlayer. With this short annealing time, the presence of HfO₂ does not influence the hysteretic width or transition temperatures of VO₂. More importantly, the variability in resistivities observed on the samples grown directly on SiO₂ (reported in Figs. 1b and 2) is greatly reduced across the VO₂ layer when an HfO₂ interlayer is present (see Fig. 7a–c). This leads to the reproducible characteristics presented in the following section. The AFM measurements in Fig. 3j show that the average grain size (38 nm) remains small and the surface, smooth (2.4 nm) in the presence of HfO₂; a finding also reported in Zong et al.⁴⁵

In summary, HfO₂ is the material with the most interesting effect on the formation of VO_2. It preserves its fundamental switching properties in the case of short annealing times (10 min) while achieving high crystalline quality across the entire layer, even without using the optimized RTA annealing technique. In the next section, we perform an XRR and TEM study to explore the reasons why incorporating HfO₂, along with a very thin SiO₂ layer, reduces variability, and thus constitutes the way forward to successfully attain the level of uniformity required to couple VO₂-based oscillators.

Substrate thickness dependence study

Figure 4a–b shows the XRR patterns of samples D and E characterized by a vanadium oxide layer deposited on 1 μm SiO₂, before and after annealing respectively, and Fig. 4c, of sample F using a HfO₂ interlayer after annealing. The XRR measurements are analyzed by fitting a simulated curve, based on a multilayer model, to the measured data ⁴⁶. The structural properties such as density, layer uniformity, and thickness are then compared and linked to the electrical performance of the various samples. Additional information regarding the model's efficacy and sensitivity can be found in the SI. The fits are in good agreement with the experimental datapoints and the outcome of the analysis is reported for all three samples (D, E, and F) in Table 1. For the as-deposited sample D, vanadium oxide does not grow as a single uniform layer. A VO_x layer with a density of 3.9 g cm⁻³, consistent with amorphous vanadium oxide densities, is followed by a second layer with an even lower density of 3.2 g cm⁻³ directly in contact with the SiO₂ ⁴⁷. Following the annealing of sample D, the XRR analysis of sample E shows that, while it crystallized into grains (as evidenced by the increase in density to 4.6 g cm⁻³ in the top layer), the unwanted spurious layer persists and grows thicker, with its density slightly increasing from 3.2 g cm⁻³ (prior to annealing) to 3.9 g cm^{−3 47}. This can be attributed to a non-uniform clustering of the material at the VO₂/SiO₂ interface to form grains of VO₂. The lower density layer cannot be visualized sharply when imaging the samples with the local TEM technique shown in Fig. 5a–c, but it is reflected in several Fast Fourier transform (FFT) plots captured at the interface between the substrate and the VO₂ grains (Fig. 5e–f). Despite the grains being mostly found in a single orientation crystallization as in Fig. 5d, g, amorphous material can still be found at the grain boundaries. The XRR measurement, which measures a wider portion of the sample, suggests that the amorphous material at the grain boundaries extends on average across the whole VO₂/SiO₂ interface. These findings consistently extend to similar samples with intermediate SiO₂ thicknesses down to 50 nm, as discussed in SI. This could also account for the observed differences in resistivity ranges across our samples (Fig. 1b and Fig. 2), as the presence of this spurious layer may introduce varying series resistance levels from one sample to another, causing a vertical shift in the R–T characteristics. The introduction of an HfO₂ interlayer between VO₂ and SiO₂, as in sample F, results in more uniform growth of VO₂ grains across the entire film thickness, as shown by XRR analysis in Table 1. This observation is consistent with previous studies ^45,48 suggesting that HfO₂ can regulate VO₂ crystallinity by promoting the nucleation of grains and reducing boundary defects. Interestingly, in VO₂ films grown on ultrathin (≤ 10 nm) SiO₂ layers on Si substrates, no spurious interfacial layers are detected and the structural properties of the crystallized VO₂ layer compare well with the sample presenting the HfO₂ interlayer. The results are summarized in SI.

Figure 4

XRR measurements. The experimental data (blue line) correspond to a vanadium oxide layer deposited on 1 μm SiO₂ (a) before annealing (Sample D) and (b) after annealing (Sample E). (c) XRR patterns of a VO₂ layer annealed on a 1 μm SiO₂ substrate with a 10 nm thick HfO₂ interlayer (Sample F). Simulation curves (black line) obtained from the multilayer model stacks shown in each figure are used to fit the experimental curves.

Table 1 XRR fit analysis for samples D, E, and F.

Figure 5

TEM analysis of VO₂ grown on SiO₂. (a) TEM image of a crossbar device with VO₂ grains. (b) Grains grow directly on the 1 μm SiO₂ substrate or (c) the bottom electrode. Single-layer VO₂ grains show interfacial crystallization (d) and (g) at the VO₂/SiO₂ interface in only one orientation in the (e) and (f) FFT plots. The cloud-shaped rings around the origins of the FFT plots reveal the presence of leftover amorphous vanadium-oxide material.

The absence of this spurious interfacial layer leads to a low variability between devices, measured in Fig. 6c in comparison with those in Fig. 6b. In the Raman spectra of Fig. 6a, characteristic VO₂ peaks are observed on both thin (≤ 10 nm) or thick (1 μm) SiO₂ substrates. However, only devices fabricated on thin SiO₂ or with a HfO₂ interlayer, which are both characterized by the absence of the additional amorphous spurious layers (Figure S1 in SI and Fig. 4c, respectively), demonstrate reproducible and uniform electrical properties (see Fig. 6c and Fig. 7a–c, respectively). This suggests that by biasing the VO₂ grains in such devices, despite the presence of Ti and Pt in crossbar devices, a preferential current path will be established from the top to the bottom electrodes, avoiding any interference from the spurious layer, effectively removing variability between devices observed in Figs. 1c, 2, and 6b.

Figure 6

Influence of the SiO₂ thickness on VO₂. (a) Raman spectra for STA treated VO₂ samples on SiO₂ substrate layer grown thermally (1 μm) or by PECVD (10 nm). Differentiating VO₂ grains crystallinity and quality cannot be assessed through Raman analysis as the spectra are indistinguishable. R–T characteristics of VO₂ crossbar devices grown on (b) a 1 μm thermal SiO₂ substrate and (c) a 10 nm SiO₂ (PECVD) substrate. Both the insulator- and the metallic-state resistivities show significant device-to-device variability on thick SiO₂ substrate (b) compared to the ones on a thin SiO₂ layer (c).

Figure 7

VO₂ oscillators. (a) Oscillatory response of 7 VO₂-based crossbar devices biased with a DC voltage. The traces are stacked to facilitate visibility. V_DD = 5 V. R_s ≈ 40 kΩ. C_ext = 10 nF. (b) R–T characteristics of VO₂ crossbar devices grown on a thin SiO₂ (≤ 10 nm)/HfO₂ (10 nm) stack, RTA annealed: 470 °C, 5 Pa O₂ pressure, 10 min long annealing. (c) Current–Voltage (I–V) characteristics at room temperature of 4 VO₂-based crossbar devices biased with a controlled ramping voltage from. V_DD = 0 V to 10 V. R_s ≈ 40 kΩ. The samples have 4 nm of PECVD SiO₂, 10 nm of HfO₂ (ALD), and 60 nm of annealed VO₂. (active area: 300 nm × 300 nm × 60 nm). (d) Schematic of VO₂-based oscillators built with a crossbar device, an external resistor and a capacitor to set and adjust the oscillating frequency. The coupling units Z_i-j connect each oscillator’s output to create an ONN, whose phase relationships define a state of encoded information. (e) Thévenin equivalent circuit of one VO₂-based oscillator seen from the output terminal of an external load capacitor.

In the crossbar configuration, favored for precisely defining the current path in the device, a thin (≤ 10 nm) SiO₂ is not recommended, as it may result in the electrodes coming into contact with the semiconducting Si substrate after patterning. This can be avoided by using HfO₂ as an etch-stop layer. Therefore, the role of the HfO₂ interlayer is threefold: (1) It acts as a barrier to avert the formation of this undesired spurious layer, responsible for creating variability among VO₂-based crossbar devices, (2) It preserves VO₂’s structural and phase-transition properties, while (3) acting as an etch-stop layer between the semiconducting Si substrate and the VO₂ grains for further processing and ohmic contacts.

VO₂ devices for relaxation oscillators

The material development leads to these findings: the highest quality of VO₂ layer is obtained with a thin SiO₂ (≤ 10 nm)/HfO₂ (10 nm)-VO₂ stack annealed under the conditions described in Table S3. The reproducibility of these devices makes them the best choice to build relaxation oscillators. The crossbar oscillators are designed with 50 nm thick Ti/Pt top and bottom electrodes. The active area has dimensions between 100 nm × 100 nm × 60 nm and 300 nm × 300 nm × 60 nm.

Figure 7b shows the R–T characteristics of four devices fabricated on a thin SiO₂ (≤ 10 nm)/HfO₂ (10 nm) stack annealed under the conditions highlighted in Table S3. Figure 7c shows the corresponding I–V characteristics where V_DD was swept from 0 to 10 V, with a series resistor of 40 kΩ connected to the bottom electrode, and no external load capacitor. When the voltage across each device reaches their respective insulator-to-metal transition point, i.e. when the material’s temperature has reached 68 °C, the current and the conductivity increase abruptly. We can conclude from our measurements in Fig. 7a–c and in SI that the insulator- and metallic-state resistivities are nearly identical for all devices, with transition voltages V_IMT varying by less than 7%. These results confirm the mitigated variability between the oscillators achieved with our material and stack optimization. The low transition from the insulator to the metallic state of about 1.5 orders of magnitude aligns with expectations for granular devices produced on a CMOS-compatible platform ³⁰. In such devices, the conductance of the metallic state is constrained by grain boundaries, even when individual grains exhibit low resistance ²⁷. Consequently, the operational window, particularly the selection range for the V_DD and R_s parameters ⁴⁹ (see Fig. 7d), is narrower compared to devices made from single-crystal or epitaxially grown VO₂ ³⁶.

Figure 7d shows the circuit connections made to realize VO₂-based oscillators, including a Thévenin equivalent circuit in Fig. 7e to model single device operation. The phase-change properties of VO₂ influence the equivalent circuit seen at the outputs. This behavior is represented in Fig. 7e by a switch triggered by either the insulator-to-metal transition (IMT) or the metal-to-insulator transition (MIT). The Thévenin equivalent circuit also describes the charging and discharging phases at the output, allowing for the adjustment of the oscillation frequency by modifying the RC-network's equivalent time constant through the external series resistance. During the charging and the discharging phases of the capacitor, the VO₂ crossbar device is in the metallic state ($R_{{VO_{2} }} = R_{met}$) or the insulator state ($R_{{VO_{2} }} = R_{ins}$), respectively. The output voltage, measured at the terminal of the external capacitor, is expressed in two phases:

$$V_{out} = \left\{ {\begin{array}{*{20}c} {V_{{out_{ch\arg e} }} = V_{{TH_{met} }} - \left[ {V_{{TH_{met} }} - \left( {V_{DD} - V_{IMT} } \right)} \right]e^{{ - t_{ch\arg e} /R_{{TH_{met} }} C_{ext} }} } \\ {V_{{out_{disch\arg e} }} = V_{{TH_{ins} }} + \left[ {\left( {V_{DD} - V_{MIT} } \right) - V_{{TH_{ins} }} } \right]e^{{ - t_{disch\arg e} /R_{{TH_{ins} }} C_{ext} }} } \\ \end{array} } \right.$$

(1)

With

$$V_{TH} = V_{DD} \frac{{R_{s} }}{{R_{s} + R_{{VO_{2} }} }} = \left\{ {\begin{array}{*{20}c} {V_{{TH_{met} }} = V_{DD} \frac{{R_{s} }}{{R_{s} + R_{met} }}} \\ {V_{{TH_{ins} }} = V_{DD} \frac{{R_{s} }}{{R_{s} + R_{ins} }}} \\ \end{array} } \right.$$

(2)

$$R_{TH} = \left( {\frac{1}{R}_{s} + \frac{1}{{R_{{VO_{2} }} }}} \right)^{ - 1} = \left\{ {\begin{array}{*{20}c} {R_{{TH_{met} }} = \left( {\frac{1}{R}_{s} + \frac{1}{{R_{met} }}} \right)^{ - 1} } \\ {R_{{TH_{ins} }} = \left( {\frac{1}{R}_{s} + \frac{1}{{R_{ins} }}} \right)^{ - 1} } \\ \end{array} } \right.$$

(3)

And ensuring that

$$V_{{TH_{met} }} > V_{DD} - V_{IMT}$$

(4)

$$V_{{TH_{ins} }} < V_{DD} - V_{MIT}$$

(5)

By fixing the external capacitor to C_ext = 10 nF and imposing a desired oscillating frequency f of:

$$f = \left( {t_{ch\arg e} + t_{disch\arg e} } \right)^{ - 1} = 5\, {\text{kHz}}$$

(6)

We can solve numerically Eq. 1 and Eq. 6 to find the required value of the external series resistance to operate at the set frequency. This method was applied to seven devices contacted simultaneously. The individual VO₂-based oscillators can be connected at their outputs by coupling units to mimic symmetrical synaptic weights—represented by impedances Z_i-j in Fig. 7d—to create an oscillating neural network.

Figure 7a shows the oscillations of seven devices oscillating at 5 kHz, with no coupling units (see Figure S7 in SI for Fast Fourier Transforms). The VO₂-based oscillators have similar oscillating voltage amplitudes and frequencies, indicating once more the low variability obtained with our annealing technique and material stack optimization investigations ⁵⁰. In Fig. 7a, the repeatability in the R–T and I–V measurements shown in Fig. 7b–c is demonstrated across several cycles of seven samples, revealing their similar oscillatory behaviors. The oscillation amplitude varies by less than 3.5% over 250 cycles within the same device, while the transition voltages show variations of up to 10% from one device to another. This degree of variability is at the boundaries of tolerance required for device coupling and enabling ONN-based computing ⁵⁰. In order to effectively realize an ONN, we opt for crossbars with device-to-device variability below 5%, as they tend to synchronize more easily. Designing such a network was not feasible with the characteristics of the devices shown in Fig. 1b. In the case of high variability among the oscillators, they would either ignore each other in the case of weak coupling and not lock in frequency, or exchange too much current when coupled strongly, often leading to oscillation failure or device breakdown. An example is shown in SI.

Discussion

Here, we discuss the role of interlayers and grain boundaries on the electrical performance of the oscillators. The TEM micrographs and EDS scan shown in Fig. 3g reveal a possible interdiffusion mechanism occurring between the interlayer and the VO₂ at temperatures above 400 °C. Among the tested interlayers, WO_x is the only material higher than vanadium oxides on an Ellingham diagram at the annealing temperatures ^51,52. VO₂ thus acts as a scavenging material, absorbing oxygen both from the WO_x interlayer and the chamber. This interaction with a dopant or a substrate material can promote the formation of undesirable VO₂ crystal states (e.g. VO₂(B)) or the stabilization of uncontrolled oxidation states, leading to the degradation or suppression of the film’s transition temperature (see Fig. 3a). Similar results were also observed in Guo et al.²⁵. Interestingly, the same failure mechanism observed with the WO_x interlayer is not seen for samples with HfO₂ or Al₂O₃ interlayers under long annealing (see Fig. 3a). According to other studies ^28,29,34,37, treating the film with such conditions should have stabilized the films in the V₂O₅ stoichiometry. Instead, we observed that doping VO₂ with HfO₂ or Al₂O₃ interlayers combined with long annealing produces phase-change materials with higher transitions temperatures. Our results presented in Fig. 3a–f indicate that a broad range of substrates with various thicknesses can be harnessed to engineer the IMT in VO₂ films ⁵³. This opens new possibilities for engineering and tuning VO₂’s transition temperature, particularly for applications requiring a higher thermal budget. However, considering the specific application targeted in this study, the incorporation of interlayers other than HfO₂ or the direct growth of VO₂ grains on thick SiO₂ results in devices with unpredictable oscillation patterns. Due to challenges related to reproducibility, stability, and lack of configurability through external parameters (R_s and C_ext), extensive measurement on these devices becomes impractical, and coupling is impossible. See SI.

We now discuss the role of oxygen in annealing stable VO₂. We observed a significant reduction in sample-to-sample variability by reducing the SiO₂ thickness (Fig. 6c), which points to a potential oxygen diffusion mechanism between the substrate and the vanadium oxide layer during the early stages of the annealing step ⁵⁴. This diffusion process could contribute to the stabilization into the VO₂ oxidation state and effectively prevent excess oxygen from forming higher oxidation states such as V₂O₅ crystals. In fact, our measurements in Figs. 6c and 7a–c suggest that when the vanadium oxide film can lose oxygen through a thin SiO₂ layer and the HfO₂ interlayer into the Si substrate below ⁵⁵, our optimized RTA annealing consistently produces samples of high quality, a finding also reported in Prasadam et al.²⁹. In the case of a thick SiO₂ substrate with no interlayer, the oxygen, unable to diffuse into the Si substrate, may remain at the interface between the VO₂ grains and the substrate. This is a meaningful discovery, as we believe that the oxygen excess at the grain boundaries near the VO₂/SiO₂ interface, detected with the main V₂O₅ Raman peak (145 cm⁻¹) in Fig. 3h and Fig. 6a, is responsible for creating the measured spurious layer (see Fig. 4; Table 1) that led to variability among samples (Figs. 1b, 2, and 6b).

Here, we explain this variability by analyzing the impact of an electric field at the nanoscale level. From a device standpoint, applying a forward or backward bias respectively generates or annihilates oxygen vacancies that trigger the heterogeneous nucleation of the phase transition, thus influencing the resistance state of the VO₂ film ^23,56. In the case of devices on thick SiO₂ substrate, which exhibit more defects and dislocations, the non-uniform diffusion of oxygen during annealing and/or the presence of a disordered layer with higher oxygen density at the interface (Table 1 lead to uneven conductance at the grain boundaries of the film. Consequently, biasing VO₂ on a thick SiO₂ substrate results in non-uniform oxygen vacancies at the grain boundaries, which translates into the varying insulator- and metallic-state resistances (Figs. 1b, 2, and 6b). This effect is exacerbated with our dense polycrystalline layer, as the number of grain boundaries increases inversely with the size of the VO₂ grains. This further motivates our choice of a thin SiO₂ layer (≤ 10 nm)/HfO₂ (10 nm) stack that effectively reduces variability in the oscillators by avoiding the formation of a spurious layer during ALD deposition (Fig. 4a). This allows the current path to follow the grain boundaries of the monolayer VO₂ between the top and bottom electrodes without crossing the spurious layer. As a result, the VO₂ grown on this optimized stack configuration (Fig. 4c) and using our best annealing technique (Table S3) leads to a more uniform generation of oxygen vacancies at the grain boundaries during electrical operation.

Conclusions

The realization of a large-scale network comprising several VO₂-based oscillators has been hindered by the challenging stabilization of VO₂ oxidation state, typically introducing granularities and rough morphology. This has led to degraded electrical performance and significant variability between devices, generally limiting the coupling to only two devices. To achieve the required device reliability for a neuro-inspired circuit, we investigated the role of annealing parameters using three different methods post-ALD deposition of the vanadium oxide film. Our goal was to obtain a high-quality VO₂ layer with low surface roughness, densely positioned small grains, and highly reproducible current–voltage (I–V) and hysteretic R–T characteristics.

To achieve this level of quality, we employed a rapid thermal annealing technique capable of delivering a quick and uniform heat distribution across the entire vanadium oxide layer. Our findings revealed that device variability was attributed to the formation of an amorphous spurious vanadium oxide layer at the VO_x/SiO₂ interface when SiO₂ was thick (> 10 nm). This layer significantly affected the generation of oxygen vacancies during device operation, leading to an uncontrolled current path within the cross-section area of our crossbar VO₂-based oscillators.

Furthermore, we studied the role of different metal-oxide interlayers placed between the Si/SiO₂ substrate and the VO₂. By engineering a stack that included a HfO₂ interlayer, we obtained a sharper interface, resulting in mitigated device variability. By combining our highly reproducible annealing treatment with our optimized epitaxial stack SiO₂ (≤ 10 nm)/HfO₂ (10 nm) underneath the vanadium-oxide layer, we achieved excellent results, with up to 7 VO₂-based oscillators simultaneously contacted on a CMOS medium. These oscillators operated at the exact same frequency, with oscillation amplitudes on the order of 1.7 V. This level of uniformity and ideal electrical performance meets the requirements for successful device coupling and the realization of an oscillating neural network. Our network of VO₂-based oscillators presents an attractive and scalable computing unit for hardware accelerators, offering new computational paradigms for AI applications in optimization problems and pattern recognition, thanks to its high-performance switching properties and CMOS compatibility ^5,7,10.